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authorDavid Gwynne <dlg@cvs.openbsd.org>2017-05-25 03:19:40 +0000
committerDavid Gwynne <dlg@cvs.openbsd.org>2017-05-25 03:19:40 +0000
commit845c87ec543f1120cbaa6f2e75bcb0046b4abfb5 (patch)
tree9c5503e4b0714ab8c02148b3e246f4b8ab2de5ca
parent1b365b9ae6fcc81709acb50207133615d44849f1 (diff)
tweak sparc64 membars as a step toward making them usable in userland.
specifically, dont rely on magic in ctlreg to implement membars. moving that to atomic.h would add a lot of pollution to the namespace, so move to passing the membar options to a single __membar macro. this tweaks everything that was using the ctlreg backend to either use an appropriate membar_foo(), or to use __membar() in the MD code. ok kettenis@
-rw-r--r--sys/arch/sparc64/dev/iommu.c16
-rw-r--r--sys/arch/sparc64/dev/psycho.c8
-rw-r--r--sys/arch/sparc64/dev/pyro.c6
-rw-r--r--sys/arch/sparc64/dev/schizo.c6
-rw-r--r--sys/arch/sparc64/dev/vdsk.c4
-rw-r--r--sys/arch/sparc64/dev/viommu.c6
-rw-r--r--sys/arch/sparc64/include/atomic.h14
-rw-r--r--sys/arch/sparc64/include/bus.h12
-rw-r--r--sys/arch/sparc64/include/ctlreg.h36
-rw-r--r--sys/arch/sparc64/include/psl.h4
-rw-r--r--sys/arch/sparc64/sparc64/cpu.c6
-rw-r--r--sys/arch/sparc64/sparc64/ipifuncs.c4
-rw-r--r--sys/arch/sparc64/sparc64/lock_machdep.c8
-rw-r--r--sys/arch/sparc64/sparc64/machdep.c4
-rw-r--r--sys/arch/sparc64/sparc64/vm_machdep.c4
-rw-r--r--sys/dev/pci/drm/drmP.h4
16 files changed, 55 insertions, 87 deletions
diff --git a/sys/arch/sparc64/dev/iommu.c b/sys/arch/sparc64/dev/iommu.c
index b2f02f8f541..8f925c400af 100644
--- a/sys/arch/sparc64/dev/iommu.c
+++ b/sys/arch/sparc64/dev/iommu.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: iommu.c,v 1.74 2017/04/30 16:45:45 mpi Exp $ */
+/* $OpenBSD: iommu.c,v 1.75 2017/05/25 03:19:39 dlg Exp $ */
/* $NetBSD: iommu.c,v 1.47 2002/02/08 20:03:45 eeh Exp $ */
/*
@@ -296,7 +296,7 @@ strbuf_reset(struct strbuf_ctl *sb)
bus_space_write_8(sb->sb_bustag, sb->sb_sb,
STRBUFREG(strbuf_ctl), STRBUF_EN);
- membar(Lookaside);
+ __membar("#Lookaside");
/* No streaming buffers? Disable them */
if (bus_space_read_8(sb->sb_bustag, sb->sb_sb,
@@ -412,7 +412,7 @@ iommu_remove(struct iommu_state *is, struct strbuf_ctl *sb, bus_addr_t va)
* IO operations are strongly ordered WRT each other. It is
* unclear how they relate to normal memory accesses.
*/
- membar(StoreStore);
+ __membar("#StoreStore");
IOMMUREG_WRITE(is, iommu_flush, va);
@@ -529,7 +529,7 @@ iommu_strbuf_flush_done(struct iommu_map_state *ims)
* memory is initialized before the IOMMU uses it.
* Is this Needed? How are IO and memory operations ordered?
*/
- membar(StoreStore);
+ __membar("#StoreStore");
bus_space_write_8(sb->sb_bustag, sb->sb_sb,
STRBUFREG(strbuf_flushsync), sf->sbf_flushpa);
@@ -538,7 +538,7 @@ iommu_strbuf_flush_done(struct iommu_map_state *ims)
("iommu_strbuf_flush_done: flush = %llx pa = %lx\n",
ldxa(sf->sbf_flushpa, ASI_PHYS_CACHED), sf->sbf_flushpa));
- membar(StoreLoad | Lookaside);
+ __membar("#StoreLoad | #Lookaside");
for(;;) {
int i;
@@ -549,7 +549,7 @@ iommu_strbuf_flush_done(struct iommu_map_state *ims)
* fetches.
*/
for (i = 0; i < 1000; ++i) {
- membar(LoadLoad);
+ __membar("#LoadLoad");
/* Bypass non-coherent D$ */
/* non-coherent...? Huh? */
flush = ldxa(sf->sbf_flushpa, ASI_PHYS_CACHED);
@@ -1560,14 +1560,14 @@ iommu_dvmamap_sync(bus_dma_tag_t t, bus_dma_tag_t t0, bus_dmamap_t map,
return;
if (ops & BUS_DMASYNC_PREWRITE)
- membar(MemIssue);
+ __membar("#MemIssue");
if ((ims->ims_flags & IOMMU_MAP_STREAM) &&
(ops & (BUS_DMASYNC_POSTREAD | BUS_DMASYNC_PREWRITE)))
_iommu_dvmamap_sync(t, t0, map, offset, len, ops);
if (ops & BUS_DMASYNC_POSTREAD)
- membar(MemIssue);
+ __membar("#MemIssue");
}
/*
diff --git a/sys/arch/sparc64/dev/psycho.c b/sys/arch/sparc64/dev/psycho.c
index 997c9758e31..a35cf549d23 100644
--- a/sys/arch/sparc64/dev/psycho.c
+++ b/sys/arch/sparc64/dev/psycho.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: psycho.c,v 1.74 2016/08/23 03:28:01 guenther Exp $ */
+/* $OpenBSD: psycho.c,v 1.75 2017/05/25 03:19:39 dlg Exp $ */
/* $NetBSD: psycho.c,v 1.39 2001/10/07 20:30:41 eeh Exp $ */
/*
@@ -1120,11 +1120,11 @@ psycho_conf_read(pci_chipset_tag_t pc, pcitag_t tag, int reg)
int s;
s = splhigh();
- membar(Sync);
+ __membar("#Sync");
ci->ci_pci_probe = 1;
val = bus_space_read_4(pc->bustag, pc->bushandle,
PCITAG_OFFSET(tag) + reg);
- membar(Sync);
+ __membar("#Sync");
if (ci->ci_pci_fault)
val = 0xffffffff;
ci->ci_pci_probe = ci->ci_pci_fault = 0;
@@ -1333,7 +1333,7 @@ psycho_sabre_dvmamap_sync(bus_dma_tag_t t, bus_dma_tag_t t0, bus_dmamap_t map,
psycho_psychoreg_read(sc, pci_dma_write_sync);
if (ops & (BUS_DMASYNC_POSTREAD | BUS_DMASYNC_PREWRITE))
- membar(MemIssue);
+ __membar("#MemIssue");
}
u_int
diff --git a/sys/arch/sparc64/dev/pyro.c b/sys/arch/sparc64/dev/pyro.c
index 777eccfdce1..bbed8fa4054 100644
--- a/sys/arch/sparc64/dev/pyro.c
+++ b/sys/arch/sparc64/dev/pyro.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: pyro.c,v 1.30 2016/12/20 13:40:50 jsg Exp $ */
+/* $OpenBSD: pyro.c,v 1.31 2017/05/25 03:19:39 dlg Exp $ */
/*
* Copyright (c) 2002 Jason L. Wright (jason@thought.net)
@@ -372,11 +372,11 @@ pyro_conf_read(pci_chipset_tag_t pc, pcitag_t tag, int reg)
int s;
s = splhigh();
- membar(Sync);
+ __membar("#Sync");
ci->ci_pci_probe = 1;
val = bus_space_read_4(pc->bustag, pc->bushandle,
(PCITAG_OFFSET(tag) << 4) + reg);
- membar(Sync);
+ __membar("#Sync");
if (ci->ci_pci_fault)
val = 0xffffffff;
ci->ci_pci_probe = ci->ci_pci_fault = 0;
diff --git a/sys/arch/sparc64/dev/schizo.c b/sys/arch/sparc64/dev/schizo.c
index 20799342bfd..33876416b64 100644
--- a/sys/arch/sparc64/dev/schizo.c
+++ b/sys/arch/sparc64/dev/schizo.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: schizo.c,v 1.67 2016/08/23 03:28:01 guenther Exp $ */
+/* $OpenBSD: schizo.c,v 1.68 2017/05/25 03:19:39 dlg Exp $ */
/*
* Copyright (c) 2002 Jason L. Wright (jason@thought.net)
@@ -476,11 +476,11 @@ schizo_conf_read(pci_chipset_tag_t pc, pcitag_t tag, int reg)
int s;
s = splhigh();
- membar(Sync);
+ __membar("#Sync");
ci->ci_pci_probe = 1;
val = bus_space_read_4(pc->bustag, pc->bushandle,
PCITAG_OFFSET(tag) + reg);
- membar(Sync);
+ __membar("#Sync");
if (ci->ci_pci_fault)
val = 0xffffffff;
ci->ci_pci_probe = ci->ci_pci_fault = 0;
diff --git a/sys/arch/sparc64/dev/vdsk.c b/sys/arch/sparc64/dev/vdsk.c
index 5be1a856773..530f8e51a4b 100644
--- a/sys/arch/sparc64/dev/vdsk.c
+++ b/sys/arch/sparc64/dev/vdsk.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: vdsk.c,v 1.47 2016/10/13 18:16:42 tom Exp $ */
+/* $OpenBSD: vdsk.c,v 1.48 2017/05/25 03:19:39 dlg Exp $ */
/*
* Copyright (c) 2009, 2011 Mark Kettenis
*
@@ -1093,7 +1093,7 @@ vdsk_submit_cmd(struct scsi_xfer *xs)
sc->sc_vd->vd_desc[desc].offset = lba;
sc->sc_vd->vd_desc[desc].size = xs->datalen;
sc->sc_vd->vd_desc[desc].ncookies = ncookies;
- membar(Sync);
+ membar_sync();
sc->sc_vd->vd_desc[desc].hdr.dstate = VIO_DESC_READY;
sc->sc_vsd[desc].vsd_xs = xs;
diff --git a/sys/arch/sparc64/dev/viommu.c b/sys/arch/sparc64/dev/viommu.c
index 4ded11671eb..91e33cd93eb 100644
--- a/sys/arch/sparc64/dev/viommu.c
+++ b/sys/arch/sparc64/dev/viommu.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: viommu.c,v 1.18 2017/04/30 16:45:45 mpi Exp $ */
+/* $OpenBSD: viommu.c,v 1.19 2017/05/25 03:19:39 dlg Exp $ */
/* $NetBSD: iommu.c,v 1.47 2002/02/08 20:03:45 eeh Exp $ */
/*
@@ -884,7 +884,7 @@ viommu_dvmamap_sync(bus_dma_tag_t t, bus_dma_tag_t t0, bus_dmamap_t map,
return;
if (ops & BUS_DMASYNC_PREWRITE)
- membar(MemIssue);
+ __membar("#MemIssue");
#if 0
if (ops & (BUS_DMASYNC_POSTREAD | BUS_DMASYNC_PREWRITE))
@@ -892,7 +892,7 @@ viommu_dvmamap_sync(bus_dma_tag_t t, bus_dma_tag_t t0, bus_dmamap_t map,
#endif
if (ops & BUS_DMASYNC_POSTREAD)
- membar(MemIssue);
+ __membar("#MemIssue");
}
int
diff --git a/sys/arch/sparc64/include/atomic.h b/sys/arch/sparc64/include/atomic.h
index 2380dd35393..bd4411a4f89 100644
--- a/sys/arch/sparc64/include/atomic.h
+++ b/sys/arch/sparc64/include/atomic.h
@@ -1,4 +1,4 @@
-/* $OpenBSD: atomic.h,v 1.13 2014/07/18 12:44:53 dlg Exp $ */
+/* $OpenBSD: atomic.h,v 1.14 2017/05/25 03:19:39 dlg Exp $ */
/*
* Copyright (c) 2007 Artur Grabowski <art@openbsd.org>
*
@@ -142,11 +142,13 @@ atomic_clearbits_int(volatile unsigned int *uip, unsigned int v)
} while (r != e);
}
-#define membar_enter() membar(StoreLoad|StoreStore)
-#define membar_exit() membar(LoadStore|StoreStore)
-#define membar_producer() membar(StoreStore)
-#define membar_consumer() membar(LoadLoad)
-#define membar_sync() membar(Sync)
+#define __membar(_m) __asm volatile("membar " _m ::: "memory")
+
+#define membar_enter() __membar("#StoreLoad|#StoreStore")
+#define membar_exit() __membar("#LoadStore|#StoreStore")
+#define membar_producer() __membar("#StoreStore")
+#define membar_consumer() __membar("#LoadLoad")
+#define membar_sync() __membar("#Sync")
#endif /* defined(_KERNEL) */
#endif /* _MACHINE_ATOMIC_H_ */
diff --git a/sys/arch/sparc64/include/bus.h b/sys/arch/sparc64/include/bus.h
index 497b5843f7c..d1288962105 100644
--- a/sys/arch/sparc64/include/bus.h
+++ b/sys/arch/sparc64/include/bus.h
@@ -1,4 +1,4 @@
-/* $OpenBSD: bus.h,v 1.32 2017/05/08 00:27:45 dlg Exp $ */
+/* $OpenBSD: bus.h,v 1.33 2017/05/25 03:19:39 dlg Exp $ */
/* $NetBSD: bus.h,v 1.31 2001/09/21 15:30:41 wiz Exp $ */
/*-
@@ -66,7 +66,7 @@
#ifndef _MACHINE_BUS_H_
#define _MACHINE_BUS_H_
-#include <machine/ctlreg.h>
+#include <sys/atomic.h>
/*
* Debug hooks
@@ -319,19 +319,19 @@ bus_space_barrier(t, h, o, s, f)
#ifdef notyet
switch (f) {
case (BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE):
- membar(LoadLoad|StoreStore);
+ __membar("#LoadLoad|#StoreStore");
break;
case BUS_SPACE_BARRIER_READ:
- membar(LoadLoad);
+ membar("#LoadLoad");
break;
case BUS_SPACE_BARRIER_WRITE:
- membar(StoreStore);
+ membar("#StoreStore");
break;
default:
break;
}
#else
- membar(Sync);
+ __membar("#Sync");
#endif
}
diff --git a/sys/arch/sparc64/include/ctlreg.h b/sys/arch/sparc64/include/ctlreg.h
index d794e56aae0..09457821cb9 100644
--- a/sys/arch/sparc64/include/ctlreg.h
+++ b/sys/arch/sparc64/include/ctlreg.h
@@ -1,4 +1,4 @@
-/* $OpenBSD: ctlreg.h,v 1.27 2016/03/07 13:21:51 naddy Exp $ */
+/* $OpenBSD: ctlreg.h,v 1.28 2017/05/25 03:19:39 dlg Exp $ */
/* $NetBSD: ctlreg.h,v 1.28 2001/08/06 23:55:34 eeh Exp $ */
/*
@@ -58,24 +58,6 @@
*/
/*
- * membar operand macros for use in other macros when # is a special
- * character. Keep these in sync with what the hardware expects.
- */
-#define C_Lookaside (0)
-#define C_MemIssue (1)
-#define C_Sync (2)
-#define M_LoadLoad (0)
-#define M_StoreLoad (1)
-#define M_LoadStore (2)
-#define M_StoreStore (3)
-
-#define CMASK_SHIFT (4)
-#define MMASK_SHIFT (0)
-
-#define CMASK_GEN(bit) ((1 << (bit)) << CMASK_SHIFT)
-#define MMASK_GEN(bit) ((1 << (bit)) << MMASK_SHIFT)
-
-/*
* The Alternate address spaces.
*
* 0x00-0x7f are privileged
@@ -522,22 +504,6 @@
* D$ so we need to flush the D$ to make sure we don't get data pollution.
*/
-#define sparc_membar(mask) do { \
- if (mask) \
- __asm volatile("membar %0" : : "n" (mask) : "memory"); \
- else \
- __asm volatile("" : : : "memory"); \
-} while(0)
-
-#define membar sparc_membar
-#define Lookaside CMASK_GEN(C_Lookaside)
-#define MemIssue CMASK_GEN(C_MemIssue)
-#define Sync CMASK_GEN(C_Sync)
-#define LoadLoad MMASK_GEN(M_LoadLoad)
-#define StoreLoad MMASK_GEN(M_StoreLoad)
-#define LoadStore MMASK_GEN(M_LoadStore)
-#define StoreStore MMASK_GEN(M_StoreStore)
-
#define sparc_wr(name, val, xor) \
do { \
if (__builtin_constant_p(xor)) \
diff --git a/sys/arch/sparc64/include/psl.h b/sys/arch/sparc64/include/psl.h
index 53b2f17cf28..26c93ce4368 100644
--- a/sys/arch/sparc64/include/psl.h
+++ b/sys/arch/sparc64/include/psl.h
@@ -1,4 +1,4 @@
-/* $OpenBSD: psl.h,v 1.31 2016/06/13 01:08:13 dlg Exp $ */
+/* $OpenBSD: psl.h,v 1.32 2017/05/25 03:19:39 dlg Exp $ */
/* $NetBSD: psl.h,v 1.20 2001/04/13 23:30:05 thorpej Exp $ */
/*
@@ -313,7 +313,7 @@ stxa_sync(u_int64_t va, u_int64_t asi, u_int64_t val)
{
u_int64_t s = intr_disable();
stxa_nc(va, asi, val);
- membar(Sync);
+ __asm volatile("membar #Sync" : : : "memory");
intr_restore(s);
}
diff --git a/sys/arch/sparc64/sparc64/cpu.c b/sys/arch/sparc64/sparc64/cpu.c
index d73e84f1721..6e5792cf75d 100644
--- a/sys/arch/sparc64/sparc64/cpu.c
+++ b/sys/arch/sparc64/sparc64/cpu.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: cpu.c,v 1.65 2016/05/03 08:30:15 kettenis Exp $ */
+/* $OpenBSD: cpu.c,v 1.66 2017/05/25 03:19:39 dlg Exp $ */
/* $NetBSD: cpu.c,v 1.13 2001/05/26 21:27:15 chs Exp $ */
/*
@@ -717,7 +717,7 @@ cpu_boot_secondary_processors(void)
}
for (i = 0; i < 2000; i++) {
- sparc_membar(Sync);
+ membar_sync();
if (ci->ci_flags & CPUF_RUNNING)
break;
delay(10000);
@@ -734,7 +734,7 @@ cpu_hatch(void)
cpu_init(ci);
ci->ci_flags |= CPUF_RUNNING;
- sparc_membar(Sync);
+ membar_sync();
s = splhigh();
nanouptime(&ci->ci_schedstate.spc_runtime);
diff --git a/sys/arch/sparc64/sparc64/ipifuncs.c b/sys/arch/sparc64/sparc64/ipifuncs.c
index e6dd8a5152f..a7732fbed80 100644
--- a/sys/arch/sparc64/sparc64/ipifuncs.c
+++ b/sys/arch/sparc64/sparc64/ipifuncs.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: ipifuncs.c,v 1.15 2014/05/10 12:29:58 kettenis Exp $ */
+/* $OpenBSD: ipifuncs.c,v 1.16 2017/05/25 03:19:39 dlg Exp $ */
/* $NetBSD: ipifuncs.c,v 1.8 2006/10/07 18:11:36 rjs Exp $ */
/*-
@@ -97,7 +97,7 @@ sun4u_send_ipi(int itid, void (*func)(void), u_int64_t arg0, u_int64_t arg1)
stxa(IDDR_1H, ASI_INTERRUPT_DISPATCH, arg0);
stxa(IDDR_2H, ASI_INTERRUPT_DISPATCH, arg1);
stxa(IDCR(itid), ASI_INTERRUPT_DISPATCH, 0);
- membar(Sync);
+ membar_sync();
for (j = 0; j < 1000000; j++) {
if (ldxa(0, ASR_IDSR) & (IDSR_BUSY << shift))
diff --git a/sys/arch/sparc64/sparc64/lock_machdep.c b/sys/arch/sparc64/sparc64/lock_machdep.c
index 38de1567201..355e5cc6fa0 100644
--- a/sys/arch/sparc64/sparc64/lock_machdep.c
+++ b/sys/arch/sparc64/sparc64/lock_machdep.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: lock_machdep.c,v 1.14 2017/04/30 16:45:45 mpi Exp $ */
+/* $OpenBSD: lock_machdep.c,v 1.15 2017/05/25 03:19:39 dlg Exp $ */
/*
* Copyright (c) 2007 Artur Grabowski <art@openbsd.org>
@@ -119,7 +119,7 @@ __mp_lock(struct __mp_lock *mpl)
intr_restore(s);
__mp_lock_spin(mpl, cpu->mplc_ticket);
- sparc_membar(LoadLoad | LoadStore);
+ membar_enter();
}
void
@@ -130,7 +130,7 @@ __mp_unlock(struct __mp_lock *mpl)
s = intr_disable();
if (--cpu->mplc_depth == 0) {
- sparc_membar(StoreStore | LoadStore);
+ membar_exit();
mpl->mpl_ticket++;
}
intr_restore(s);
@@ -146,7 +146,7 @@ __mp_release_all(struct __mp_lock *mpl)
s = intr_disable();
rv = cpu->mplc_depth;
cpu->mplc_depth = 0;
- sparc_membar(StoreStore | LoadStore);
+ membar_exit();
mpl->mpl_ticket++;
intr_restore(s);
diff --git a/sys/arch/sparc64/sparc64/machdep.c b/sys/arch/sparc64/sparc64/machdep.c
index 3c66d8e772c..0c639e993d7 100644
--- a/sys/arch/sparc64/sparc64/machdep.c
+++ b/sys/arch/sparc64/sparc64/machdep.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: machdep.c,v 1.183 2017/01/21 05:42:03 guenther Exp $ */
+/* $OpenBSD: machdep.c,v 1.184 2017/05/25 03:19:39 dlg Exp $ */
/* $NetBSD: machdep.c,v 1.108 2001/07/24 19:30:14 eeh Exp $ */
/*-
@@ -1327,7 +1327,7 @@ _bus_dmamap_sync(t, t0, map, offset, len, ops)
int ops;
{
if (ops & (BUS_DMASYNC_PREWRITE | BUS_DMASYNC_POSTREAD))
- membar(MemIssue);
+ __membar("#MemIssue");
}
/*
diff --git a/sys/arch/sparc64/sparc64/vm_machdep.c b/sys/arch/sparc64/sparc64/vm_machdep.c
index ac3f4514e83..9d333d462b0 100644
--- a/sys/arch/sparc64/sparc64/vm_machdep.c
+++ b/sys/arch/sparc64/sparc64/vm_machdep.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: vm_machdep.c,v 1.37 2017/04/30 16:45:45 mpi Exp $ */
+/* $OpenBSD: vm_machdep.c,v 1.38 2017/05/25 03:19:39 dlg Exp $ */
/* $NetBSD: vm_machdep.c,v 1.38 2001/06/30 00:02:20 eeh Exp $ */
/*
@@ -314,7 +314,7 @@ fpusave_proc(struct proc *p, int save)
sparc64_send_ipi(ci->ci_itid,
save ? ipi_save_fpstate : ipi_drop_fpstate, (vaddr_t)p, 0);
while(ci->ci_fpproc == p)
- sparc_membar(Sync);
+ membar_sync();
break;
}
#else
diff --git a/sys/dev/pci/drm/drmP.h b/sys/dev/pci/drm/drmP.h
index a95a7fe0c29..bb4305e470e 100644
--- a/sys/dev/pci/drm/drmP.h
+++ b/sys/dev/pci/drm/drmP.h
@@ -1,4 +1,4 @@
-/* $OpenBSD: drmP.h,v 1.209 2016/10/08 05:52:06 guenther Exp $ */
+/* $OpenBSD: drmP.h,v 1.210 2017/05/25 03:19:39 dlg Exp $ */
/* drmP.h -- Private header for Direct Rendering Manager -*- linux-c -*-
* Created: Mon Jan 4 10:05:05 1999 by faith@precisioninsight.com
*/
@@ -158,7 +158,7 @@ extern struct cfdriver drm_cd;
#elif defined(__sparc64__)
#define DRM_READMEMORYBARRIER() DRM_MEMORYBARRIER()
#define DRM_WRITEMEMORYBARRIER() DRM_MEMORYBARRIER()
-#define DRM_MEMORYBARRIER() membar(Sync)
+#define DRM_MEMORYBARRIER() membar_sync()
#endif
#define smp_mb__before_atomic_dec() DRM_MEMORYBARRIER()