diff options
author | Michael Shalayeff <mickey@cvs.openbsd.org> | 2003-02-12 00:43:09 +0000 |
---|---|---|
committer | Michael Shalayeff <mickey@cvs.openbsd.org> | 2003-02-12 00:43:09 +0000 |
commit | 9376da877edaa8e0675c894acc429fd65b095d7b (patch) | |
tree | 833c2253aad851f2dca1effcace36ecdb6210356 | |
parent | b37bb7e70e08b9deb24f62d1e60e00951572ee34 (diff) |
do not filter the coprocessor uid on the fpu context switch.
it will be emulated later or a trap generated appropriately.
this way we do not have to share the knowledge of the present
units all over the sources and keep it relatively easy.
this fixes the random sig4 seen before.
apparently it was caused by the xmpy instruction
triggering the fpu context switch and being of a
problem for the existing uid check to parse.
also force the fpu context reload after the exception
being taken for the fpu or other coprocessor.
reload r1 with iir after load/store emulation.
add a comment on r1 being shadowed on cpu context save before emulation.
-rw-r--r-- | sys/arch/hppa/hppa/locore.S | 18 |
1 files changed, 13 insertions, 5 deletions
diff --git a/sys/arch/hppa/hppa/locore.S b/sys/arch/hppa/hppa/locore.S index 1ae2aa25d65..227ef7003ec 100644 --- a/sys/arch/hppa/hppa/locore.S +++ b/sys/arch/hppa/hppa/locore.S @@ -1,4 +1,4 @@ -/* $OpenBSD: locore.S,v 1.103 2003/01/15 12:33:34 mickey Exp $ */ +/* $OpenBSD: locore.S,v 1.104 2003/02/12 00:43:08 mickey Exp $ */ /* * Copyright (c) 1998-2003 Michael Shalayeff @@ -1089,9 +1089,12 @@ ENTRY(TLABEL(emu),0) comib,= 4, r9, TLABEL(all) ldi T_ILLEGAL, r1 - extru r8, 25, 3, r9 /* only fpu coprocessor emulation now */ - comib,<< 4, r9, TLABEL(all) - ldi T_ILLEGAL, r1 + /* + * pass through for all coprocessors now and + * do not check the uid here. + * in case that piece does not exist emulate + * or the trap will be generted later. + */ /* if we are already enabled and hit again, emulate */ mfctl ccr, r1 @@ -1099,6 +1102,9 @@ ENTRY(TLABEL(emu),0) b,n $fpusw_set nop + mtctl r0, ccr /* cause a reload after exception */ + ldil L%fpu_curpcb, r1 + stw r0, R%fpu_curpcb(r1) #if 0 /* here we emulate the fld/fst */ mfctl iir, r1 @@ -1111,6 +1117,7 @@ ENTRY(TLABEL(emu),0) comib,= 0x9, r9, TLABEL(all) ldi T_ILLEGAL, r1 #endif + mfctl iir, r1 .import $fpu_emulate, code b $fpu_emulate nop @@ -2120,6 +2127,7 @@ ENTRY($fpu_emulate,320) ldil L%fpemu_stack, r31 ldw R%fpemu_stack(r31), r31 + /* stw r1 , TF_R1 (r31) shadowed */ stw r2 , TF_R2 (r31) stw r3 , TF_R3 (r31) #ifdef DDB @@ -2197,7 +2205,7 @@ ENTRY($fpu_emulate,320) ldw TF_R3 (r31), r3 mtsar r1 copy ret0, r1 -#ifdef DDB1 +#ifdef DDB ldw TF_R4 (r31), r4 ldw TF_R5 (r31), r5 ldw TF_R6 (r31), r6 |