diff options
| author | Mark Kettenis <kettenis@cvs.openbsd.org> | 2016-05-06 08:11:59 +0000 |
|---|---|---|
| committer | Mark Kettenis <kettenis@cvs.openbsd.org> | 2016-05-06 08:11:59 +0000 |
| commit | b899f9fc60c1688213f09711b7d77a6db1cc7ee4 (patch) | |
| tree | f87e311277063694c21d8e45453934bfeb8bbb63 | |
| parent | ccedcc5de7e1d52a5fc06867292d83cf81881ca8 (diff) | |
Round the requested clock frequency down to a support value instead of
insisting on an exact match. Add support for a 50 MHz clock.
ok stsp@
| -rw-r--r-- | sys/dev/ic/rtsx.c | 16 |
1 files changed, 15 insertions, 1 deletions
diff --git a/sys/dev/ic/rtsx.c b/sys/dev/ic/rtsx.c index bdb5d50154c..f5142b3af36 100644 --- a/sys/dev/ic/rtsx.c +++ b/sys/dev/ic/rtsx.c @@ -1,4 +1,4 @@ -/* $OpenBSD: rtsx.c,v 1.15 2016/05/06 08:09:20 kettenis Exp $ */ +/* $OpenBSD: rtsx.c,v 1.16 2016/05/06 08:11:58 kettenis Exp $ */ /* * Copyright (c) 2006 Uwe Stuehler <uwe@openbsd.org> @@ -630,6 +630,14 @@ rtsx_bus_clock(sdmmc_chipset_handle_t sch, int freq, int timing) goto ret; } + /* Round down to a supported frequency. */ + if (freq >= SDMMC_SDCLK_50MHZ) + freq = SDMMC_SDCLK_50MHZ; + else if (freq >= SDMMC_SDCLK_25MHZ) + freq = SDMMC_SDCLK_25MHZ; + else + freq = SDMMC_SDCLK_400KHZ; + /* * Configure the clock frequency. */ @@ -646,6 +654,12 @@ rtsx_bus_clock(sdmmc_chipset_handle_t sch, int freq, int timing) mcu = 7; RTSX_CLR(sc, RTSX_SD_CFG1, RTSX_CLK_DIVIDE_MASK); break; + case SDMMC_SDCLK_50MHZ: + n = 100; + div = RTSX_CLK_DIV_2; + mcu = 7; + RTSX_CLR(sc, RTSX_SD_CFG1, RTSX_CLK_DIVIDE_MASK); + break; default: error = EINVAL; goto ret; |