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authorPer Fogelstrom <pefo@cvs.openbsd.org>1997-10-10 10:56:42 +0000
committerPer Fogelstrom <pefo@cvs.openbsd.org>1997-10-10 10:56:42 +0000
commitde0429a09cb344980883e035261f491cb109060b (patch)
treec69c51037fbee23bac524afde3f98d50ca43305f
parent0869c3b92ec01e5f365bb8e5ed9f02173bd2a272 (diff)
Add a special fix for OpenFirmware Power PC PCI. It seems that OFW shuts
down the HW by disabling it when closing the device. So we have to make sure that the board is configured to respond to memory accesses.
-rw-r--r--sys/dev/pci/pci.c30
1 files changed, 29 insertions, 1 deletions
diff --git a/sys/dev/pci/pci.c b/sys/dev/pci/pci.c
index 29c9e453a5f..f36ec26d655 100644
--- a/sys/dev/pci/pci.c
+++ b/sys/dev/pci/pci.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: pci.c,v 1.6 1997/01/24 19:34:15 niklas Exp $ */
+/* $OpenBSD: pci.c,v 1.7 1997/10/10 10:56:41 pefo Exp $ */
/* $NetBSD: pci.c,v 1.26 1996/12/05 01:25:30 cgd Exp $ */
/*
@@ -263,6 +263,20 @@ pci_io_find(pc, pcitag, reg, iobasep, iosizep)
if (iosizep != NULL)
*iosizep = PCI_MAPREG_IO_SIZE(sizedata);
+#ifdef powerpc
+ /*
+ * Open Firmware (yuck) shuts down devices before entering a
+ * program so we need to bring them back 'online' to respond
+ * to bus accesses...
+ */
+ s = splhigh();
+ sizedata = pci_conf_read(pc, pcitag, PCI_COMMAND_STATUS_REG);
+ sizedata |= (PCI_COMMAND_MASTER_ENABLE | PCI_COMMAND_IO_ENABLE |
+ PCI_COMMAND_PARITY_ENABLE | PCI_COMMAND_SERR_ENABLE);
+ pci_conf_write(pc, pcitag, PCI_COMMAND_STATUS_REG, sizedata);
+ splx(s);
+#endif
+
return (0);
}
@@ -321,6 +335,20 @@ pci_mem_find(pc, pcitag, reg, membasep, memsizep, cacheablep)
if (cacheablep != NULL)
*cacheablep = PCI_MAPREG_MEM_CACHEABLE(addrdata);
+#ifdef power4e
+ /*
+ * Open Firmware (yuck) shuts down devices before entering a
+ * program so we need to bring them back 'online' to respond
+ * to bus accesses...
+ */
+ s = splhigh();
+ sizedata = pci_conf_read(pc, pcitag, PCI_COMMAND_STATUS_REG);
+ sizedata |= (PCI_COMMAND_MASTER_ENABLE | PCI_COMMAND_MEM_ENABLE |
+ PCI_COMMAND_PARITY_ENABLE | PCI_COMMAND_SERR_ENABLE);
+ pci_conf_write(pc, pcitag, PCI_COMMAND_STATUS_REG, sizedata);
+ splx(s);
+#endif
+
return 0;
}