diff options
author | Martin Pieuchot <mpi@cvs.openbsd.org> | 2015-04-27 07:20:58 +0000 |
---|---|---|
committer | Martin Pieuchot <mpi@cvs.openbsd.org> | 2015-04-27 07:20:58 +0000 |
commit | e4cb456b7970ad88d1c11b385e9f69c0327f0c9e (patch) | |
tree | ba416118fbe3c655630d53481606a6b38f961cba | |
parent | 786a01fab559f6ab4164e12f83db9bdfcef7a018 (diff) |
Correctly write the 64bits of the HID 1, 4 and 5 registers.
This makes the secondary cpu of my PowerMac as fast as the primary one,
and divide the build time by 3 with a GENERIC.MP kernel on MP G5s
Found thanks to MP kernel profiling.
ok dlg@, miod@
-rw-r--r-- | sys/arch/powerpc/powerpc/cpu_subr.c | 11 |
1 files changed, 7 insertions, 4 deletions
diff --git a/sys/arch/powerpc/powerpc/cpu_subr.c b/sys/arch/powerpc/powerpc/cpu_subr.c index 5f8235270c6..54c8bde0161 100644 --- a/sys/arch/powerpc/powerpc/cpu_subr.c +++ b/sys/arch/powerpc/powerpc/cpu_subr.c @@ -1,4 +1,4 @@ -/* $OpenBSD: cpu_subr.c,v 1.7 2015/03/31 16:00:38 mpi Exp $ */ +/* $OpenBSD: cpu_subr.c,v 1.8 2015/04/27 07:20:57 mpi Exp $ */ /* * Copyright (c) 2013 Martin Pieuchot @@ -215,7 +215,8 @@ ppc64_mfhid1(void) void ppc64_mthid1(u_int64_t val) { - __asm volatile ("mtspr 1009,%0; mtspr 1009,%0; isync;" :: "r" (val)); + __asm volatile ("sldi %0,%0,32; or %0,%0,%0+1;" + "mtspr 1009,%0; mtspr 1009,%0; isync;" :: "r" (val)); } u_int64_t @@ -231,7 +232,8 @@ ppc64_mfhid4(void) void ppc64_mthid4(u_int64_t val) { - __asm volatile ("sync; mtspr 1012,%0; isync;" :: "r" (val)); + __asm volatile ("sldi %0,%0,32; or %0,%0,%0+1;" + "sync; mtspr 1012,%0; isync;" :: "r" (val)); } u_int64_t @@ -247,5 +249,6 @@ ppc64_mfhid5(void) void ppc64_mthid5(u_int64_t val) { - __asm volatile ("sync; mtspr 1014,%0; isync;" :: "r" (val)); + __asm volatile ("sldi %0,%0,32; or %0,%0,%0+1;" + "sync; mtspr 1014,%0; isync;" :: "r" (val)); } |