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authorChristopher Pascoe <pascoe@cvs.openbsd.org>2006-04-04 11:33:41 +0000
committerChristopher Pascoe <pascoe@cvs.openbsd.org>2006-04-04 11:33:41 +0000
commite77b25a2b49dfe084c2608b361eb34901bb430ba (patch)
tree0a766d69042e2ed995f811856213a8de4bdc6ac2
parentd367fa3c6472b019c2e25ef9889792a1c70cac7c (diff)
Abort any DMA that is in progress before changing the DMA completion handler,
not after.
-rw-r--r--sys/arch/arm/xscale/pxa2x0_dmac.c10
1 files changed, 5 insertions, 5 deletions
diff --git a/sys/arch/arm/xscale/pxa2x0_dmac.c b/sys/arch/arm/xscale/pxa2x0_dmac.c
index a05aebe97eb..7b2c74087d1 100644
--- a/sys/arch/arm/xscale/pxa2x0_dmac.c
+++ b/sys/arch/arm/xscale/pxa2x0_dmac.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: pxa2x0_dmac.c,v 1.1 2005/04/14 23:40:34 pascoe Exp $ */
+/* $OpenBSD: pxa2x0_dmac.c,v 1.2 2006/04/04 11:33:40 pascoe Exp $ */
/*
* Copyright (c) 2005 Christopher Pascoe <pascoe@openbsd.org>
@@ -169,14 +169,14 @@ pxa2x0_dma_to_fifo(int periph, int chan, bus_addr_t fifo_addr, int width,
return EINVAL;
}
- /* Save handler for interrupt-on-completion. */
- sc->sc_intrhandlers[chan] = intr;
- sc->sc_intrargs[chan] = intrarg;
-
/* XXX: abort anything already in progress, hopefully nothing. */
bus_space_write_4(sc->sc_bust, sc->sc_bush, DMAC_DCSR(chan),
DCSR_NODESCFETCH);
+ /* Save handler for interrupt-on-completion. */
+ sc->sc_intrhandlers[chan] = intr;
+ sc->sc_intrargs[chan] = intrarg;
+
/* Map peripheral to channel for flow control setup. */
bus_space_write_4(sc->sc_bust, sc->sc_bush, DMAC_DRCMR(periph),
chan | DRCMR_MAPVLD);