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authorDavid Gwynne <dlg@cvs.openbsd.org>2014-03-27 05:34:08 +0000
committerDavid Gwynne <dlg@cvs.openbsd.org>2014-03-27 05:34:08 +0000
commitef114eae4cea638b0752b23a0011aab7aa6e467e (patch)
treec972487be2d96c3896ce3628c54442c120a4f3a5
parentedb838d9fec24d0335a0f899ad5bc92d63f729b3 (diff)
updating the reply queue indexes on the chip dont have any dependent
register ops, so dont need barriers around them.
-rw-r--r--sys/dev/pci/mpii.c12
1 files changed, 7 insertions, 5 deletions
diff --git a/sys/dev/pci/mpii.c b/sys/dev/pci/mpii.c
index 0486974b2e9..6d0ea71d192 100644
--- a/sys/dev/pci/mpii.c
+++ b/sys/dev/pci/mpii.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: mpii.c,v 1.83 2014/03/27 05:20:27 dlg Exp $ */
+/* $OpenBSD: mpii.c,v 1.84 2014/03/27 05:34:07 dlg Exp $ */
/*
* Copyright (c) 2010, 2012 Mike Belopuhov
* Copyright (c) 2009 James Giannoules
@@ -383,10 +383,12 @@ void mpii_refresh_sensors(void *);
#define mpii_reply_waiting(s) ((mpii_read_intr((s)) & MPII_INTR_STATUS_REPLY)\
== MPII_INTR_STATUS_REPLY)
-#define mpii_write_reply_free(s, v) mpii_write((s), \
- MPII_REPLY_FREE_HOST_INDEX, (v))
-#define mpii_write_reply_post(s, v) mpii_write((s), \
- MPII_REPLY_POST_HOST_INDEX, (v))
+#define mpii_write_reply_free(s, v) \
+ bus_space_write_4((s)->sc_iot, (s)->sc_ioh, \
+ MPII_REPLY_FREE_HOST_INDEX, (v))
+#define mpii_write_reply_post(s, v) \
+ bus_space_write_4((s)->sc_iot, (s)->sc_ioh, \
+ MPII_REPLY_POST_HOST_INDEX, (v))
#define mpii_wait_db_int(s) mpii_wait_ne((s), MPII_INTR_STATUS, \
MPII_INTR_STATUS_IOC2SYSDB, 0)