port registers

1 files changed, 33 insertions, 4 deletions

diff --git a/sys/dev/ic/silireg.h b/sys/dev/ic/silireg.h
index 952304f15eb..b5ae44908bf 100644
--- a/sys/dev/ic/silireg.h
+++ b/sys/dev/ic/silireg.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: silireg.h,v 1.4 2007/03/24 02:28:06 dlg Exp $ */
+/*	$OpenBSD: silireg.h,v 1.5 2007/03/24 02:42:21 dlg Exp $ */
 
 /*
  * Copyright (c) 2007 David Gwynne <dlg@openbsd.org>
@@ -16,10 +16,12 @@
  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  */
 
-#define SILI_PCI_BAR_GLOBAL	0x10
-#define SILI_PCI_BAR_PORT	0x14
-#define SILI_PCI_BAR_INDIRECT	0x18
+/* PCI Registers */
+#define SILI_PCI_BAR_GLOBAL	0x10 /* Global Registers address */
+#define SILI_PCI_BAR_PORT	0x14 /* Port Registers address */
+#define SILI_PCI_BAR_INDIRECT	0x18 /* Indirect IO Registers address */
 
+/* Global Registers */
 #define SILI_REG_PORT0_STATUS	0x00 /* Port 0 Slot Status */
 #define SILI_REG_PORT1_STATUS	0x04 /* Port 1 Slot Status */
 #define SILI_REG_PORT2_STATUS	0x08 /* Port 2 Slot Status */
@@ -35,3 +37,30 @@
 #define SILI_REG_GPIOCTL	SILI_REG_FLASHDATA
 #define SILI_REG_IICADDR	0x78 /* I2C Address */
 #define SILI_REG_IIC		0x7c /* I2C Data / Control */
+
+/* Port Registers */
+#define SILI_PREG_LRAM		0x0000 /* Port LRAM */
+	/* XXX 31 slots and port multiplier stuff sits in here */
+#define SILI_PREG_PCS		0x1000 /* Port Control Set / Status */
+#define SILI_PREG_PCC		0x1004 /* Port Control Clear */
+#define SILI_PREG_IS		0x1008 /* Interrupt Status */
+#define SILI_PREG_IES		0x1008 /* Interrupt Enable Set */
+#define SILI_PREG_IEC		0x1008 /* Interrupt Enable Clear */
+#define SILI_PREG_AUA		0x101c /* Activation Upper Address */
+#define SILI_PREG_FIFO		0x1020 /* Command Execution FIFO */
+#define SILI_PREG_CE		0x1024 /* Command Error */
+#define SILI_PREG_FC		0x1028 /* FIS Configuration */
+#define SILI_PREG_RFT		0x102c /* Request FIFO Threshold */
+#define SILI_PREG_DEC		0x1040 /* 8b/10b Decode Error Counter */
+#define SILI_PREG_CEC		0x1044 /* CRC Error Counter */
+#define SILI_PREG_HEC		0x1048 /* Handshake Error Counter */
+#define SILI_PREG_PHYCONF	0x1050 /* Port PHY Configuration */
+#define SILI_PREG_PSS		0x1800 /* Port Slot Status */
+#define SILI_PREG_CAR		0x1c00 /* Command Activation Registers */
+	/* XXX up to 0x1cf7 is more of these */
+#define SILI_PREG_CONTEXT	0x1e0f /* Port Context Register */
+#define SILI_PREG_SCTL		0x1f00 /* SControl */
+#define SILI_PREG_SSTS		0x1f04 /* SStatus */
+#define SILI_PREG_SERR		0x1f08 /* SError */
+#define SILI_PREG_SACT		0x1f0c /* SActive */
+