more includes

16 files changed, 1309 insertions, 11 deletions

diff --git a/sys/arch/hppa/include/asm.h b/sys/arch/hppa/include/asm.h
index 3ef3978adb6..48dec59f33e 100644
--- a/sys/arch/hppa/include/asm.h
+++ b/sys/arch/hppa/include/asm.h
@@ -1,3 +1,5 @@
+/*	$OpenBSD: asm.h,v 1.2 1998/07/07 21:32:37 mickey Exp $	*/
+
 /* 
  * Copyright (c) 1990,1991,1994 The University of Utah and
  * the Computer Systems Laboratory (CSL).  All rights reserved.
diff --git a/sys/arch/hppa/include/autoconf.h b/sys/arch/hppa/include/autoconf.h
new file mode 100644
index 00000000000..a4a7324e006
--- /dev/null
+++ b/sys/arch/hppa/include/autoconf.h
@@ -0,0 +1,9 @@
+/*	$OpenBSD: autoconf.h,v 1.1 1998/07/07 21:32:38 mickey Exp $	*/
+
+
+struct pdc_tod;
+
+void	configure	__P((void));
+void	dumpconf	__P((void));
+void	pdc_iodc __P((int (*)__P((void)), int, ...));
+
diff --git a/sys/arch/hppa/include/break.h b/sys/arch/hppa/include/break.h
new file mode 100644
index 00000000000..8691a9dcda3
--- /dev/null
+++ b/sys/arch/hppa/include/break.h
@@ -0,0 +1,66 @@
+/*	$OpenBSD: break.h,v 1.1 1998/07/07 21:32:38 mickey Exp $	*/
+
+/* 
+ * Copyright (c) 1990, 1991, 1994 The University of Utah and
+ * the Computer Systems Laboratory at the University of Utah (CSL).
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify and distribute this software is hereby
+ * granted provided that (1) source code retains these copyright, permission,
+ * and disclaimer notices, and (2) redistributions including binaries
+ * reproduce the notices in supporting documentation, and (3) all advertising
+ * materials mentioning features or use of this software display the following
+ * acknowledgement: ``This product includes software developed by the
+ * Computer Systems Laboratory at the University of Utah.''
+ *
+ * THE UNIVERSITY OF UTAH AND CSL ALLOW FREE USE OF THIS SOFTWARE IN ITS "AS
+ * IS" CONDITION.  THE UNIVERSITY OF UTAH AND CSL DISCLAIM ANY LIABILITY OF
+ * ANY KIND FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
+ *
+ * CSL requests users of this software to return to csl-dist@cs.utah.edu any
+ * improvements that they make and grant CSL redistribution rights.
+ *
+ * 	Utah $Hdr: break.h 1.10 94/12/14$
+ *	Author: Bob Wheeler, University of Utah CSL
+ */
+
+/*
+ *	Values for break instructions
+ */
+
+/*
+ * values for the im5 field of the break instruction
+ */
+#define BREAK_KERNEL	0
+#define BREAK_MAYDEBUG	31	/* Reserved for Mayfly debugger. */
+
+/*
+ * values for the im13 field of the break instruction
+ *
+ * BREAK_PDC_CALL calls the PDC routine. Users should use the routine 
+ * pdc_call() which sets up the registers for this call. 
+ */
+#define BREAK_PDC_CALL		1
+#define BREAK_PDC_DUMP  	2
+#define BREAK_KERNTRACE		3
+#define BREAK_MACH_DEBUGGER	4
+#define BREAK_KGDB		5
+#define BREAK_KERNPRINT		6
+#define BREAK_IVA		7
+#define BREAK_PDC_IODC_CALL	8
+#define BREAK_GDB		8	/* Standard GDB breakpoint.  */
+#define	BREAK_THREAD_SETSTATE	9	/* XXX */
+
+/*
+ * Tear apart a break instruction to find its type.
+ */
+#define break5(x)	((x) & 0x1F)
+#define break13(x)	(((x) >> 13) & 0x1FFF)
+
+/*
+ * Trace debugging.
+ */
+#define TRACE_OFF	0
+#define TRACE_JUMP      -1
+#define TRACE_SUSPEND   -2
+#define TRACE_RESUME    -3
diff --git a/sys/arch/hppa/include/cpu.h b/sys/arch/hppa/include/cpu.h
index aaf7e2bbbc8..d2b3ff088db 100644
--- a/sys/arch/hppa/include/cpu.h
+++ b/sys/arch/hppa/include/cpu.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: cpu.h,v 1.1 1998/06/23 19:45:20 mickey Exp $	*/
+/*	$OpenBSD: cpu.h,v 1.2 1998/07/07 21:32:38 mickey Exp $	*/
 
 /* 
  * Copyright (c) 1988-1994, The University of Utah and
@@ -23,6 +23,9 @@
  * 	Utah $Hdr: cpu.h 1.19 94/12/16$
  */
 
+#ifndef	_HPPA_CPU_H_
+#define	_HPPA_CPU_H_
+
 #include <machine/frame.h>
 
 /*
@@ -83,6 +86,11 @@
 #define	HP_743v_2	0x618
 #define	HP_743i_3	0x619
 
+#define	CPU_M770_100	0x585   /* J-class J200 */
+#define	CPU_M770_120	0x586   /* J-class J210 */
+#define	CPU_M777_100	0x592   /* C-class C200 */
+#define	CPU_M777_120	0x58E   /* C-class C210 */
+
 #define	HPPA_IOSPACE	0xf0000000
 #define	HPPA_IOBCAST	0xfffc0000
 #define	HPPA_PDC_LOW	0xef000000
@@ -104,6 +112,15 @@
 #define	need_proftick(p)	{(void)(p);}
 
 /*
+ * Expected (and optimized for) cache line size (in bytes).
+ */
+#define CACHE_LINE_SIZE 32
+
+#ifdef _KERNEL
+void	hppa_init __P((void));
+#endif
+
+/*
  * Boot arguments stuff
  */
 
@@ -120,3 +137,5 @@
 	{ 0, 0 }, \
 	{ "console_device", CTLTYPE_STRUCT }, \
 }
+
+#endif /* _HPPA_CPU_H_ */
diff --git a/sys/arch/hppa/include/cpufunc.h b/sys/arch/hppa/include/cpufunc.h
new file mode 100644
index 00000000000..4caa651bd6a
--- /dev/null
+++ b/sys/arch/hppa/include/cpufunc.h
@@ -0,0 +1,512 @@
+/*	$OpenBSD: cpufunc.h,v 1.1 1998/07/07 21:32:40 mickey Exp $	*/
+
+/*
+ *  (c) Copyright 1988 HEWLETT-PACKARD COMPANY
+ *
+ *  To anyone who acknowledges that this file is provided "AS IS"
+ *  without any express or implied warranty:
+ *      permission to use, copy, modify, and distribute this file
+ *  for any purpose is hereby granted without fee, provided that
+ *  the above copyright notice and this notice appears in all
+ *  copies, and that the name of Hewlett-Packard Company not be
+ *  used in advertising or publicity pertaining to distribution
+ *  of the software without specific, written prior permission.
+ *  Hewlett-Packard Company makes no representations about the
+ *  suitability of this software for any purpose.
+ */
+
+/*
+ * Copyright (c) 1990,1994 The University of Utah and
+ * the Computer Systems Laboratory (CSL).  All rights reserved.
+ *
+ * THE UNIVERSITY OF UTAH AND CSL PROVIDE THIS SOFTWARE IN ITS "AS IS"
+ * CONDITION, AND DISCLAIM ANY LIABILITY OF ANY KIND FOR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM ITS USE.
+ *
+ * CSL requests users of this software to return to csl-dist@cs.utah.edu any
+ * improvements that they make and grant CSL redistribution rights.
+ *
+ * 	Utah $Hdr: c_support.s 1.8 94/12/14$
+ *	Author: Bob Wheeler, University of Utah CSL
+ */
+
+/*
+ * hppa routines to move to and from control registers from C
+ */
+
+
+/*
+ * Get space register for an address
+ */
+
+static __inline u_int ldsid(vm_offset_t p) {
+	register u_int ret;
+	__asm __volatile("ldsid (%1),%0" : "=r" (p) : "r" (ret));
+	return ret;
+}
+
+/*
+ * Move the specified value into the control register. The register is taken
+ * modulo 32. If the register is invalid the operation is ignored.
+ */
+static __inline void mtctl(int reg, int value) {
+	reg %= 32;
+	if (reg == 0)
+		__asm __volatile("mtctl %0, cr0" : : "r" (value));
+	else if (reg > 7)
+		;
+#if 0
+	bv 0(r2)
+	mtctl	arg1,cr8
+	bv 0(r2)
+	mtctl	arg1,cr9
+	bv 0(r2)
+	mtctl	arg1,cr10
+	bv 0(r2)
+	mtctl	arg1,cr11
+	bv 0(r2)
+	mtctl	arg1,cr12
+	bv 0(r2)
+	mtctl	arg1,cr13
+	bv 0(r2)
+	mtctl	arg1,cr14
+	bv 0(r2)
+	mtctl	arg1,cr15
+	bv 0(r2)
+	mtctl	arg1,cr16
+	bv 0(r2)
+	mtctl	arg1,cr17
+	bv 0(r2)
+	mtctl	arg1,cr18
+	bv 0(r2)
+	mtctl	arg1,cr19
+	bv 0(r2)
+	mtctl	arg1,cr20
+	bv 0(r2)
+	mtctl	arg1,cr21
+	bv 0(r2)
+	mtctl	arg1,cr22
+	bv 0(r2)
+	mtctl	arg1,cr23
+	bv 0(r2)
+	mtctl	arg1,cr24
+	bv 0(r2)
+	mtctl	arg1,cr25
+	bv 0(r2)
+	mtctl	arg1,cr26
+	bv 0(r2)
+	mtctl	arg1,cr27
+	bv 0(r2)
+	mtctl	arg1,cr28
+	bv 0(r2)
+	mtctl	arg1,cr29
+	bv 0(r2)
+	mtctl	arg1,cr30
+	bv 0(r2)
+	mtctl	arg1,cr31
+#endif
+}
+
+/*
+ * Return the contents of the specified control register. The register is taken
+ * modulo 32. If the register is invalid the operation is ignored.
+ */
+
+static __inline u_int mfctl(int reg) {
+	register u_int ret;
+	reg %= 32;
+	if (reg == 0)
+		__asm __volatile("mfctl cr0,%0" : "=r" (ret));
+	else if (reg > 7)
+		;
+#if 0
+	bv	0(r2)
+	mfctl	cr8,ret0
+	bv	0(r2)
+	mfctl	cr9,ret0
+	bv	0(r2)
+	mfctl	cr10,ret0
+	bv	0(r2)
+	mfctl	cr11,ret0
+	bv	0(r2)
+	mfctl	cr12,ret0
+	bv	0(r2)
+	mfctl	cr13,ret0
+	bv	0(r2)
+	mfctl	cr14,ret0
+	bv	0(r2)
+	mfctl	cr15,ret0
+	bv	0(r2)
+	mfctl	cr16,ret0
+	bv	0(r2)
+	mfctl	cr17,ret0
+	bv	0(r2)
+	mfctl	cr18,ret0
+	bv	0(r2)
+	mfctl	cr19,ret0
+	bv	0(r2)
+	mfctl	cr20,ret0
+	bv	0(r2)
+	mfctl	cr21,ret0
+	bv	0(r2)
+	mfctl	cr22,ret0
+	bv	0(r2)
+	mfctl	cr23,ret0
+	bv	0(r2)
+	mfctl	cr24,ret0
+	bv	0(r2)
+	mfctl	cr25,ret0
+	bv	0(r2)
+	mfctl	cr26,ret0
+	bv	0(r2)
+	mfctl	cr27,ret0
+	bv	0(r2)
+	mfctl	cr28,ret0
+	bv	0(r2)
+	mfctl	cr29,ret0
+	bv	0(r2)
+	mfctl	cr30,ret0
+	bv	0(r2)
+	mfctl	cr31,ret0
+#endif
+	return ret;
+}
+
+#if 0
+/*
+ * int mtsp(sr, value)
+ *	int	sr;
+ *	int	value;
+ *
+ * Move the specified value into a space register. The space register is taken
+ * modulo 8.
+ */
+
+	.export	mtsp,entry
+	.proc
+	.callinfo
+mtsp
+
+/*
+ * take the register number modulo 8
+ */
+	ldi	7,t1
+	and	t1,arg0,arg0
+
+/*
+ * write the value to the specified register
+ */
+
+	blr,n	arg0,r0
+	nop
+
+	bv	0(r2)
+	mtsp	arg1,sr0
+	bv	0(r2)
+	mtsp	arg1,sr1
+	bv	0(r2)
+	mtsp	arg1,sr2
+	bv	0(r2)
+	mtsp	arg1,sr3
+	bv	0(r2)
+	mtsp	arg1,sr4
+	bv	0(r2)
+	mtsp	arg1,sr5
+	bv	0(r2)
+	mtsp	arg1,sr6
+	bv	0(r2)
+	mtsp	arg1,sr7
+
+	.procend
+
+
+/*
+ * int mfsr(reg)
+ *	int	reg;
+ *
+ * Return the contents of the specified space register. The space register is 
+ * taken modulo 8.
+ */
+
+	.export	mfsp,entry
+	.proc
+	.callinfo
+mfsp
+
+/*
+ * take the register number modulo 8
+ */
+	ldi	7,t1
+	and	t1,arg0,arg0
+
+/*
+ * write the value to the specified register
+ */
+
+	blr,n	arg0,r0
+	nop
+
+	bv	0(r2)
+	mfsp	sr0,ret0
+	bv	0(r2)
+	mfsp	sr1,ret0
+	bv	0(r2)
+	mfsp	sr2,ret0
+	bv	0(r2)
+	mfsp	sr3,ret0
+	bv	0(r2)
+	mfsp	sr4,ret0
+	bv	0(r2)
+	mfsp	sr5,ret0
+	bv	0(r2)
+	mfsp	sr6,ret0
+	bv	0(r2)
+	mfsp	sr7,ret0
+
+	.procend
+
+
+/*
+ * int ssm(mask)
+ *	int	mask;
+ *
+ * Set system mask. This call will not set the Q bit even if it is 
+ * specified.
+ *
+ * Returns the old system mask
+ */
+
+	.export	ssm,entry
+	.proc
+	.callinfo
+ssm
+
+/*
+ * look at only the lower 5 bits of the mask
+ */
+	ldi	31,t1
+	and	t1,arg0,arg0
+
+
+/*
+ * Set System Mask and Return
+ */
+
+	blr,n	arg0,r0
+	nop
+
+	bv	0(r2)
+	ssm	0,ret0
+	bv	0(r2)
+	ssm	1,ret0
+	bv	0(r2)
+	ssm	2,ret0
+	bv	0(r2)
+	ssm	3,ret0
+	bv	0(r2)
+	ssm	4,ret0
+	bv	0(r2)
+	ssm	5,ret0
+	bv	0(r2)
+	ssm	6,ret0
+	bv	0(r2)
+	ssm	7,ret0
+	bv	0(r2)
+	ssm	0,ret0		/* can't set Q bit with ssm */
+	bv	0(r2)
+	ssm	1,ret0		/* can't set Q bit with ssm */
+	bv	0(r2)
+	ssm	2,ret0		/* can't set Q bit with ssm */
+	bv	0(r2)
+	ssm	3,ret0		/* can't set Q bit with ssm */
+	bv	0(r2)
+	ssm	4,ret0		/* can't set Q bit with ssm */
+	bv	0(r2)
+	ssm	5,ret0		/* can't set Q bit with ssm */
+	bv	0(r2)
+	ssm	6,ret0		/* can't set Q bit with ssm */
+	bv	0(r2)
+	ssm	7,ret0		/* can't set Q bit with ssm */
+	bv	0(r2)
+	ssm	16,ret0
+	bv	0(r2)
+	ssm	17,ret0
+	bv	0(r2)
+	ssm	18,ret0
+	bv	0(r2)
+	ssm	19,ret0
+	bv	0(r2)
+	ssm	20,ret0
+	bv	0(r2)
+	ssm	21,ret0
+	bv	0(r2)
+	ssm	22,ret0
+	bv	0(r2)
+	ssm	23,ret0
+	bv	0(r2)
+	ssm	16,ret0		/* can't set Q bit with ssm */
+	bv	0(r2)
+	ssm	17,ret0		/* can't set Q bit with ssm */
+	bv	0(r2)
+	ssm	18,ret0		/* can't set Q bit with ssm */
+	bv	0(r2)
+	ssm	19,ret0		/* can't set Q bit with ssm */
+	bv	0(r2)
+	ssm	20,ret0		/* can't set Q bit with ssm */
+	bv	0(r2)
+	ssm	21,ret0		/* can't set Q bit with ssm */
+	bv	0(r2)
+	ssm	22,ret0		/* can't set Q bit with ssm */
+	bv	0(r2)
+	ssm	23,ret0		/* can't set Q bit with ssm */
+
+	.procend
+
+
+/*
+ * int rsm(mask)
+ *	int	mask;
+ *
+ * Reset system mask. 
+ *
+ * Returns the old system mask
+ */
+
+	.export	rsm,entry
+	.proc
+	.callinfo
+rsm
+
+/*
+ * look at only the lower 5 bits of the mask
+ */
+	ldi	31,t1
+	and	t1,arg0,arg0
+
+/*
+ * Set System Mask and Return
+ */
+
+	blr,n	arg0,r0
+	nop
+
+	bv	0(r2)
+	rsm	0,ret0
+	bv	0(r2)
+	rsm	1,ret0
+	bv	0(r2)
+	rsm	2,ret0
+	bv	0(r2)
+	rsm	3,ret0
+	bv	0(r2)
+	rsm	4,ret0
+	bv	0(r2)
+	rsm	5,ret0
+	bv	0(r2)
+	rsm	6,ret0
+	bv	0(r2)
+	rsm	7,ret0
+	bv	0(r2)
+	rsm	8,ret0
+	bv	0(r2)
+	rsm	9,ret0
+	bv	0(r2)
+	rsm	10,ret0
+	bv	0(r2)
+	rsm	11,ret0
+	bv	0(r2)
+	rsm	12,ret0
+	bv	0(r2)
+	rsm	13,ret0
+	bv	0(r2)
+	rsm	14,ret0
+	bv	0(r2)
+	rsm	15,ret0
+	bv	0(r2)
+	rsm	16,ret0
+	bv	0(r2)
+	rsm	17,ret0
+	bv	0(r2)
+	rsm	18,ret0
+	bv	0(r2)
+	rsm	19,ret0
+	bv	0(r2)
+	rsm	20,ret0
+	bv	0(r2)
+	rsm	21,ret0
+	bv	0(r2)
+	rsm	22,ret0
+	bv	0(r2)
+	rsm	23,ret0
+	bv	0(r2)
+	rsm	24,ret0
+	bv	0(r2)
+	rsm	25,ret0
+	bv	0(r2)
+	rsm	26,ret0
+	bv	0(r2)
+	rsm	27,ret0
+	bv	0(r2)
+	rsm	28,ret0
+	bv	0(r2)
+	rsm	29,ret0
+	bv	0(r2)
+	rsm	30,ret0
+	bv	0(r2)
+	rsm	31,ret0
+
+	.procend
+
+
+/*
+ * int mtsm(mask)
+ *	int mask;
+ *
+ * Move to system mask. Old value of system mask is returned.
+ */
+
+	.export	mtsm,entry
+	.proc
+	.callinfo
+mtsm
+
+/* 
+ * Move System Mask and Return
+ */
+	ssm	0,ret0
+	bv	0(r2)
+	mtsm	arg0
+
+	.procend
+#endif
+
+static __inline void
+ficache(pa_space_t space, vm_offset_t off, vm_size_t size)
+{
+
+}
+
+static __inline void
+fdcache(pa_space_t space, vm_offset_t off, vm_size_t size)
+{
+
+}
+
+static __inline void
+pitlb(pa_space_t sp, vm_offset_t off)
+{
+
+}
+
+static __inline void
+pdtlb(pa_space_t sp, vm_offset_t off)
+{
+
+}
+
+void phys_page_copy __P((vm_offset_t, vm_offset_t));
+void phys_bzero __P((vm_offset_t, vm_size_t));
+void lpage_copy __P((int, pa_space_t, vm_offset_t, vm_offset_t));
+void lpage_zero __P((int, vm_offset_t, pa_space_t));
+
+
diff --git a/sys/arch/hppa/include/frame.h b/sys/arch/hppa/include/frame.h
index bb7f5173338..836523ce7c4 100644
--- a/sys/arch/hppa/include/frame.h
+++ b/sys/arch/hppa/include/frame.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: frame.h,v 1.1 1998/06/23 19:45:22 mickey Exp $	*/
+/*	$OpenBSD: frame.h,v 1.2 1998/07/07 21:32:40 mickey Exp $	*/
 
 
 #ifndef _HPPA_FRAME_H_
@@ -6,9 +6,71 @@
 
 #define	FRAME_PC	0
 
+#ifndef _LOCORE
 struct trapframe {
-	int i;
+	u_int	flags;
+	u_int	r1;
+	u_int	rp;          /* r2 */
+	u_int	r3;          /* frame pointer when -g */
+	u_int	r4;
+	u_int	r5;
+	u_int	r6;
+	u_int	r7;
+	u_int	r8;
+	u_int	r9;
+	u_int	r10;
+	u_int	r11;
+	u_int	r12;
+	u_int	r13;
+	u_int	r14;
+	u_int	r15;
+	u_int	r16;
+	u_int	r17;
+	u_int	r18;
+	u_int	t4;          /* r19 */
+	u_int	t3;          /* r20 */
+	u_int	t2;          /* r21 */
+	u_int	t1;          /* r22 */
+	u_int	arg3;        /* r23 */
+	u_int	arg2;        /* r24 */
+	u_int	arg1;	      /* r25 */
+	u_int	arg0;	      /* r26 */
+	u_int	dp;	      /* r27 */
+	u_int	ret0;	      /* r28 */
+	u_int	ret1;	      /* r29 */
+	u_int	sp;	      /* r30 */
+	u_int	r31;
+	u_int	sar;	      /* cr11 */
+	u_int	iioq_head;
+	u_int	iisq_head;
+	u_int	iioq_tail;
+	u_int	iisq_tail;
+	u_int	eiem;        /* cr15 */
+	u_int	iir;         /* cr19 */
+	u_int	isr;         /* cr20 */
+	u_int	ior;         /* cr21 */
+	u_int	ipsw;	      /* cr22 */
+	u_int	sr4;
+	u_int	sr0;
+	u_int	sr1;
+	u_int	sr2;
+	u_int	sr3;
+	u_int	sr5;
+	u_int	sr6;
+	u_int	sr7;
+	u_int	rctr;         /* cr0 */
+	u_int	pidr1;        /* cr8 */
+	u_int	pidr2;        /* cr9 */
+	u_int	ccr;	       /* cr10 */
+	u_int	pidr3;        /* cr12 */
+	u_int	pidr4;        /* cr13 */
+	u_int	ptov;         /* cr24 */
+	u_int	tr1;          /* cr25 */
+	u_int	tr2;          /* cr26 */
+	u_int	fpu; 
+
 	int tf_regs[10];
 };
+#endif /* !_LOCORE */
 
-#endif
+#endif /* !_HPPA_FRAME_H_ */
diff --git a/sys/arch/hppa/include/intr.h b/sys/arch/hppa/include/intr.h
index 2366b4cf40f..949f41d1f98 100644
--- a/sys/arch/hppa/include/intr.h
+++ b/sys/arch/hppa/include/intr.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: intr.h,v 1.1 1998/06/23 19:45:22 mickey Exp $	*/
+/*	$OpenBSD: intr.h,v 1.2 1998/07/07 21:32:41 mickey Exp $	*/
 
 /* 
  * Copyright (c) 1990,1991,1992,1994 The University of Utah and
@@ -206,9 +206,6 @@ int	splx __P((int));
 #define	setsoftclock()		(PAGE0->mem_hpa->io_eir = SPL_IBIT_SOFTCLK)
 #define	setsoftnet()		(void)(1)
 
-void	mtctl __P((u_int, u_int));
-u_int	mfctl __P((u_int));
-
 /*
  * BASEPRI is true when the specified EIEM is equal to the SPL level of
  * the idle loop in swtch() (i.e. SPL0).
diff --git a/sys/arch/hppa/include/pcb.h b/sys/arch/hppa/include/pcb.h
new file mode 100644
index 00000000000..a850be869bc
--- /dev/null
+++ b/sys/arch/hppa/include/pcb.h
@@ -0,0 +1,12 @@
+/*	$OpenBSD: pcb.h,v 1.1 1998/07/07 21:32:43 mickey Exp $	*/
+
+
+struct pcb {
+	int i;
+};
+
+
+struct md_coredump {
+	struct  trapframe md_tf;
+}; 
+
diff --git a/sys/arch/hppa/include/pdc.h b/sys/arch/hppa/include/pdc.h
index c3f6228df60..5f7e69629f7 100644
--- a/sys/arch/hppa/include/pdc.h
+++ b/sys/arch/hppa/include/pdc.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: pdc.h,v 1.1 1998/06/23 19:45:25 mickey Exp $	*/
+/*	$OpenBSD: pdc.h,v 1.2 1998/07/07 21:32:43 mickey Exp $	*/
 
 /*
  * Copyright (c) 1990 mt Xinu, Inc.  All rights reserved.
@@ -434,7 +434,7 @@ struct pz_device {
 #define	pz_layers	pz_dp.dp_layers
 	struct iomod *pz_hpa;	/* HPA base address of device */
 	caddr_t	pz_spa;		/* SPA base address (zero if no SPA exists) */
-	int	(*pz_iodc_io)();/* entry point of device's driver routines */
+	int	(*pz_iodc_io) __P((int, ...));/* entry point of device's driver routines */
 	short	pz_resv;	/* (reserved) */
 	u_short	pz_class;	/* (see below) */
 };
@@ -455,7 +455,7 @@ struct pz_device {
 	delay(5000000); \
 }
 
-extern int (*pdc)();
+extern int (*pdc) __P((int, ...));
 
 #endif	/* !(_LOCORE || ASSEMBLER) */
 
diff --git a/sys/arch/hppa/include/pmap.h b/sys/arch/hppa/include/pmap.h
new file mode 100644
index 00000000000..9486fedbaea
--- /dev/null
+++ b/sys/arch/hppa/include/pmap.h
@@ -0,0 +1,162 @@
+/*	$OpenBSD: pmap.h,v 1.1 1998/07/07 21:32:44 mickey Exp $	*/
+
+/* 
+ * Copyright (c) 1990,1993,1994 The University of Utah and
+ * the Computer Systems Laboratory at the University of Utah (CSL).
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify and distribute this software is hereby
+ * granted provided that (1) source code retains these copyright, permission,
+ * and disclaimer notices, and (2) redistributions including binaries
+ * reproduce the notices in supporting documentation, and (3) all advertising
+ * materials mentioning features or use of this software display the following
+ * acknowledgement: ``This product includes software developed by the
+ * Computer Systems Laboratory at the University of Utah.''
+ *
+ * THE UNIVERSITY OF UTAH AND CSL ALLOW FREE USE OF THIS SOFTWARE IN ITS "AS
+ * IS" CONDITION.  THE UNIVERSITY OF UTAH AND CSL DISCLAIM ANY LIABILITY OF
+ * ANY KIND FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
+ *
+ * CSL requests users of this software to return to csl-dist@cs.utah.edu any
+ * improvements that they make and grant CSL redistribution rights.
+ *
+ * 	Utah $Hdr: pmap.h 1.24 94/12/14$
+ *	Author: Mike Hibler, Bob Wheeler, University of Utah CSL, 9/90
+ */
+
+/*
+ *	Pmap header for hppa.
+ */
+
+#ifndef	_HPPA_PMAP_H_
+#define	_HPPA_PMAP_H_
+
+#include <sys/queue.h>
+
+#define EQUIV_HACK	/* no multiple mapping of kernel equiv space allowed */
+
+#ifdef hp700
+#define BTLB		/* Use block TLBs: PA 1.1 and above */
+#define HPT		/* Hashed (Hardware) Page Table */
+#define USEALIGNMENT	/* Take advantage of cache alignment for optimization */
+#endif
+
+/*
+ * Virtual to physical mapping macros/structures.
+ * IMPORTANT NOTE: there is one mapping per HW page, not per MACH page.
+ */
+
+#define HPPA_HASHSIZE		4096	/* size of hash table */
+#define HPPA_HASHSIZE_LOG2	12
+#define HPPA_MIN_MPP		2	/* min # of mappings per phys page */
+
+/*
+ * This hash function is the one used by the hardware TLB walker on the 7100.
+ */
+#define pmap_hash(space, offset) \
+	(((u_int)(space) << 5 ^ (u_int)(offset) >> PGSHIFT) & (HPPA_HASHSIZE-1))
+
+/*
+ * Do not change these structures unless you change the assembly code in
+ * locore.s
+ */
+struct mapping {
+	TAILQ_ENTRY(mapping) hash_link;	/* hash table links */
+	TAILQ_ENTRY(mapping) phys_link;	/* for mappings of a given PA */
+	pa_space_t	map_space;	/* virtual space */
+	vm_offset_t	map_offset;	/* virtual page number */
+	u_int		map_tlbpage;	/* physical page (for TLB load) */
+	u_int		map_tlbprot;	/* prot/access rights (for TLB load) */
+	u_int		map_tlbsw;	/* */
+};
+
+/* XXX could be in vm_param.h */
+
+#define HPPA_QUADBYTES		0x40000000
+#define	hppa_round_quad(x)	((((unsigned)(x)) + HPPA_QUADBYTES-1) & \
+					~(HPPA_QUADBYTES-1))
+#define hppa_trunc_quad(x)	(((unsigned)(x)) & ~(HPPA_QUADBYTES-1))
+
+struct pmap {
+	simple_lock_data_t	lock;	     /* lock on pmap */
+	int			ref_count;   /* reference count */
+	pa_space_t		space;	     /* space for this pmap */
+	int			pid;	     /* protection id for pmap */
+	struct pmap		*next;	     /* linked list of free pmaps */
+	struct pmap_statistics	stats;	     /* statistics */
+	TAILQ_ENTRY(pmap)	pmap_link;   /* hashed list of pmaps */
+};
+
+typedef struct pmap *pmap_t;
+
+extern struct pmap	kernel_pmap_store;
+
+
+struct vtop_entry {
+	TAILQ_HEAD(, mapping)	hash_link;	/* head of vtop chain */
+};
+#define vtop_next	hash_link.tqe_next
+#define vtop_prev	hash_link.tqe_prev
+
+struct phys_entry {
+	TAILQ_HEAD(, mapping) phys_link; /* head of mappings of a given PA */
+	struct mapping	*writer;	/* mapping with R/W access */
+	unsigned	tlbprot;	/* TLB format protection */
+};
+
+
+#ifdef 	HPT
+/*
+ * If HPT is defined, we cache the last miss for each bucket using a
+ * structure defined for the 7100 hardware TLB walker. On non-7100s, this
+ * acts as a software cache that cuts down on the number of times we have
+ * to search the vtop chain. (thereby reducing the number of instructions
+ * and cache misses incurred during the TLB miss).
+ *
+ * The vtop_entry pointer is the address of the associated vtop table entry.
+ * This avoids having to reform the address into the new table on a cache
+ * miss.
+ */
+struct hpt_entry {
+	unsigned	valid:1,	/* Valid bit */
+			vpn:15,		/* Virtual Page Number */
+			space:16;	/* Space ID */
+	unsigned	tlbprot;	/* prot/access rights (for TLB load) */
+	unsigned	tlbpage;	/* physical page (for TLB load) */
+	unsigned	vtop_entry;	/* Pointer to associated VTOP entry */
+};
+#endif
+
+#define HPT_SHIFT	27		/* 16 byte entry (31-4) */
+#define VTOP_SHIFT	28		/* 8  byte entry (31-3) */
+#define HPT_LEN		HPPA_HASHSIZE_LOG2
+#define VTOP_LEN	HPPA_HASHSIZE_LOG2
+
+#define MAX_PID		0xfffa
+#define	HPPA_SID_KERNEL  0
+#define	HPPA_PID_KERNEL  2
+
+#define KERNEL_ACCESS_ID 1
+
+
+#define KERNEL_TEXT_PROT (TLB_AR_KRX | (KERNEL_ACCESS_ID << 1))
+#define KERNEL_DATA_PROT (TLB_AR_KRW | (KERNEL_ACCESS_ID << 1))
+
+/* Block TLB flags */
+#define BLK_ICACHE	0
+#define BLK_DCACHE	1
+#define BLK_COMBINED	2
+#define BLK_LCOMBINED	3
+
+#define pmap_kernel()			(&kernel_pmap_store)
+#define	pmap_resident_count(pmap)	((pmap)->stats.resident_count)
+#define pmap_remove_attributes(pmap,start,end)
+#define pmap_copy(dpmap,spmap,da,len,sa)
+#define	pmap_update()
+
+#define pmap_phys_address(x)	((x) << PGSHIFT)
+#define pmap_phys_to_frame(x)	((x) >> PGSHIFT)
+
+#define cache_align(x)		(((x) + 64) & ~(64 - 1))
+
+#endif	/* _HPPA_PMAP_H_ */
diff --git a/sys/arch/hppa/include/proc.h b/sys/arch/hppa/include/proc.h
new file mode 100644
index 00000000000..50192dc6da3
--- /dev/null
+++ b/sys/arch/hppa/include/proc.h
@@ -0,0 +1,47 @@
+/*	$OpenBSD: proc.h,v 1.1 1998/07/07 21:32:44 mickey Exp $	*/
+
+/*
+ * Copyright (c) 1992, 1993
+ *	The Regents of the University of California.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *    must display the following acknowledgement:
+ *	This product includes software developed by the University of
+ *	California, Berkeley and its contributors.
+ * 4. Neither the name of the University nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ *	@(#)proc.h      7.1 (Berkeley) 5/15/91
+ */
+
+/*
+ * Machine-dependent part of the proc structure for hppa.
+ */
+struct mdproc {
+	struct	trapframe *md_regs;	/* registers on current frame */
+	int	md_flags;		/* machine-dependent flags */
+};
+
+/* md_flags */
+
diff --git a/sys/arch/hppa/include/psl.h b/sys/arch/hppa/include/psl.h
new file mode 100644
index 00000000000..97735a4332b
--- /dev/null
+++ b/sys/arch/hppa/include/psl.h
@@ -0,0 +1,97 @@
+/*	$OpenBSD: psl.h,v 1.1 1998/07/07 21:32:44 mickey Exp $	*/
+
+/*
+ *  (c) Copyright 1987 HEWLETT-PACKARD COMPANY
+ *
+ *  To anyone who acknowledges that this file is provided "AS IS"
+ *  without any express or implied warranty:
+ *      permission to use, copy, modify, and distribute this file
+ *  for any purpose is hereby granted without fee, provided that
+ *  the above copyright notice and this notice appears in all
+ *  copies, and that the name of Hewlett-Packard Company not be
+ *  used in advertising or publicity pertaining to distribution
+ *  of the software without specific, written prior permission.
+ *  Hewlett-Packard Company makes no representations about the
+ *  suitability of this software for any purpose.
+ */
+
+/*
+ * Copyright (c) 1990,1991,1994 The University of Utah and
+ * the Computer Systems Laboratory (CSL).  All rights reserved.
+ *
+ * THE UNIVERSITY OF UTAH AND CSL PROVIDE THIS SOFTWARE IN ITS "AS IS"
+ * CONDITION, AND DISCLAIM ANY LIABILITY OF ANY KIND FOR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM ITS USE.
+ *
+ * CSL requests users of this software to return to csl-dist@cs.utah.edu any
+ * improvements that they make and grant CSL redistribution rights.
+ *
+ * 	Utah $Hdr: psl.h 1.3 94/12/14$
+ */
+
+#ifndef _HPPA_PSL_H_
+#define _PHPPA_SL_H_
+
+/*
+ * Processor Status Word (PSW) Masks
+ */
+#define	PSW_T	0x01000000	/* Taken Branch Trap Enable */
+#define	PSW_H	0x00800000	/* Higher-Privilege Transfer Trap Enable */
+#define	PSW_L	0x00400000	/* Lower-Privilege Transfer Trap Enable */
+#define	PSW_N	0x00200000	/* PC Queue Front Instruction Nullified */
+#define	PSW_X	0x00100000	/* Data Memory Break Disable */
+#define	PSW_B	0x00080000	/* Taken Branch in Previous Cycle */
+#define	PSW_C	0x00040000	/* Code Address Translation Enable */
+#define	PSW_V	0x00020000	/* Divide Step Correction */
+#define	PSW_M	0x00010000	/* High-Priority Machine Check Disable */
+#define	PSW_CB	0x0000ff00	/* Carry/Borrow Bits */
+#define	PSW_R	0x00000010	/* Recovery Counter Enable */
+#define	PSW_Q	0x00000008	/* Interruption State Collection Enable */
+#define	PSW_P	0x00000004	/* Protection ID Validation Enable */
+#define	PSW_D	0x00000002	/* Data Address Translation Enable */
+#define	PSW_I	0x00000001	/* External, Power Failure, Low-Priority */
+				/* Machine Check Interruption Enable */
+/*
+ * Software defined PSW masks.
+ */
+#define PSW_SS	0x10000000	/* Kernel managed single step */
+
+/*
+ * PSW Bit Positions
+ */
+#define	PSW_T_P		7
+#define	PSW_H_P		8
+#define	PSW_L_P		9
+#define	PSW_N_P		10
+#define	PSW_X_P		11
+#define	PSW_B_P		12
+#define	PSW_C_P		13
+#define	PSW_V_P		14
+#define	PSW_M_P		15
+#define	PSW_CB_P	23
+#define	PSW_R_P		27
+#define	PSW_Q_P		28
+#define	PSW_P_P		29
+#define	PSW_D_P		30
+#define	PSW_I_P		31
+
+/*
+ * Kernel PSW Masks
+ */
+#define	RESET_PSW	(PSW_R | PSW_Q | PSW_P | PSW_D)
+#define	KERNEL_PSW	(PSW_R | PSW_Q | PSW_P | PSW_D | PSW_I)
+#define	SYSTEM_MASK	(PSW_R | PSW_Q | PSW_P | PSW_D | PSW_I)
+#define	GLOBAL_VAR_MASK	(PSW_H | PSW_L | PSW_C | PSW_M)
+#define	PER_INST_MASK	(PSW_X | PSW_T | PSW_N | PSW_B | PSW_V | PSW_CB | SYSTEM_MASK)
+#define	PTRACE_MASK	(PSW_N | PSW_V | PSW_CB)
+
+/*
+ * Macros to decode processor status word.
+ */
+#define PC_PRIV_MASK    3
+#define PC_PRIV_KERN    0
+#define PC_PRIV_USER    3
+#define USERMODE(pc)    (((pc) & PC_PRIV_MASK) != PC_PRIV_KERN)
+
+#endif  /* _HPPA_PSL_H_ */
+
diff --git a/sys/arch/hppa/include/pte.h b/sys/arch/hppa/include/pte.h
new file mode 100644
index 00000000000..b2f662f2d7c
--- /dev/null
+++ b/sys/arch/hppa/include/pte.h
@@ -0,0 +1,71 @@
+/*	$OpenBSD: pte.h,v 1.1 1998/07/07 21:32:44 mickey Exp $	*/
+
+/*
+ * Copyright 1996 1995 by Open Software Foundation, Inc.   
+ *              All Rights Reserved 
+ *  
+ * Permission to use, copy, modify, and distribute this software and 
+ * its documentation for any purpose and without fee is hereby granted, 
+ * provided that the above copyright notice appears in all copies and 
+ * that both the copyright notice and this permission notice appear in 
+ * supporting documentation. 
+ *  
+ * OSF DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE 
+ * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 
+ * FOR A PARTICULAR PURPOSE. 
+ *  
+ * IN NO EVENT SHALL OSF BE LIABLE FOR ANY SPECIAL, INDIRECT, OR 
+ * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM 
+ * LOSS OF USE, DATA OR PROFITS, WHETHER IN ACTION OF CONTRACT, 
+ * NEGLIGENCE, OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION 
+ * WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 
+ */
+/*
+ * pmk1.1
+ */
+
+#ifndef	_HPPA_PTE_H_
+#define	_HPPA_PTE_H_
+
+
+/* TLB access/protection values */
+#define TLB_REF		0x80000000	/* software only */
+#define	TLB_ALIGNED	0x40000000	/* software only */
+#define TLB_TRAP	0x20000000
+#define TLB_DIRTY	0x10000000
+#define TLB_BREAK	0x08000000
+#define TLB_AR_MASK	0x07f00000
+#define		TLB_AR_NA	0x07300000
+#define		TLB_AR_KR	0x00000000
+#define		TLB_AR_KRW	0x01000000
+#define		TLB_AR_KRX	0x02000000
+#define		TLB_AR_KRWX	0x03000000
+#define		TLB_AR_UR	0x00f00000
+#define		TLB_AR_URW	0x01f00000
+#define		TLB_AR_URX	0x02f00000
+#define		TLB_AR_URWX	0x03f00000
+#define TLB_UNCACHEABLE	0x00080000
+#define TLB_ICACHE	0x00040000	/* software only */
+#define TLB_NOTUSED	0x00020000      /* software only */
+#define TLB_DCACHE	0x00010000      /* software only */
+#define TLB_PID_MASK	0x0000fffe
+#define TLB_WIRED	0x00000001	/* software only */
+
+#define TLB_REF_POS	0
+#define TLB_ALIGNED_POS	1
+#define TLB_TRAP_POS	2
+#define TLB_DIRTY_POS	3
+#define TLB_BREAK_POS	4
+#define TLB_ITLB_POS    12
+#define TLB_ICACHE_POS  13
+#define TLB_DTLB_POS    14
+#define TLB_DCACHE_POS  15
+#define TLB_WIRED_POS	31
+
+/* protection for a gateway page */
+#define TLB_GATE_PROT	0x04c00000
+
+/* protection for break page */
+#define TLB_BREAK_PROT	0x02c00000
+
+#endif /* _HPPA_PTE_H_ */
diff --git a/sys/arch/hppa/include/ptrace.h b/sys/arch/hppa/include/ptrace.h
new file mode 100644
index 00000000000..129026e5b1f
--- /dev/null
+++ b/sys/arch/hppa/include/ptrace.h
@@ -0,0 +1,42 @@
+/*	$OpenBSD: ptrace.h,v 1.1 1998/07/07 21:32:45 mickey Exp $	*/
+
+/*
+ * Copyright (c) 1992, 1993
+ *	The Regents of the University of California.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *    must display the following acknowledgement:
+ *	This product includes software developed by the University of
+ *	California, Berkeley and its contributors.
+ * 4. Neither the name of the University nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ *	@(#)ptrace.h	8.1 (Berkeley) 6/11/93
+ */
+
+/*
+ * Machine dependent trace commands.
+ *
+ * None for the HPPA at this time.
+ */
diff --git a/sys/arch/hppa/include/reg.h b/sys/arch/hppa/include/reg.h
new file mode 100644
index 00000000000..b836bf17373
--- /dev/null
+++ b/sys/arch/hppa/include/reg.h
@@ -0,0 +1,63 @@
+/*	$OpenBSD: reg.h,v 1.1 1998/07/07 21:32:45 mickey Exp $	*/
+
+/* 
+ * Copyright (c) 1990,1994 The University of Utah and
+ * the Computer Systems Laboratory at the University of Utah (CSL).
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify and distribute this software is hereby
+ * granted provided that (1) source code retains these copyright, permission,
+ * and disclaimer notices, and (2) redistributions including binaries
+ * reproduce the notices in supporting documentation, and (3) all advertising
+ * materials mentioning features or use of this software display the following
+ * acknowledgement: ``This product includes software developed by the
+ * Computer Systems Laboratory at the University of Utah.''
+ *
+ * THE UNIVERSITY OF UTAH AND CSL ALLOW FREE USE OF THIS SOFTWARE IN ITS "AS
+ * IS" CONDITION.  THE UNIVERSITY OF UTAH AND CSL DISCLAIM ANY LIABILITY OF
+ * ANY KIND FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
+ *
+ * CSL requests users of this software to return to csl-dist@cs.utah.edu any
+ * improvements that they make and grant CSL redistribution rights.
+ *
+ * 	Utah $Hdr: regs.h 1.6 94/12/14$
+ *	Author: Bob Wheeler, University of Utah CSL
+ */
+
+/*
+ * constants for registers for use with the following routines:
+ * 
+ *     void mtctl(reg, value)	- move to control register
+ *     int mfctl(reg)		- move from control register
+ *     int mtsp(sreg, value)	- move to space register
+ *     int mfsr(sreg)		- move from space register
+ */
+
+#define CR_RCTR	 0
+#define CR_PIDR1 8
+#define CR_PIDR2 9
+#define CR_CCR   10
+#define CR_SAR	 11
+#define CR_PIDR3 12
+#define CR_PIDR4 13
+#define CR_IVA	 14
+#define CR_EIEM  15
+#define CR_ITMR  16
+#define CR_PCSQ  17
+#define CR_PCOQ  18
+#define CR_IIR   19
+#define CR_ISR   20
+#define CR_IOR   21
+#define CR_IPSW  22
+#define CR_EIRR  23
+#define CR_PTOV  24
+#define CR_VTOP  25
+#define CR_TR2   26
+#define CR_TR3   27
+#define CR_TR4   28
+#define CR_TR5   29
+#define CR_TR6   30
+#define CR_TR7   31
+
+#define CCR_MASK 0xff
+
diff --git a/sys/arch/hppa/include/vmparam.h b/sys/arch/hppa/include/vmparam.h
new file mode 100644
index 00000000000..590019151b4
--- /dev/null
+++ b/sys/arch/hppa/include/vmparam.h
@@ -0,0 +1,137 @@
+/*	$OpenBSD: vmparam.h,v 1.1 1998/07/07 21:32:45 mickey Exp $	*/
+
+/* 
+ * Copyright (c) 1988-1994, The University of Utah and
+ * the Computer Systems Laboratory at the University of Utah (CSL).
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify and distribute this software is hereby
+ * granted provided that (1) source code retains these copyright, permission,
+ * and disclaimer notices, and (2) redistributions including binaries
+ * reproduce the notices in supporting documentation, and (3) all advertising
+ * materials mentioning features or use of this software display the following
+ * acknowledgement: ``This product includes software developed by the
+ * Computer Systems Laboratory at the University of Utah.''
+ *
+ * THE UNIVERSITY OF UTAH AND CSL ALLOW FREE USE OF THIS SOFTWARE IN ITS "AS
+ * IS" CONDITION.  THE UNIVERSITY OF UTAH AND CSL DISCLAIM ANY LIABILITY OF
+ * ANY KIND FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
+ *
+ * CSL requests users of this software to return to csl-dist@cs.utah.edu any
+ * improvements that they make and grant CSL redistribution rights.
+ *
+ * 	Utah $Hdr: vmparam.h 1.16 94/12/16$
+ */
+
+#ifndef _HPPA_VMPARAM_H_
+#define _HPPA_VMPARAM_H_
+
+/*
+ * Machine dependent constants for HP PA
+ */
+/*
+ * USRTEXT is the start of the user text/data space, while USRSTACK
+ * is the top (end) of the user stack.  LOWPAGES and HIGHPAGES are
+ * the number of pages from the beginning of the P0 region to the
+ * beginning of the text and from the beginning of the P1 region to the
+ * beginning of the stack respectively.
+ */
+#define	USRTEXT		UTEXTSEG
+#define	USRSTACK	0x68FF3000		/* Start of user stack */
+#define	BTOPUSRSTACK	btop(USRSTACK)		/* btop(USRSTACK) */
+#define	P1PAGES		0
+#define	LOWPAGES	0
+#define	HIGHPAGES	UPAGES
+
+#define	INTSTACK_SIZE	(5 * NBPG)		/* interrupt stack size */
+
+/*
+ * Virtual memory related constants, all in bytes
+ */
+#ifndef MAXTSIZ
+#define	MAXTSIZ		(16*1024*1024)		/* max text size */
+#endif
+#ifndef DFLDSIZ
+#define	DFLDSIZ		(16*1024*1024)		/* initial data size limit */
+#endif
+#ifndef MAXDSIZ
+#define	MAXDSIZ		(64*1024*1024)		/* max data size */
+#endif
+#ifndef	DFLSSIZ
+#define	DFLSSIZ		(512*1024)		/* initial stack size limit */
+#endif
+#ifndef	MAXSSIZ
+#define	MAXSSIZ		MAXDSIZ			/* max stack size */
+#endif
+
+/*
+ * Default sizes of swap allocation chunks (see dmap.h).
+ * The actual values may be changed in vminit() based on MAXDSIZ.
+ * With MAXDSIZ of 64Mb and NDMAP of 62, dmmax will be 4096.
+ * DMMIN should be at least ctod(1) so that vtod() works.
+ * vminit() ensures this.
+ */
+#define	DMMIN	64			/* smallest swap allocation */
+#define	DMMAX	4096			/* largest potential swap allocation */
+#define	DMTEXT	4096			/* swap allocation for text */
+
+/*
+ * Sizes of the system and user portions of the system page table.
+ */
+/* SYSPTSIZE IS SILLY; IT SHOULD BE COMPUTED AT BOOT TIME */
+#define	SYSPTSIZE	((1024*1024*64)/NBPG)	/* 64mb */
+#define	USRPTSIZE	(8 * NPTEPG)		/* 32mb */
+
+/*
+ * PTEs for system V style shared memory.
+ * This is basically slop for kmempt which we actually allocate (malloc) from.
+ */
+#ifndef SHMMAXPGS
+#define SHMMAXPGS	((1024*1024*10)/NBPG)	/* 10mb */
+#endif
+
+/*
+ * The size of the clock loop.
+ */
+#define	LOOPPAGES	(maxfree - firstfree)
+
+/*
+ * The time for a process to be blocked before being very swappable.
+ * This is a number of seconds which the system takes as being a non-trivial
+ * amount of real time.  You probably shouldn't change this;
+ * it is used in subtle ways (fractions and multiples of it are, that is, like
+ * half of a ``long time'', almost a long time, etc.)
+ * It is related to human patience and other factors which don't really
+ * change over time.
+ */
+#define	MAXSLP 		20
+
+/*
+ * A swapped in process is given a small amount of core without being bothered
+ * by the page replacement algorithm.  Basically this says that if you are
+ * swapped in you deserve some resources.  We protect the last SAFERSS
+ * pages against paging and will just swap you out rather than paging you.
+ * Note that each process has at least UPAGES+CLSIZE pages which are not
+ * paged anyways (this is currently 8+2=10 pages or 5k bytes), so this
+ * number just means a swapped in process is given around 25k bytes.
+ * Just for fun: current memory prices are 4600$ a megabyte on VAX (4/22/81),
+ * so we loan each swapped in process memory worth 100$, or just admit
+ * that we don't consider it worthwhile and swap it out to disk which costs
+ * $30/mb or about $0.75.
+ */
+#define	SAFERSS		(16384/NBPG)	/* nominal ``small'' resident set size
+					   protected against replacement */
+
+/* user/kernel map constants */
+#define	VM_MIN_ADDRESS		((vm_offset_t)0)
+#define	VM_MAXUSER_ADDRESS	((vm_offset_t)0xc0000000)
+#define	VM_MAX_ADDRESS		VM_MAXUSER_ADDRESS
+#define	VM_MIN_KERNEL_ADDRESS	((vm_offset_t)0)
+#define	VM_MAX_KERNEL_ADDRESS	((vm_offset_t)0xFFFF0000)
+
+/* virtual sizes (bytes) for various kernel submaps */
+#define VM_MBUF_SIZE		(NMBCLUSTERS*MCLBYTES)
+#define VM_KMEM_SIZE		(NKMEMCLUSTERS*CLBYTES)
+#define VM_PHYS_SIZE		(USRIOSIZE*CLBYTES)
+
+#endif	/* _HPPA_VMPARAM_H_ */