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authorAaron Campbell <aaron@cvs.openbsd.org>2000-10-09 17:31:05 +0000
committerAaron Campbell <aaron@cvs.openbsd.org>2000-10-09 17:31:05 +0000
commit40652c3fd4e1bdeb7d16c28472ef85050522fc50 (patch)
tree1f955f74a224e9e6e04ccf2c0d19946c5725a5d7
parent435292fd15256635dedadc558ca7867f5322a6df (diff)
Defer most of the attach process as recommended in the comments; mickey@ ok
-rw-r--r--sys/dev/pci/pccbb.c64
1 files changed, 31 insertions, 33 deletions
diff --git a/sys/dev/pci/pccbb.c b/sys/dev/pci/pccbb.c
index d9b07be18db..6344aac77bb 100644
--- a/sys/dev/pci/pccbb.c
+++ b/sys/dev/pci/pccbb.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: pccbb.c,v 1.7 2000/09/24 23:10:48 aaron Exp $ */
+/* $OpenBSD: pccbb.c,v 1.8 2000/10/09 17:31:04 aaron Exp $ */
/* $NetBSD: pccbb.c,v 1.42 2000/06/16 23:41:35 cgd Exp $ */
/*
@@ -385,7 +385,7 @@ pccbbattach(parent, self, aux)
struct pccbb_softc *sc = (void *)self;
struct pci_attach_args *pa = aux;
pci_chipset_tag_t pc = pa->pa_pc;
- pcireg_t sock_base, busreg;
+ pcireg_t busreg, reg, sock_base;
bus_addr_t sockbase;
int flags;
@@ -442,12 +442,14 @@ pccbbattach(parent, self, aux)
sc->sc_mem_start = 0; /* XXX */
sc->sc_mem_end = 0xffffffff; /* XXX */
+ printf("\n");
+
/*
* When interrupt isn't routed correctly, give up probing cbb and do
* not kill pcic-compatible port.
*/
if ((0 == pa->pa_intrline) || (255 == pa->pa_intrline)) {
- printf("\n%s: NOT USED because of unconfigured interrupt\n",
+ printf("%s: NOT USED because of unconfigured interrupt\n",
sc->sc_dev.dv_xname);
return;
}
@@ -491,11 +493,31 @@ pccbbattach(parent, self, aux)
shutdownhook_establish(pccbb_shutdown, sc);
- timeout_set(&sc->sc_ins_tmo, pci113x_insert, sc);
+ /* Disable legacy register mapping. */
+ switch (sc->sc_chipset) {
+ case CB_RX5C46X: /* fallthrough */
#if 0
- config_defer(self, pccbb_pci_callback);
+ case CB_RX5C47X:
#endif
- pccbb_pci_callback(self);
+ /*
+ * The legacy pcic io-port on Ricoh CardBus bridges cannot be
+ * disabled by substituting 0 into PCI_LEGACY register. Ricoh
+ * CardBus bridges have special bits on Bridge control reg (addr
+ * 0x3e on PCI config space).
+ */
+ reg = pci_conf_read(pc, pa->pa_tag, PCI_BCR_INTR);
+ reg &= ~(CB_BCRI_RL_3E0_ENA | CB_BCRI_RL_3E2_ENA);
+ pci_conf_write(pc, pa->pa_tag, PCI_BCR_INTR, reg);
+ break;
+
+ default:
+ /* XXX I don't know proper way to kill legacy I/O. */
+ pci_conf_write(pc, pa->pa_tag, PCI_LEGACY, 0x0);
+ break;
+ }
+
+ timeout_set(&sc->sc_ins_tmo, pci113x_insert, sc);
+ config_defer(self, pccbb_pci_callback);
}
@@ -595,7 +617,7 @@ pccbb_pci_callback(self)
printf("\n");
return;
}
- printf(": %s\n", intrstr);
+ printf("%s: %s\n", sc->sc_dev.dv_xname, intrstr);
powerhook_establish(pccbb_powerhook, sc);
@@ -678,9 +700,8 @@ pccbb_pci_callback(self)
* This function initialize YENTA chip registers listed below:
* 1) PCI command reg,
* 2) PCI and CardBus latency timer,
- * 3) disable legacy (PCIC-compatible) io,
- * 4) route PCI interrupt,
- * 5) close all memory and io windows.
+ * 3) route PCI interrupt,
+ * 4) close all memory and io windows.
*/
void
pccbb_chipinit(sc)
@@ -724,29 +745,6 @@ pccbb_chipinit(sc)
DPRINTF(("PCI latency timer 0x%x (%x)\n",
PCI_LATTIMER(reg), pci_conf_read(pc, tag, PCI_BHLC_REG)));
- /* Disable legacy register mapping. */
- switch (sc->sc_chipset) {
- case CB_RX5C46X: /* fallthrough */
-#if 0
- case CB_RX5C47X:
-#endif
- /*
- * The legacy pcic io-port on Ricoh CardBus bridges cannot be
- * disabled by substituting 0 into PCI_LEGACY register. Ricoh
- * CardBus bridges have special bits on Bridge control reg (addr
- * 0x3e on PCI config space).
- */
- reg = pci_conf_read(pc, tag, PCI_BCR_INTR);
- reg &= ~(CB_BCRI_RL_3E0_ENA | CB_BCRI_RL_3E2_ENA);
- pci_conf_write(pc, tag, PCI_BCR_INTR, reg);
- break;
-
- default:
- /* XXX I don't know proper way to kill legacy I/O. */
- pci_conf_write(pc, tag, PCI_LEGACY, 0x0);
- break;
- }
-
/* Route functional interrupts to PCI. */
reg = pci_conf_read(pc, tag, PCI_BCR_INTR);
reg &= ~CB_BCR_INTR_IREQ_ENABLE; /* use PCI Intr */