fixes from dale

3 files changed, 577 insertions, 602 deletions

diff --git a/sys/arch/mvme68k/dev/cd2400reg.h b/sys/arch/mvme68k/dev/cd2400reg.h
deleted file mode 100644
index d42fe00c7b2..00000000000
--- a/sys/arch/mvme68k/dev/cd2400reg.h
+++ /dev/null
@@ -1,151 +0,0 @@
-/*	$NetBSD$ */
-
-/*
- * Copyright (c) 1995 Dale Rahn. All rights reserved.
- *   
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- *    must display the following acknowledgement:
- *   This product includes software developed by Dale Rahn.
- * 4. The name of the author may not be used to endorse or promote products
- *    derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */  
-
-/* 
- * Memory map for CL-CD2400 (CD2401)
- *	NOTE: intel addresses are different than motorola addresss
- *	 do we want both here (really is based on endian)
- *	 or do we want to put these in a carefully packed structure?
- */
-
-/* these are mot addresses */
-/* global registers */
-#define CD2400_GFRCR		0x81
-#define CD2400_CAR		0xee
-
-/* option registers */
-#define CD2400_CMR		0x1b
-#define CD2400_COR1		0x10
-#define CD2400_COR2		0x17
-#define CD2400_COR3		0x16
-#define CD2400_COR4		0x15
-#define CD2400_COR5		0x14
-#define CD2400_COR6		0x18
-#define CD2400_COR7		0x07
-#define CD2400_SCHR1		0x1f /* async */
-#define CD2400_SCHR2		0x1e /* async */
-#define CD2400_SCHR3		0x1d /* async */
-#define CD2400_SCHR4		0x1c /* async */
-#define CD2400_SCRl		0x23 /* async */
-#define CD2400_SCRh		0x22 /* async */
-#define CD2400_LNXT		0x2e
-#define CD2400_RFAR1		0x1f /* sync */
-#define CD2400_RFAR2		0x1e /* sync */
-#define CD2400_RFAR3		0x1d /* sync */
-#define CD2400_RFAR4		0x1c /* sync */
-
-#define CD2400_CPSR		0xd6
-
-/* bit rate and clock option registers */
-#define CD2400_RBPR		0xcb
-#define CD2400_RCOR		0xc8
-#define CD2400_TBPR		0xc3
-#define CD2400_TCOR		0xc0
-
-/* channel command and status registers */
-#define CD2400_CCR		0x13
-#define CD2400_STCR		0x12 /* sync */
-#define CD2400_CSR		0x1a
-#define CD2400_MSVR_RTS		0xde
-#define CD2400_MSVR_DTR		0xdf
-
-/* interrupt registers */
-#define CD2400_LIVR		0x09
-#define CD2400_IER		0x11
-#define CD2400_LICR		0x26
-#define CD2400_STK		0xe2
-
-/* receive interrupt registers */
-#define CD2400_RPILR		0xe1
-#define CD2400_RIR		0xeD
-#define CD2400_RISR		0x88
-#define CD2400_RISRl		0x89
-#define CD2400_RISRh		0x88
-#define CD2400_RFOC		0x30
-#define CD2400_RDR		0xf8
-#define CD2400_REOIR		0x84
-
-/* transmit interrupt registers */
-#define CD2400_TPILR		0xe0
-#define CD2400_TIR		0xec
-#define CD2400_TISR		0x8a
-#define CD2400_TFTC		0x80
-#define CD2400_TDR		0xf8
-#define CD2400_TEOIR		0x85
-
-/* modem interrrupt registers */
-#define CD2400_MPILR		0xe3
-#define CD2400_MIR		0xef
-#define CD2400_MISR		0x8B
-#define CD2400_MEOIR		0x86
-
-/* dma registers */
-#define CD2400_DMR		0xf6
-#define CD2400_BERCNT		0x8e
-#define CD2400_DMABSTS		0x19
-
-/* dma receive registers - leave these long names, as in manual */
-#define CD2400_ARBADRL		0x42
-#define CD2400_ARBADRU		0x40
-#define CD2400_BRBADRL		0x46
-#define CD2400_BRBADRU		0x44
-#define CD2400_ARBCNT		0x4a
-#define CD2400_BRBCNT		0x48
-#define CD2400_ARBSTS		0x4f
-#define CD2400_BRBSTS		0x4e
-#define CD2400_RCBADRL		0x3e
-#define CD2400_RCBADRU		0x3c
-
-/* dma transmit registers */
-#define CD2400_ATBADRL		0x52
-#define CD2400_ATBADRU		0x50
-#define CD2400_BTBADRL		0x56
-#define CD2400_BTBADRU		0x54
-#define CD2400_ATBCNT		0x5a
-#define CD2400_BTBCNT		0x58
-#define CD2400_ATBSTS		0x5f
-#define CD2400_BTBSTS		0x5e
-#define CD2400_RTBADRL		0x3a
-#define CD2400_RTBADRU		0x38
-
-/* timer registers */
-#define CD2400_TPR		0xda
-#define CD2400_RTPR		0x24 /* async */
-#define CD2400_RTPRl		0x25 /* async */
-#define CD2400_RTPRh		0x24 /* async */
-#define CD2400_GT1		0x2a /* sync */
-#define CD2400_GT1l		0x2b /* sync */
-#define CD2400_GT1h		0x2a /* sync */
-#define CD2400_GT2		0x29 /* sync */
-#define CD2400_TTR		0x29 /* async */
-
-
-#define CD2400_SIZE		0x200
diff --git a/sys/arch/mvme68k/dev/cl.c b/sys/arch/mvme68k/dev/cl.c
index 38f0469f53c..738d7d25daa 100644
--- a/sys/arch/mvme68k/dev/cl.c
+++ b/sys/arch/mvme68k/dev/cl.c
@@ -1,7 +1,7 @@
-/*	$NetBSD$	*/
-
+/* $NetBSD$ */
 /*
  * Copyright (c) 1995 Dale Rahn. All rights reserved.
+ *
  *   
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
@@ -43,7 +43,7 @@
 #include <machine/cpu.h>
 #include <machine/autoconf.h>
 #include <dev/cons.h>
-#include <mvme68k/dev/cd2400reg.h>
+#include <mvme68k/dev/clreg.h>
 #include <sys/syslog.h>
 #include "cl.h"
 
@@ -53,6 +53,8 @@
 #include <mvme68k/dev/pcctworeg.h>
 #endif
 
+#define splcl() spl3()
+
 /* min timeout 0xa, what is a good value */
 #define CL_TIMEOUT	0x10
 #define CL_FIFO_MAX	0x10
@@ -64,7 +66,7 @@
 
 struct cl_cons {
 	u_char *cl_paddr;
-	volatile u_char *cl_vaddr;
+	volatile struct clreg *cl_vaddr;
 	volatile struct pcctworeg *pcctwoaddr;
 	u_char	channel;
 } cl_cons;
@@ -84,7 +86,6 @@ struct cl_info {
 	u_long  txcnt;
 	u_long  rxcnt;
 };
-
 #define CLCD_PORTS_PER_CHIP 4
 struct clsoftc {
 	struct device	sc_dev;
@@ -93,7 +94,8 @@ struct clsoftc {
 	struct evcnt sc_mxintrcnt;
 	time_t	sc_rotime;	/* time of last ring overrun */
 	time_t	sc_fotime;	/* time of last fifo overrun */
-	volatile u_char *vbase;
+	u_char *pbase;
+	volatile struct clreg *cl_reg;
 	struct cl_info		sc_cl[CLCD_PORTS_PER_CHIP];
 	struct intrhand		sc_ih_e;
 	struct intrhand		sc_ih_m;
@@ -102,7 +104,6 @@ struct clsoftc {
 	struct pcctworeg	*sc_pcctwo;
 	int			sc_flags;
 };
-
 struct {
 	u_int speed;
 	u_char divisor;
@@ -158,20 +159,18 @@ int clclose __P((dev_t dev, int flag, int mode, struct proc *p));
 int clread  __P((dev_t dev, struct uio *uio, int flag));
 int clwrite __P((dev_t dev, struct uio *uio, int flag));
 int clioctl __P((dev_t dev, int cmd, caddr_t data, int flag, struct proc *p));
-int clstop __P((struct tty *tp, int flag));
+int clstop  __P((struct tty *tp, int flag));
 
 static void cl_initchannel __P((struct clsoftc *sc, int channel));
 static void clputc __P((struct clsoftc *sc, int unit, char c));
 static u_char clgetc __P((struct clsoftc *sc, int *channel));
-static void cloutput __P((struct tty *tp));
+static void cloutput __P( (struct tty *tp));
 
 struct cfdriver clcd = {
 	NULL, "cl", clprobe, clattach, DV_TTY, sizeof(struct clsoftc), 0
 };
 
 #define CLCDBUF 80
-char cltty_ibuffer[CLCDBUF+1];
-char cl_obuffer[CLCDBUF+1];
 
 int dopoll = 1;
 
@@ -181,46 +180,48 @@ int dopoll = 1;
 
 extern int cputyp;
 
-struct tty *
-cltty(dev)
+struct tty * cltty(dev)
 	dev_t dev;
 {
 	int unit, channel;
 	struct clsoftc *sc;
-
 	unit = CL_UNIT(dev);
 	if (unit >= clcd.cd_ndevs || 
-	    (sc = (struct clsoftc *) clcd.cd_devs[unit]) == NULL) {
+		(sc = (struct clsoftc *) clcd.cd_devs[unit]) == NULL) {
 		return (NULL);
 	}
 	channel = CL_CHANNEL(dev);
-	return (sc->sc_cl[channel].tty);
+	return sc->sc_cl[channel].tty;
 }
 
-/*
- * probing onboard 166/167/187 CL-cd2400
- * should be previously configured, 
- * we can check the value before resetting the chip
- */
-int
-clprobe(parent, self, aux)
+int	clprobe(parent, self, aux)
 	struct device *parent;
 	void *self;
 	void *aux;
 {
-	volatile u_char *cd_base;
-	struct cfdata *cf = self;
+	/* probing onboard 166/167/187 CL-cd2400
+	 * should be previously configured, 
+	 * we can check the value before resetting the chip
+	 */
+	volatile struct clreg *cl_reg;
 	struct confargs *ca = aux;
 	int ret;
+	if (cputyp != CPU_167 && cputyp != CPU_166
+#ifdef CPU_187
+		&& cputyp != CPU_187
+#endif
+		)
+	{
+		return 0;
+	}
+	cl_reg = ca->ca_vaddr;
 
-	if (cputyp != CPU_167 && cputyp != CPU_166)
-		return (0);
-
-	cd_base = ca->ca_vaddr;
 #if 0
-	return (!badvaddr(&cd_base[CD2400_GFRCR], 1));
+	ret = !badvaddr(&cl_reg->cl_gfrcr,1);
+#else
+	ret = 1;
 #endif
-	return (ret);
+	return ret;
 }
 
 void
@@ -232,11 +233,8 @@ clattach(parent, self, aux)
 	struct clsoftc *sc = (struct clsoftc *)self;
 	struct confargs *ca = aux;
 	int i;
-#if 0
-	int size = (CD2400_SIZE + PGOFSET) & ~PGOFSET;
-#endif
 
-	sc->vbase = ca->ca_vaddr;
+	sc->cl_reg = ca->ca_vaddr;
 	sc->sc_pcctwo = ca->ca_master;
 
 	if (ca->ca_paddr == cl_cons.cl_paddr) {
@@ -249,19 +247,19 @@ clattach(parent, self, aux)
 		/* wait for GFRCR */
 	}
 	/* set up global registers */
-	sc->vbase[CD2400_TPR] = CL_TIMEOUT;
-	sc->vbase[CD2400_RPILR] = 0x03;
-	sc->vbase[CD2400_TPILR] = 0x02;
-	sc->vbase[CD2400_MPILR] = 0x01;
+	sc->cl_reg->cl_tpr = CL_TIMEOUT;
+	sc->cl_reg->cl_rpilr = 0x03;
+	sc->cl_reg->cl_tpilr = 0x02;
+	sc->cl_reg->cl_mpilr = 0x01;
 
 	for (i = 0; i < CLCD_PORTS_PER_CHIP; i++) {
 #if 0
 		sc->sc_cl[i].cl_rxmode =
-		    !(!((flags >> (i * CL_FLAG_BIT_PCH)) & 0x01));
+			!(!((flags >> (i * CL_FLAG_BIT_PCH)) & 0x01));
 		sc->sc_cl[i].cl_txmode =
-		    !(!((flags >> (i * CL_FLAG_BIT_PCH)) & 0x02));
+			!(!((flags >> (i * CL_FLAG_BIT_PCH)) & 0x02));
 		sc->sc_cl[i].cl_softchar =
-		    !(!((flags >> (i * CL_FLAG_BIT_PCH)) & 0x04));
+			!(!((flags >> (i * CL_FLAG_BIT_PCH)) & 0x04));
 #endif
 		cl_initchannel(sc, i);
 	}
@@ -288,18 +286,21 @@ clattach(parent, self, aux)
 	switch (ca->ca_bustype) {
 	case BUS_PCCTWO:
 		dopoll = 0;
-		pcctwointr_establish(PCC2V_SCC_RXE, &sc->sc_ih_e);
-		pcctwointr_establish(PCC2V_SCC_M, &sc->sc_ih_m);
-		pcctwointr_establish(PCC2V_SCC_TX, &sc->sc_ih_t);
-		pcctwointr_establish(PCC2V_SCC_RX, &sc->sc_ih_r);
+		pcctwointr_establish(PCC2V_SCC_RXE,&sc->sc_ih_e);
+		pcctwointr_establish(PCC2V_SCC_M,&sc->sc_ih_m);
+		pcctwointr_establish(PCC2V_SCC_TX,&sc->sc_ih_t);
+		pcctwointr_establish(PCC2V_SCC_RX,&sc->sc_ih_r);
 		sc->sc_pcctwo = (void *)ca->ca_master;
 		sc->sc_pcctwo->pcc2_sccerr = 0x01; /* clear errors */
 
 		/* enable all interrupts at ca_ipl */
-		sc->sc_pcctwo->pcc2_sccirq = PCC2_IRQ_IEN | (ca->ca_ipl & 0x7);
-		sc->sc_pcctwo->pcc2_scctx = PCC2_IRQ_IEN | (ca->ca_ipl & 0x7);
-		sc->sc_pcctwo->pcc2_sccrx = PCC2_IRQ_IEN | (ca->ca_ipl & 0x7);
+		sc->sc_pcctwo->pcc2_sccirq = 0x10 | (ca->ca_ipl & 0x7);
+		sc->sc_pcctwo->pcc2_scctx  = 0x10 | (ca->ca_ipl & 0x7);
+		sc->sc_pcctwo->pcc2_sccrx  = 0x10 | (ca->ca_ipl & 0x7);
 		break;
+	default:	
+		/* oops */
+		panic ("cl driver on unknown bus\n");
 	}
 
 	evcnt_attach(&sc->sc_dev, "intr", &sc->sc_txintrcnt);
@@ -307,114 +308,126 @@ clattach(parent, self, aux)
 	evcnt_attach(&sc->sc_dev, "intr", &sc->sc_mxintrcnt);
 	printf("\n");
 }
-
 static void
 cl_initchannel(sc, channel)
 	struct clsoftc *sc;
 	int channel;
 {
 	int s;
-	volatile u_char *cd_base = sc->vbase;
-
+	volatile struct clreg *cl_reg = sc->cl_reg;
 	/* set up option registers */
 	sc->sc_cl[channel].tty = NULL;
 	s = splhigh();
-	cd_base[CD2400_CAR] = (char)channel;
+	cl_reg->cl_car	= (char) channel;
 	/* async, do we want to try DMA at some point? */
-	cd_base[CD2400_LIVR] = PCC2_VECBASE + 0xc;/* set vector base at 5C */
-	cd_base[CD2400_IER] = 0x88;	/* should change XXX */
-	cd_base[CD2400_LICR] = 0x00;	/* will change if DMA support XXX */
+	cl_reg->cl_livr	= PCC2_VECBASE + 0xc;/* set vector base at 5C */
+	cl_reg->cl_ier	= 0x88;  /* should change XXX */
+	cl_reg->cl_licr	= 0x00;  /* will change if DMA support XXX */
 	/* if the port is not the console */
 	if (sc->sc_cl[channel].cl_consio != 1) {
-		cd_base[CD2400_CMR] = 0x02; 
-		cd_base[CD2400_COR1] = 0x17;
-		cd_base[CD2400_COR2] = 0x00;
-		cd_base[CD2400_COR3] = 0x02;
-		cd_base[CD2400_COR4] = 0xec;
-		cd_base[CD2400_COR5] = 0xec;
-		cd_base[CD2400_COR6] = 0x00;
-		cd_base[CD2400_COR7] = 0x00;
-		cd_base[CD2400_SCHR1] = 0x00;
-		cd_base[CD2400_SCHR2] = 0x00;
-		cd_base[CD2400_SCHR3] = 0x00;
-		cd_base[CD2400_SCHR4] = 0x00;
-		cd_base[CD2400_SCRl] = 0x00;
-		cd_base[CD2400_SCRh] = 0x00;
-		cd_base[CD2400_LNXT] = 0x00;
-		cd_base[CD2400_RBPR] = 0x40; /* 9600 */
-		cd_base[CD2400_RCOR] = 0x01;
-		cd_base[CD2400_TBPR] = 0x40; /* 9600 */
-		cd_base[CD2400_TCOR] = 0x01 << 5;
+		cl_reg->cl_cmr	= 0x02; 
+		cl_reg->cl_cor1	= 0x17;
+		cl_reg->cl_cor2	= 0x00;
+		cl_reg->cl_cor3	= 0x02;
+		cl_reg->cl_cor4	= 0xec;
+		cl_reg->cl_cor5	= 0xec;
+		cl_reg->cl_cor6	= 0x00;
+		cl_reg->cl_cor7	= 0x00;
+		cl_reg->cl_schr1	= 0x00;
+		cl_reg->cl_schr2	= 0x00;
+		cl_reg->cl_schr3	= 0x00;
+		cl_reg->cl_schr4	= 0x00;
+		cl_reg->cl_scrl	= 0x00;
+		cl_reg->cl_scrh	= 0x00;
+		cl_reg->cl_lnxt	= 0x00;
+		cl_reg->cl_rbpr	= 0x40; /* 9600 */
+		cl_reg->cl_rcor	= 0x01;
+		cl_reg->cl_tbpr	= 0x40; /* 9600 */
+		cl_reg->cl_tcor	= 0x01 << 5;
 		/* console port should be 0x88 already */
-		cd_base[CD2400_MSVR_RTS] = 0x00;
-		cd_base[CD2400_MSVR_DTR] = 0x00;
-		cd_base[CD2400_RTPRl] = CL_RX_TIMEOUT;
-		cd_base[CD2400_RTPRh] = 0x00;
+		cl_reg->cl_msvr_rts	= 0x00;
+		cl_reg->cl_msvr_dtr	= 0x00;
+		cl_reg->cl_rtprl	= CL_RX_TIMEOUT;
+		cl_reg->cl_rtprh	= 0x00;
 	}
+
 	splx(s);
 }
 
+
 int cldefaultrate = TTYDEF_SPEED;
 
-int clmctl(dev, bits, how)
+int clmctl (dev, bits, how)
 	dev_t dev;
 	int bits;
 	int how;
 {
-	struct clsoftc *sc = (struct clsoftc *)clcd.cd_devs[CL_UNIT(dev)];
 	int s;
-
+	struct clsoftc *sc;
+	/* should only be called with valid device */
+	sc = (struct clsoftc *) clcd.cd_devs[CL_UNIT(dev)];
+	/*
+	printf("mctl: dev %x, bits %x, how %x,\n",dev, bits, how);
+	*/
 	/* settings are currently ignored */
-	s = spltty();
+	s = splcl();
 	switch (how) {
 	case DMSET:
-		if (bits & TIOCM_RTS) {
-			sc->vbase[CD2400_MSVR_RTS] = 0x01;
+		if( bits & TIOCM_RTS) {
+			sc->cl_reg->cl_msvr_rts = 0x01;
 		} else {
-			sc->vbase[CD2400_MSVR_RTS] = 0x00;
+			sc->cl_reg->cl_msvr_rts = 0x00;
 		}
-		if (bits & TIOCM_DTR) {
-			sc->vbase[CD2400_MSVR_DTR] = 0x02;
+		if( bits & TIOCM_DTR) {
+			sc->cl_reg->cl_msvr_dtr = 0x02;
 		} else {
-			sc->vbase[CD2400_MSVR_DTR] = 0x00;
+			sc->cl_reg->cl_msvr_dtr = 0x00;
 		}
 		break;
 
 	case DMBIC:
-		if (bits & TIOCM_RTS) {
-			sc->vbase[CD2400_MSVR_RTS] = 0x00;
+		if( bits & TIOCM_RTS) {
+			sc->cl_reg->cl_msvr_rts = 0x00;
 		}
-		if (bits & TIOCM_DTR) {
-			sc->vbase[CD2400_MSVR_DTR] = 0x00;
+		if( bits & TIOCM_DTR) {
+			sc->cl_reg->cl_msvr_dtr = 0x00;
 		}
 		break;
 
 	case DMBIS:
-		if (bits & TIOCM_RTS) {
-			sc->vbase[CD2400_MSVR_RTS] = 0x01;
+		if( bits & TIOCM_RTS) {
+			sc->cl_reg->cl_msvr_rts = 0x01;
 		}
-		if (bits & TIOCM_DTR) {
-			sc->vbase[CD2400_MSVR_DTR] = 0x02;
+		if( bits & TIOCM_DTR) {
+			sc->cl_reg->cl_msvr_dtr = 0x02;
 		}
 		break;
 
 	case DMGET:
 		bits = 0;
-		{
-			u_char msvr = sc->vbase[CD2400_MSVR_RTS];
 
-			if (msvr & 0x80)
+		{
+			u_char msvr;
+			msvr = sc->cl_reg->cl_msvr_rts;
+			if( msvr & 0x80) {
 				bits |= TIOCM_DSR;
-			if (msvr & 0x40)
+			}
+			if( msvr & 0x40) {
 				bits |= TIOCM_CD;
-			if (msvr & 0x20)
+			}
+			if( msvr & 0x20) {
 				bits |= TIOCM_CTS;
-			if (msvr & 0x10)
+			}
+			if( msvr & 0x10) {
 				bits |= TIOCM_DTR;
-			if (msvr & 0x02)
+			}
+			if( msvr & 0x02) {
 				bits |= TIOCM_DTR;
-			if (msvr & 0x01)
+			}
+			if( msvr & 0x01) {
 				bits |= TIOCM_RTS;
+			}
+			
 		}
 		break;
 	}
@@ -433,11 +446,10 @@ int clmctl(dev, bits, how)
 	/*
 	printf("retbits %x\n", bits);
 	*/
-	return (bits);
+	return(bits);
 }
 
-int
-clopen(dev, flag, mode, p)
+int clopen (dev, flag, mode, p)
 	dev_t dev;
 	int flag;
 	int mode;
@@ -450,12 +462,12 @@ clopen(dev, flag, mode, p)
 	
 	unit = CL_UNIT(dev);
 	if (unit >= clcd.cd_ndevs || 
-	    (sc = (struct clsoftc *) clcd.cd_devs[unit]) == NULL) {
+		(sc = (struct clsoftc *) clcd.cd_devs[unit]) == NULL) {
 		return (ENODEV);
 	}
 	channel = CL_CHANNEL(dev);
 	cl = &sc->sc_cl[channel];
-	s = spltty();
+	s = splcl();
 	if (cl->tty) {
 		tp = cl->tty;
 	} else {
@@ -502,14 +514,14 @@ clopen(dev, flag, mode, p)
 		tp->t_state |= TS_CARR_ON;
 	} else if (tp->t_state & TS_XCLUDE && p->p_ucred->cr_uid != 0) {
 		splx(s);
-		return (EBUSY);
+		return(EBUSY);
 	}
 #ifdef XXX
 	/*
 	 * if NONBLOCK requested, ignore carrier
 	 */
 	if (flag & O_NONBLOCK)
-		goto done;
+	goto done;
 #endif
 
 	splx(s);
@@ -521,11 +533,9 @@ clopen(dev, flag, mode, p)
 #ifdef DEBUG
 	cl_dumpport(channel);
 #endif
-	return ((*linesw[tp->t_line].l_open)(dev, tp));
+	return((*linesw[tp->t_line].l_open)(dev, tp));
 }
-
-int
-clparam(tp, t)
+int clparam(tp, t)
 	struct tty *tp;
 	struct termios *t;
 {
@@ -537,27 +547,21 @@ clparam(tp, t)
 	dev = tp->t_dev;
 	unit = CL_UNIT(dev);
 	if (unit >= clcd.cd_ndevs || 
-	    (sc = (struct clsoftc *) clcd.cd_devs[unit]) == NULL) {
+		(sc = (struct clsoftc *) clcd.cd_devs[unit]) == NULL) {
 		return (ENODEV);
 	}
 	channel = CL_CHANNEL(dev);
 	tp->t_ispeed = t->c_ispeed;
 	tp->t_ospeed = t->c_ospeed;
 	tp->t_cflag = t->c_cflag;
-/*
-	t->c_ispeed = tp->t_ispeed;
-	t->c_ospeed = tp->t_ospeed;
-	t->c_cflag = tp->t_cflag;
-*/
 	clccparam(sc, t, channel);
-	s = spltty();
+	s = splcl();
 	cl_unblock(tp);
 	splx(s);
-	return (0);
+	return 0;
 }
 
-void
-cloutput(tp)
+void cloutput(tp)
 	struct tty *tp;
 {
 	int cc, s, unit, cnt;
@@ -565,11 +569,12 @@ cloutput(tp)
 	int channel;
 	struct clsoftc *sc;
 	dev_t dev;
+	char cl_obuffer[CLCDBUF+1];
 
 	dev = tp->t_dev;
 	unit = CL_UNIT(dev);
 	if (unit >= clcd.cd_ndevs || 
-	    (sc = (struct clsoftc *) clcd.cd_devs[unit]) == NULL) {
+		(sc = (struct clsoftc *) clcd.cd_devs[unit]) == NULL) {
 		return;
 	}
 	channel = CL_CHANNEL(dev);
@@ -577,11 +582,11 @@ cloutput(tp)
 	if ((tp->t_state & TS_ISOPEN) == 0)
 		return;
 
-	s = spltty();
+	s = splcl();
 	cc = tp->t_outq.c_cc;
 	while (cc > 0) {
 /*XXX*/
-		cnt = min(CLCDBUF, cc);
+		cnt = min (CLCDBUF,cc);
 		cnt = q_to_b(&tp->t_outq, cl_obuffer, cnt);
 		if (cnt == 0) {
 			break;
@@ -594,8 +599,7 @@ cloutput(tp)
 	splx(s);
 }
 
-int
-clclose(dev, flag, mode, p)
+int clclose (dev, flag, mode, p)
 	dev_t dev;
 	int flag;
 	int mode;
@@ -608,7 +612,7 @@ clclose(dev, flag, mode, p)
 	int s;
 	unit = CL_UNIT(dev);
 	if (unit >= clcd.cd_ndevs || 
-	    (sc = (struct clsoftc *) clcd.cd_devs[unit]) == NULL) {
+		(sc = (struct clsoftc *) clcd.cd_devs[unit]) == NULL) {
 		return (ENODEV);
 	}
 	channel = CL_CHANNEL(dev);
@@ -616,12 +620,13 @@ clclose(dev, flag, mode, p)
 	tp = cl->tty;
 	(*linesw[tp->t_line].l_close)(tp, flag);
 
-	s = spltty();
-	sc->vbase[CD2400_CAR] = channel;
-	if (cl->cl_consio == 0 && (tp->t_cflag & HUPCL) != 0) {
-		sc->vbase[CD2400_MSVR_RTS] = 0x00;
-		sc->vbase[CD2400_MSVR_DTR] = 0x00;
-		sc->vbase[CD2400_CCR] = 0x05;
+	s = splcl();
+	
+	sc->cl_reg->cl_car = channel;
+	if(cl->cl_consio == 0 && (tp->t_cflag & HUPCL) != 0) {
+		sc->cl_reg->cl_msvr_rts = 0x00;
+		sc->cl_reg->cl_msvr_dtr = 0x00;
+		sc->cl_reg->cl_ccr = 0x05;
 	}
 
 	splx(s);
@@ -630,38 +635,34 @@ clclose(dev, flag, mode, p)
 #if 0
 	cl->tty = NULL;
 #endif
-#if 0
+#ifdef DEBUG
 	cl_dumpport(channel);
 #endif
-	return (0);
-}
 
-int
-clread(dev, uio, flag)
+	return 0;
+}
+int clread (dev, uio, flag)
 	dev_t dev;
 	struct uio *uio;
-	int flag;
+int flag;
 {
 	int unit, channel;
 	struct tty *tp;
 	struct cl_info *cl;
 	struct clsoftc *sc;
-
 	unit = CL_UNIT(dev);
 	if (unit >= clcd.cd_ndevs || 
-	    (sc = (struct clsoftc *) clcd.cd_devs[unit]) == NULL) {
+		(sc = (struct clsoftc *) clcd.cd_devs[unit]) == NULL) {
 		return (ENODEV);
 	}
 	channel = CL_CHANNEL(dev);
 	cl = &sc->sc_cl[channel];
 	tp = cl->tty;
 	if (!tp)
-		return (ENXIO);
-	return ((*linesw[tp->t_line].l_read)(tp, uio, flag));
+		return ENXIO;
+	return((*linesw[tp->t_line].l_read)(tp, uio, flag));
 }
-
-int
-clwrite(dev, uio, flag)
+int clwrite (dev, uio, flag)
 	dev_t dev;
 	struct uio *uio;
 	int flag;
@@ -670,22 +671,19 @@ clwrite(dev, uio, flag)
 	struct tty *tp;
 	struct cl_info *cl;
 	struct clsoftc *sc;
-
 	unit = CL_UNIT(dev);
 	if (unit >= clcd.cd_ndevs || 
-	    (sc = (struct clsoftc *) clcd.cd_devs[unit]) == NULL) {
+		(sc = (struct clsoftc *) clcd.cd_devs[unit]) == NULL) {
 		return (ENODEV);
 	}
 	channel = CL_CHANNEL(dev);
 	cl = &sc->sc_cl[channel];
 	tp = cl->tty;
 	if (!tp)
-		return (ENXIO);
-	return ((*linesw[tp->t_line].l_write)(tp, uio, flag));
+		return ENXIO;
+	return((*linesw[tp->t_line].l_write)(tp, uio, flag));
 }
-
-int
-clioctl(dev, cmd, data, flag, p)
+int clioctl (dev, cmd, data, flag, p)
 	dev_t dev;
 	int cmd;
 	caddr_t data;
@@ -697,25 +695,24 @@ clioctl(dev, cmd, data, flag, p)
 	struct tty *tp;
 	struct cl_info *cl;
 	struct clsoftc *sc;
-
 	unit = CL_UNIT(dev);
 	if (unit >= clcd.cd_ndevs || 
-	    (sc = (struct clsoftc *) clcd.cd_devs[unit]) == NULL) {
+		(sc = (struct clsoftc *) clcd.cd_devs[unit]) == NULL) {
 		return (ENODEV);
 	}
 	channel = CL_CHANNEL(dev);
 	cl = &sc->sc_cl[channel];
 	tp = cl->tty;
 	if (!tp)
-		return (ENXIO);
+		return ENXIO;
 
 	error = (*linesw[tp->t_line].l_ioctl)(tp, cmd, data, flag, p);
 	if (error >= 0)
-		return (error);
+		return(error);
 
 	error = ttioctl(tp, cmd, data, flag, p);
 	if (error >= 0)
-		return (error);
+		return(error);
 
 	switch (cmd) {
 	case TIOCSBRK:
@@ -755,19 +752,18 @@ clioctl(dev, cmd, data, flag, p)
 	case TIOCSFLAGS:
 		error = suser(p->p_ucred, &p->p_acflag); 
 		if (error != 0)
-			return (EPERM); 
+			return(EPERM); 
 
 		cl->cl_swflags = *(int *)data;
 		cl->cl_swflags &= /* only allow valid flags */
 			(TIOCFLAG_SOFTCAR | TIOCFLAG_CLOCAL | TIOCFLAG_CRTSCTS);
 		break;
 	default:
-		return (ENOTTY);
+		return(ENOTTY);
 	}
 
-	return (0);
+	return 0;
 }
-
 int
 clstop(tp, flag)
 	struct tty *tp;
@@ -775,13 +771,13 @@ clstop(tp, flag)
 {
 	int s;
 
-	s = spltty();
+	s = splcl();
 	if (tp->t_state & TS_BUSY) {
 		if ((tp->t_state & TS_TTSTOP) == 0)
 			tp->t_state |= TS_FLUSH;
 	}
 	splx(s);
-	return (0);
+	return 0;
 }
 
 int
@@ -799,123 +795,93 @@ clcnprobe(cp)
 	cp->cn_dev = makedev (maj, 0);
 	cp->cn_pri = CN_NORMAL;
 
-	return (1);
+	return 1;
 }
 
 int
 clcninit(cp)
-	struct consdev *cp;
+struct consdev *cp;
 {
 #ifdef MAP_DOES_WORK
 	int size = (0x1ff + PGOFSET) & ~PGOFSET;
 	int pcc2_size = (0x3C + PGOFSET) & ~PGOFSET;
 #endif
-	volatile u_char *cd_base;
+	volatile struct clreg *cl_reg;
 	
 	cl_cons.cl_paddr = (void *)0xfff45000;
 #ifdef MAP_DOES_WORK
-	cl_cons.cl_vaddr = mapiodev(cl_cons.cl_paddr, size);
-	cd_pcc2_base = mapiodev(0xfff42000, pcc2_size);
+	cl_cons.cl_vaddr = mapiodev(cl_cons.cl_paddr,size);
+	cd_pcc2_base = mapiodev(0xfff42000,pcc2_size);
 #else
-	cl_cons.cl_vaddr = cl_cons.cl_paddr;
+	cl_cons.cl_vaddr   = (struct clreg *)cl_cons.cl_paddr;
 	cl_cons.pcctwoaddr = (void *)0xfff42000;
 #endif
-	cd_base = cl_cons.cl_vaddr;
+	cl_reg = cl_cons.cl_vaddr;
 	/* reset the chip? */
 #ifdef CLCD_DO_RESET
 #endif
-#ifdef NEW_CLCD_STRUCT
-	/* set up globals */
-	cl->tftc = 0x10;
-	cl->tpr = CL_TIMEOUT; /* is this correct?? */
-	cl->rpilr = 0x03;
-	cl->tpilr = 0x02;
-	cl->mpilr = 0x01;
-
-	/* set up the tty00 to be 9600 8N1 */
-	cl->car = 0x00;
-	cl->cor1 = 0x17;	/* No parity, ignore parity, 8 bit char */
-	cl->cor2 = 0x00;
-	cl->cor3 = 0x02;	/* 1 stop bit */
-	cl->cor4 = 0x00;
-	cl->cor5 = 0x00;
-	cl->cor6 = 0x00;
-	cl->cor7 = 0x00;
-	cl->schr1 = 0x00;
-	cl->schr2 = 0x00;
-	cl->schr3 = 0x00;
-	cl->schr4 = 0x00;
-	cl->scrl = 0x00;
-	cl->scrh = 0x00;
-	cl->lnxt = 0x00;
-	cl->cpsr = 0x00;
-#else
 	/* set up globals */
 #ifdef NOT_ALREADY_SETUP
-	cd_base[CD2400_TFTC] = 0x10;
-	cd_base[CD2400_TPR] = CL_TIMEOUT; /* is this correct?? */
-	cd_base[CD2400_RPILR] = 0x03;
-	cd_base[CD2400_TPILR] = 0x02;
-	cd_base[CD2400_MPILR] = 0x01;
+	cl_reg->cl_tftc  = 0x10;
+	cl_reg->cl_tpr   = CL_TIMEOUT; /* is this correct?? */
+	cl_reg->cl_rpilr = 0x03;
+	cl_reg->cl_tpilr = 0x02;
+	cl_reg->cl_mpilr = 0x01;
 
 	/* set up the tty00 to be 9600 8N1 */
-	cd_base[CD2400_CAR] = 0x00;
-	cd_base[CD2400_COR1] = 0x17;	/* No parity, ignore parity, 8 bit char */
-	cd_base[CD2400_COR2] = 0x00;
-	cd_base[CD2400_COR3] = 0x02;	/* 1 stop bit */
-	cd_base[CD2400_COR4] = 0x00;
-	cd_base[CD2400_COR5] = 0x00;
-	cd_base[CD2400_COR6] = 0x00;
-	cd_base[CD2400_COR7] = 0x00;
-	cd_base[CD2400_SCHR1] = 0x00;
-	cd_base[CD2400_SCHR2] = 0x00;
-	cd_base[CD2400_SCHR3] = 0x00;
-	cd_base[CD2400_SCHR4] = 0x00;
-	cd_base[CD2400_SCRl] = 0x00;
-	cd_base[CD2400_SCRh] = 0x00;
-	cd_base[CD2400_LNXT] = 0x00;
-	cd_base[CD2400_CPSR] = 0x00;
+	cl_reg->cl_car   = 0x00;
+	cl_reg->cl_cor1  = 0x17;	/* No parity, ignore parity, 8 bit char */
+	cl_reg->cl_cor2  = 0x00;
+	cl_reg->cl_cor3  = 0x02;	/* 1 stop bit */
+	cl_reg->cl_cor4  = 0x00;
+	cl_reg->cl_cor5  = 0x00;
+	cl_reg->cl_cor6  = 0x00;
+	cl_reg->cl_cor7  = 0x00;
+	cl_reg->cl_schr1 = 0x00;
+	cl_reg->cl_schr2 = 0x00;
+	cl_reg->cl_schr3 = 0x00;
+	cl_reg->cl_schr4 = 0x00;
+	cl_reg->cl_scrl  = 0x00;
+	cl_reg->cl_scrh  = 0x00;
+	cl_reg->cl_lnxt  = 0x00;
+	cl_reg->cl_cpsr  = 0x00;
 #endif
-#endif
-	return (0);
+	return 0;
 }
 
 int
 cl_instat(sc)
 	struct clsoftc *sc;
 {
-	volatile u_char *cd_base;
-
+	volatile struct clreg *cl_reg;
 	if ( NULL == sc) {
-		cd_base = cl_cons.cl_vaddr;
+		cl_reg = cl_cons.cl_vaddr;
 	} else {
-		cd_base = sc->vbase;
+		cl_reg = sc->cl_reg;
 	}
-	return (cd_base[CD2400_RIR] & 0x80);
+	return (cl_reg->cl_rir & 0x40);
 }
-
 int
 clcngetc(dev)
 	dev_t dev;
 {
 	u_char val, reoir, licr, isrl, data, status, fifo_cnt;
 	int got_char = 0;
-	volatile u_char *cd_base = cl_cons.cl_vaddr;
+	volatile struct clreg *cl_reg = cl_cons.cl_vaddr;
 	volatile struct pcctworeg *pcc2_base = cl_cons.pcctwoaddr;
-
 	while (got_char == 0) {
-		val = cd_base[CD2400_RIR];
+		val = cl_reg->cl_rir;
 		/* if no receive interrupt pending wait */
 		if (!(val & 0x80)) {
 			continue;
 		}
 		/* XXX do we need to suck the entire FIFO contents? */
 		reoir = pcc2_base->pcc2_sccrxiack; /* receive PIACK */
-		licr = cd_base[CD2400_LICR];
+		licr = cl_reg->cl_licr;
 		if (((licr >> 2) & 0x3) == 0) {
 			/* is the interrupt for us (port 0) */
-			/* the character is for us. */
-			isrl = cd_base[CD2400_RISRl];
+			/* the character is for us yea. */
+			isrl = cl_reg->cl_risrl;
 #if 0
 			if (isrl & 0x01) {
 				status = BREAK;
@@ -931,17 +897,18 @@ clcngetc(dev)
 			}
 			/* we do not have special characters ;-) */
 #endif
-			fifo_cnt = cd_base[CD2400_RFOC];
-			data = cd_base[CD2400_RDR];
+			fifo_cnt = cl_reg->cl_rfoc;
+			data = cl_reg->cl_rdr;
 			got_char = 1;
-			cd_base[CD2400_TEOIR] = 0x00;
+			cl_reg->cl_teoir = 0x00;
 		} else {
-			data = cd_base[CD2400_RDR];
-			cd_base[CD2400_TEOIR] = 0x00;
+			data = cl_reg->cl_rdr;
+			cl_reg->cl_teoir = 0x00;
 		}
 
 	}
-	return (data);
+	
+	return data;
 }
 
 int
@@ -954,9 +921,8 @@ clcnputc(dev, c)
 		clputc(0, 0, '\r');
 
 	clputc(0, 0, c);
-	return (0);
+	return 0;
 }
-
 clcnpollc(dev, on)
 	dev_t dev;
 	int on;
@@ -966,8 +932,8 @@ clcnpollc(dev, on)
 	} else {
 		/* disable polling */
 	}
+	return;
 }
-
 static void
 clputc(sc, unit, c)
 	struct clsoftc *sc;
@@ -977,12 +943,12 @@ clputc(sc, unit, c)
 	int s;
 	u_char schar;
 	u_char oldchannel;
-	volatile u_char *cd_base;
+	volatile struct clreg *cl_reg;
 	if (0 == sc) {
 		/* output on console */
-		cd_base = cl_cons.cl_vaddr;
+		cl_reg = cl_cons.cl_vaddr;
 	} else {
-		cd_base = sc->vbase;
+		cl_reg = sc->cl_reg;
 	}
 #ifdef NEW_CLCD_STRUCT
 	/* should we disable, flush and all that goo? */
@@ -1000,32 +966,33 @@ clputc(sc, unit, c)
 #else
 if (unit == 0) {
 	s = splhigh();
-	oldchannel = cd_base[CD2400_CAR];
-	cd_base[CD2400_CAR] = unit;
-	schar = cd_base[CD2400_SCHR3];
-	cd_base[CD2400_SCHR3] = c;
-	cd_base[CD2400_STCR] = 0x08 | 0x03; /* send special char, char 3 */
-	while (0 != cd_base[CD2400_STCR]) {
+	oldchannel = cl_reg->cl_car;
+	cl_reg->cl_car = unit;
+	schar = cl_reg->cl_schr3;
+	cl_reg->cl_schr3 = c;
+	cl_reg->cl_stcr = 0x08 | 0x03; /* send special char, char 3 */
+	while (0 != cl_reg->cl_stcr) {
 		/* wait until cl notices the command
 		 * otherwise it may not notice the character
 		 * if we send characters too fast.
 		 */
 	}
 	DELAY(5);
-	cd_base[CD2400_SCHR3] = schar;
-	cd_base[CD2400_CAR] = oldchannel;
+	cl_reg->cl_schr3 = schar;
+	cl_reg->cl_car = oldchannel;
 	splx(s);
 } else {
 	s = splhigh();
-	oldchannel = cd_base[CD2400_CAR];
-	cd_base[CD2400_CAR] = unit;
-	if (cd_base[CD2400_TFTC] > 0) {
-		cd_base[CD2400_TDR] = c;
+	oldchannel = cl_reg->cl_car;
+	cl_reg->cl_car = unit;
+	if (cl_reg->cl_tftc > 0) {
+		cl_reg->cl_tdr = c;
 	}
-	cd_base[CD2400_CAR] = oldchannel;
+	cl_reg->cl_car = oldchannel;
 	splx(s);
 }
 #endif
+	return;
 }
 
 /*
@@ -1054,12 +1021,12 @@ cl_chkinput()
 				/*
 				*(pinchar++) = clcngetc();
 				*/
-				ch = clgetc(sc, &channel) & 0xff;
+				ch = clgetc(sc,&channel) & 0xff;
 				c = ch;
 
 				tp = sc->sc_cl[channel].tty;
 				if (NULL != tp) {
-					(*linesw[tp->t_line].l_rint)(c, tp);
+					(*linesw[tp->t_line].l_rint)(c,tp);
 				}
 			}
 			/*
@@ -1069,35 +1036,33 @@ cl_chkinput()
 	}
 }
 #endif
-
 static u_char 
 clgetc(sc, channel)
 	struct clsoftc *sc;
 	int *channel;
 {
-	volatile u_char *cd_base;
+	volatile struct clreg *cl_reg;
 	volatile struct pcctworeg *pcc2_base;
 	u_char val, reoir, licr, isrl, fifo_cnt, data;
-
 	if (0 == sc) {
-		cd_base = cl_cons.cl_vaddr;
+		cl_reg = cl_cons.cl_vaddr;
 		pcc2_base = cl_cons.pcctwoaddr;
 	} else {
-		cd_base = sc->vbase;
+		cl_reg = sc->cl_reg;
 		pcc2_base = sc->sc_pcctwo;
 	}
-	val = cd_base[CD2400_RIR];
+	val = cl_reg->cl_rir;
 	/* if no receive interrupt pending wait */
 	if (!(val & 0x80)) {
-		return (0);
+		return 0;
 	}
 	/* XXX do we need to suck the entire FIFO contents? */
 	reoir = pcc2_base->pcc2_sccrxiack; /* receive PIACK */
-	licr = cd_base[CD2400_LICR];
+	licr = cl_reg->cl_licr;
 	*channel = (licr >> 2) & 0x3;
 	/* is the interrupt for us (port 0) */
 	/* the character is for us yea. */
-	isrl = cd_base[CD2400_RISRl];
+	isrl = cl_reg->cl_risrl;
 #if 0
 	if (isrl & 0x01) {
 		status = BREAK;
@@ -1113,17 +1078,16 @@ clgetc(sc, channel)
 	}
 	/* we do not have special characters ;-) */
 #endif
-	fifo_cnt = cd_base[CD2400_RFOC];
+	fifo_cnt = cl_reg->cl_rfoc;
 	if (fifo_cnt > 0) {
-		data = cd_base[CD2400_RDR];
-		cd_base[CD2400_TEOIR] = 0x00;
+		data = cl_reg->cl_rdr;
+		cl_reg->cl_teoir = 0x00;
 	} else {
 		data = 0;
-		cd_base[CD2400_TEOIR] = 0x08;
+		cl_reg->cl_teoir = 0x08;
 	}
-	return (data);
+	return data;
 }
-
 int
 clccparam(sc, par, channel)
 	struct clsoftc *sc;
@@ -1133,33 +1097,33 @@ clccparam(sc, par, channel)
 	u_int divisor, clk, clen;
 	int s, imask, ints;
 
-	s = spltty();
-	sc->vbase[CD2400_CAR] = channel;
+	s = splcl();
+	sc->cl_reg->cl_car = channel;
 	if (par->c_ospeed == 0) { 
 		/* dont kill the console */
-		if (sc->sc_cl[channel].cl_consio == 0) {
+		if(sc->sc_cl[channel].cl_consio == 0) {
 			/* disconnect, drop RTS DTR stop reciever */
-			sc->vbase[CD2400_MSVR_RTS] = 0x00;
-			sc->vbase[CD2400_MSVR_DTR] = 0x00;
-			sc->vbase[CD2400_CCR] = 0x05;
+			sc->cl_reg->cl_msvr_rts = 0x00;
+			sc->cl_reg->cl_msvr_dtr = 0x00;
+			sc->cl_reg->cl_ccr = 0x05;
 		}
 		splx(s);
 		return (0xff);
 	}
 
-	sc->vbase[CD2400_MSVR_RTS] = 0x03;
-	sc->vbase[CD2400_MSVR_DTR] = 0x03;
+	sc->cl_reg->cl_msvr_rts = 0x03;
+	sc->cl_reg->cl_msvr_dtr = 0x03;
 
 	divisor = cl_clkdiv(par->c_ospeed);
-	clk = cl_clknum(par->c_ospeed);
-	sc->vbase[CD2400_TBPR] = divisor;
-	sc->vbase[CD2400_TCOR] = clk << 5;
+	clk	= cl_clknum(par->c_ospeed);
+	sc->cl_reg->cl_tbpr = divisor;
+	sc->cl_reg->cl_tcor = clk << 5;
 	divisor = cl_clkdiv(par->c_ispeed);
-	clk = cl_clknum(par->c_ispeed);
-	sc->vbase[CD2400_RBPR] = divisor;
-	sc->vbase[CD2400_RCOR] = clk;
-	sc->vbase[CD2400_RTPRl] = cl_clkrxtimeout(par->c_ispeed);
-	sc->vbase[CD2400_RTPRh] = 0x00;
+	clk	= cl_clknum(par->c_ispeed);
+	sc->cl_reg->cl_rbpr = divisor;
+	sc->cl_reg->cl_rcor = clk;
+	sc->cl_reg->cl_rtprl = cl_clkrxtimeout(par->c_ispeed);
+	sc->cl_reg->cl_rtprh = 0x00;
 
 	switch (par->c_cflag & CSIZE) {
 	case CS5:
@@ -1178,26 +1142,24 @@ clccparam(sc, par, channel)
 		clen = 7;
 		imask = 0xFF;
 	}
-	sc->vbase[CD2400_COR3] = par->c_cflag & PARENB ? 4 : 2;
+	sc->cl_reg->cl_cor3 = par->c_cflag & PARENB ? 4 : 2;
 
 	if (par->c_cflag & PARENB) {
 		if (par->c_cflag & PARODD) {
-			sc->vbase[CD2400_COR1] = 0xE0 | clen ; /* odd */
+			sc->cl_reg->cl_cor1 = 0xE0 | clen ; /* odd */
 		} else {
-			sc->vbase[CD2400_COR1] = 0x40 | clen ; /* even */
+			sc->cl_reg->cl_cor1 = 0x40 | clen ; /* even */
 		}
 	} else {
-		sc->vbase[CD2400_COR1] = 0x10 | clen; /* ignore parity */
+		sc->cl_reg->cl_cor1 = 0x10 | clen; /* ignore parity */
 	}
 
-	if (sc->sc_cl[channel].cl_consio == 0 &&
-	    (par->c_cflag & CREAD) == 0 ) {
-/*
-		sc->vbase[CD2400_CSR] = 0x08;
-*/
-		sc->vbase[CD2400_CCR] = 0x08;
+	if (sc->sc_cl[channel].cl_consio == 0
+		&& (par->c_cflag & CREAD) == 0 )
+	{
+		sc->cl_reg->cl_ccr = 0x08;
 	} else {
-		sc->vbase[CD2400_CCR] = 0x0a;
+		sc->cl_reg->cl_ccr = 0x0a;
 	}
 	ints = 0;
 #define SCC_DSR 0x80
@@ -1217,71 +1179,64 @@ clccparam(sc, par, channel)
 		ints |= SCC_DSR;
 	}
 #endif
-	sc->vbase[CD2400_COR4] = ints | CL_FIFO_CNT;
-	sc->vbase[CD2400_COR5] = ints | CL_FIFO_CNT;
-	return (imask);
-}
+	sc->cl_reg->cl_cor4 = ints | CL_FIFO_CNT;
+	sc->cl_reg->cl_cor5 = ints | CL_FIFO_CNT;
 
+	return imask;
+}
 static int clknum = 0;
-
-u_char
+u_char 
 cl_clkdiv(speed)
 	int speed;
 {
 	int i = 0;
-
 	if (cl_clocks[clknum].speed == speed) {
-		return (cl_clocks[clknum].divisor);
+		return cl_clocks[clknum].divisor;
 	}
 	for  (i = 0; cl_clocks[i].speed != 0; i++) {
 		if (cl_clocks[i].speed == speed) {
 			clknum = i;
-			return (cl_clocks[clknum].divisor);
+			return cl_clocks[clknum].divisor;
 		}
 	}
 	/* return some sane value if unknown speed */
-	return (cl_clocks[4].divisor);
+	return cl_clocks[4].divisor;
 }
-
 u_char 
 cl_clknum(speed)
 	int speed;
 {
 	int found = 0;
 	int i = 0;
-
 	if (cl_clocks[clknum].speed == speed) {
-		return (cl_clocks[clknum].clock);
+		return cl_clocks[clknum].clock;
 	}
 	for  (i = 0; found != 0 && cl_clocks[i].speed != 0; i++) {
 		if (cl_clocks[clknum].speed == speed) {
 			clknum = i;
-			return (cl_clocks[clknum].clock);
+			return cl_clocks[clknum].clock;
 		}
 	}
 	/* return some sane value if unknown speed */
-	return (cl_clocks[4].clock);
+	return cl_clocks[4].clock;
 }
-
 u_char 
 cl_clkrxtimeout(speed)
 	int speed;
 {
 	int i = 0;
-
 	if (cl_clocks[clknum].speed == speed) {
-		return (cl_clocks[clknum].rx_timeout);
+		return cl_clocks[clknum].rx_timeout;
 	}
 	for  (i = 0; cl_clocks[i].speed != 0; i++) {
 		if (cl_clocks[i].speed == speed) {
 			clknum = i;
-			return (cl_clocks[clknum].rx_timeout);
+			return cl_clocks[clknum].rx_timeout;
 		}
 	}
 	/* return some sane value if unknown speed */
-	return (cl_clocks[4].rx_timeout);
+	return cl_clocks[4].rx_timeout;
 }
-
 void
 cl_unblock(tp)
 	struct tty *tp;
@@ -1290,7 +1245,6 @@ cl_unblock(tp)
 	if (tp->t_outq.c_cc != 0)
 		clstart(tp);
 }
-
 void
 clstart(tp)
 	struct tty *tp;
@@ -1311,14 +1265,14 @@ clstart(tp)
 #endif
 	unit = CL_UNIT(dev);
 	if (unit >= clcd.cd_ndevs || 
-	    (sc = (struct clsoftc *) clcd.cd_devs[unit]) == NULL) {
+		(sc = (struct clsoftc *) clcd.cd_devs[unit]) == NULL) {
 		return;
 	}
 
 	if ((tp->t_state & TS_ISOPEN) == 0)
 		return;
 
-	s = spltty();
+	s = splcl();
 #if 0
 	if (sc->sc_cl[channel].transmitting == 1) {
 		/* i'm busy, go away, I will get to it later. */
@@ -1326,23 +1280,24 @@ clstart(tp)
 		return;
 	}
 	cnt = q_to_b(&tp->t_outq, &cbuf, 1);
-	if (cnt != 0) {
+	if ( cnt != 0 ) {
 		sc->sc_cl[channel].transmitting = 1;
-		sc->vbase[CD2400_CAR] = channel;
-		sc->vbase[CD2400_TDR] = cbuf;
+		sc->cl_reg->cl_car = channel;
+		sc->cl_reg->cl_tdr = cbuf;
 	} else {
 		sc->sc_cl[channel].transmitting = 0;
 	}
 #else
-	if ((tp->t_state & (TS_TIMEOUT | TS_BUSY | TS_TTSTOP | TS_FLUSH)) == 0) {
+	if ((tp->t_state & (TS_TIMEOUT | TS_BUSY | TS_TTSTOP | TS_FLUSH)) == 0)
+	{
 		tp->t_state |= TS_BUSY;
-		sc->vbase[CD2400_CAR] = channel;
-		sc->vbase[CD2400_IER] = 0xb;
+		sc->cl_reg->cl_car = channel;
+		sc->cl_reg->cl_ier = sc->cl_reg->cl_ier | 0x3;
 	}
 #endif
 	splx(s);
+	return;
 }
-
 int
 cl_mintr(sc)
 	struct clsoftc *sc;
@@ -1350,43 +1305,43 @@ cl_mintr(sc)
 	u_char mir, misr, msvr;
 	int channel;
 	struct tty *tp;
-
-	mir = sc->vbase[CD2400_MIR];
-	if ((mir & 0x40) == 0x0) {
+	if(((mir = sc->cl_reg->cl_mir) & 0x40) == 0x0) {
 		/* only if intr is not shared? */
 		printf("cl_mintr extra intr\n");
-		return (0);
+		return 0;
 	}
 	sc->sc_mxintrcnt.ev_count++;
 
 	channel = mir & 0x03;
-	misr = sc->vbase[CD2400_MISR];
-	msvr = sc->vbase[CD2400_MSVR_RTS];
+	misr = sc->cl_reg->cl_misr;
+	msvr = sc->cl_reg->cl_msvr_rts;
 	if (misr & 0x01) {
 		/* timers are not currently used?? */
-		printf("cl_mintr: channel %x timer 1 unexpected\n", channel);
+		printf ("cl_mintr: channel %x timer 1 unexpected\n",channel);
 	}
 	if (misr & 0x02) {
 		/* timers are not currently used?? */
-		printf("cl_mintr: channel %x timer 2 unexpected\n", channel);
+		printf ("cl_mintr: channel %x timer 2 unexpected\n",channel);
 	}
 	if (misr & 0x20) {
-		printf("cl_mintr: channel %x cts %x\n", channel, 
-		    (msvr & 0x20) != 0x0);
+		printf ("cl_mintr: channel %x cts %x\n",channel, 
+		((msvr & 0x20) != 0x0)
+		);
 	}
 	if (misr & 0x40) {
 		struct tty *tp = sc->sc_cl[channel].tty;
-
-		printf("cl_mintr: channel %x cd %x\n", channel,
-		    (msvr & 0x40) != 0x0);
-		ttymodem(tp, (msvr & 0x40) != 0x0);
+		printf ("cl_mintr: channel %x cd %x\n",channel,
+		((msvr & 0x40) != 0x0)
+		);
+		ttymodem(tp, ((msvr & 0x40) != 0x0) );
 	}
 	if (misr & 0x80) {
-		printf("cl_mintr: channel %x dsr %x\n", channel,
-		    (msvr & 0x80) != 0x0);
+		printf ("cl_mintr: channel %x dsr %x\n",channel,
+		((msvr & 0x80) != 0x0)
+		);
 	}
-	sc->vbase[CD2400_MEOIR] = 0x00;
-	return (1);
+	sc->cl_reg->cl_meoir = 0x00;
+	return 1;
 }
 
 int
@@ -1401,43 +1356,41 @@ cl_txintr(sc)
 	int cnt;
 	u_char buffer[CL_FIFO_MAX +1];
 	u_char *tptr;
-
-	tir = sc->vbase[CD2400_TIR];
-	if ((tir & 0x40) == 0x0) {
+	if(((tir = sc->cl_reg->cl_tir) & 0x40) == 0x0) {
 		/* only if intr is not shared ??? */
-		printf("cl_txintr extra intr\n");
-		return (0);
+		printf ("cl_txintr extra intr\n");
+		return 0;
 	}
 	sc->sc_txintrcnt.ev_count++;
 
-	channel = tir & 0x03;
-	licr = sc->vbase[CD2400_LICR];
+	channel	= tir & 0x03;
+	licr	= sc->cl_reg->cl_licr;
 	
 	sc->sc_cl[channel].txcnt ++;
 
 	tp = sc->sc_cl[channel].tty;
 	if (tp == NULL || (tp->t_state & TS_ISOPEN) == 0) {
-		sc->vbase[CD2400_TEOIR] = 0x08;
-		return (1);
+		sc->cl_reg->cl_teoir = 0x08;
+		return 1;
 	}
-	switch ((licr >> 4) & 0x3) {
+	switch ((licr >> 4)& 0x3) {
 	case CL_DMAMODE:
 		teoir = 0x08;
 		break;
 	case CL_INTRMODE:
-		max = sc->vbase[CD2400_TFTC];
-		cnt = min((int)max, tp->t_outq.c_cc);
+		max = sc->cl_reg->cl_tftc;
+		cnt = min ((int)max,tp->t_outq.c_cc);
 		if (cnt != 0) {
 			cnt = q_to_b(&tp->t_outq, buffer, cnt);
 			empty = 0;
 			for (tptr = buffer; tptr < &buffer[cnt]; tptr++) {
-				sc->vbase[CD2400_TDR]= *tptr;
+				sc->cl_reg->cl_tdr = *tptr;
 			}
 			teoir = 0x00;
 		} else {
-			if (empty > 5 && (empty % 20000 ) == 0) {
-				printf("cl_txintr: too many empty intr %d chan %d\n",
-				    empty, channel);
+			if (empty > 5 && ((empty % 20000 )== 0)) {
+			printf("cl_txintr to many empty intr %d channel %d\n",
+				empty, channel);
 			}
 			empty++;
 			teoir = 0x08;
@@ -1445,20 +1398,20 @@ cl_txintr(sc)
 				tp->t_state &= ~(TS_BUSY | TS_FLUSH);
 				if (tp->t_state & TS_ASLEEP) {
 					tp->t_state &= ~TS_ASLEEP;
-					wakeup((caddr_t)&tp->t_outq);
+					wakeup((caddr_t) &tp->t_outq);
 				}
 				selwakeup(&tp->t_wsel);
 			}
-			sc->vbase[CD2400_IER] = sc->vbase[CD2400_IER] & ~0x3;
+			sc->cl_reg->cl_ier = sc->cl_reg->cl_ier & ~0x3;
 		}
 		break;
 	default:
-		printf("cl_txintr unknown mode %x\n", (licr >> 4) & 0x3);
+		printf("cl_txintr unknown mode %x\n", ((licr >> 4) & 0x3));
 		/* we probably will go to hell quickly now */
 		teoir = 0x08;
 	}
-	sc->vbase[CD2400_TEOIR] = teoir;
-	return (1);
+	sc->cl_reg->cl_teoir = teoir;
+	return 1;
 }
 
 int
@@ -1472,15 +1425,15 @@ cl_rxintr(sc)
 	int i;
 	u_char reoir;
 	
-	rir = sc->vbase[CD2400_RIR];
-	if ((rir & 0x40) == 0x0) {
+	rir = sc->cl_reg->cl_rir;
+	if((rir & 0x40) == 0x0) {
 		/* only if intr is not shared ??? */
-		printf("cl_rxintr extra intr\n");
-		return (0);
+		printf ("cl_rxintr extra intr\n");
+		return 0;
 	}
 	sc->sc_rxintrcnt.ev_count++;
 	channel = rir & 0x3;
-	licr = sc->vbase[CD2400_LICR];
+	licr = sc->cl_reg->cl_licr;
 	reoir = 0x08;
 
 	sc->sc_cl[channel].rxcnt ++;
@@ -1490,7 +1443,7 @@ cl_rxintr(sc)
 		reoir = 0x08;
 		break;
 	case CL_INTRMODE:
-		risrl = sc->vbase[CD2400_RISRl];
+		risrl = sc->cl_reg->cl_risrl;
 		if (risrl & 0x80) {
 			/* timeout, no characters */
 			reoir = 0x08;
@@ -1512,154 +1465,168 @@ cl_rxintr(sc)
 			cl_break(sc, channel);
 			reoir = 0x08;
 		} else {
-			fifocnt = sc->vbase[CD2400_RFOC];
+			fifocnt = sc->cl_reg->cl_rfoc;
 			tp = sc->sc_cl[channel].tty;
 			for (i = 0; i < fifocnt; i++) {
-				c = sc->vbase[CD2400_RDR];
+				c = sc->cl_reg->cl_rdr;
 #if USE_BUFFER
 				cl_appendbuf(sc, channel, c);
 #else
 				/* does any restricitions exist on spl
 				 * for this call
 				 */
-				(*linesw[tp->t_line].l_rint)(c, tp);
+				(*linesw[tp->t_line].l_rint)(c,tp);
 				reoir = 0x00;
 #endif
 			}
 		}
 		break;
 	default:
-		printf("cl_rxintr unknown mode %x\n", licr & 0x03);
+		printf("cl_rxintr unknown mode %x\n",licr & 0x03);
 		/* we probably will go to hell quickly now */
 		reoir = 0x08;
 	}
-	sc->vbase[CD2400_REOIR] = reoir;
-	return (1);
+	sc->cl_reg->cl_reoir = reoir;
+	return 1;
 }
 
 void
-cl_overflow(sc, channel, ptime, msg)
-	struct clsoftc *sc;
-	int channel;
-	long *ptime;
-	char *msg;
+cl_overflow (sc, channel, ptime, msg)
+struct clsoftc *sc;
+int channel;
+long *ptime;
+char *msg;
 {
 /*
 	if (*ptime != time.tv_sec) {
 */
 	{
 /*
-		*ptime = time.tv_sec);
+		*ptime = time.tv_sec;
 */
 		log(LOG_WARNING, "%s%d[%d]: %s overrun", clcd.cd_name,
 			0 /* fix */, channel, msg);
 	}
+	return;
 }
-
 void
-cl_parity(sc, channel)
+cl_parity (sc, channel)
 	struct clsoftc *sc;
 	int channel;
 {
 	log(LOG_WARNING, "%s%d[%d]: parity error", clcd.cd_name, 0, channel);
+	return;
 }
-
 void
-cl_frame(sc, channel)
+cl_frame (sc, channel)
 	struct clsoftc *sc;
 	int channel;
 {
 	log(LOG_WARNING, "%s%d[%d]: frame error", clcd.cd_name, 0, channel);
+	return;
 }
-
 void
-cl_break(sc, channel)
+cl_break (sc, channel)
 	struct clsoftc *sc;
 	int channel;
 {
 	log(LOG_WARNING, "%s%d[%d]: break detected", clcd.cd_name, 0, channel);
+	return;
 }
 
 void
 cl_dumpport0()
 {
 	cl_dumpport(0);
+	return;
 }
-
 void
 cl_dumpport1()
 {
 	cl_dumpport(1);
+	return;
 }
-
 void
 cl_dumpport2()
 {
 	cl_dumpport(2);
+	return;
 }
-
 void
 cl_dumpport3()
 {
 	cl_dumpport(3);
+	return;
 }
 
 void
 cl_dumpport(channel)
 	int channel;
 {
-	u_char livr, cmr, cor1, cor2, cor3, cor4, cor5, cor6, cor7;
-	u_char schr1, schr2, schr3, schr4, scrl, scrh, lnxt;
-	u_char rbpr, rcor, tbpr, tcor, rpilr, rir, tpr, ier, ccr;
-	u_char csr, rts, dtr, rtprl, rtprh;
-	struct clsoftc *sc = (struct clsoftc *) clcd.cd_devs[0];
-	volatile u_char *cd_base = cl_cons.cl_vaddr;
+	u_char	livr, cmr, cor1, cor2, cor3, cor4, cor5, cor6, cor7,
+		schr1, schr2, schr3, schr4, scrl, scrh, lnxt,
+		rbpr, rcor, tbpr, tcor, rpilr, rir, tpr, ier, ccr,
+		csr, rts, dtr, rtprl, rtprh;
+	struct clsoftc *sc;
+
+	volatile struct clreg *cl_reg;
 	int s;
 
-	s = spltty();
-	cd_base[CD2400_CAR] = (char) channel;
-	livr = cd_base[CD2400_LIVR];
-	cmr = cd_base[CD2400_CMR];
-	cor1 = cd_base[CD2400_COR1];
-	cor2 = cd_base[CD2400_COR2];
-	cor3 = cd_base[CD2400_COR3];
-	cor4 = cd_base[CD2400_COR4];
-	cor5 = cd_base[CD2400_COR5];
-	cor6 = cd_base[CD2400_COR6];
-	cor7 = cd_base[CD2400_COR7];
-	schr1 = cd_base[CD2400_SCHR1];
-	schr2 = cd_base[CD2400_SCHR2];
-	schr3 = cd_base[CD2400_SCHR3];
-	schr4 = cd_base[CD2400_SCHR4];
-	scrl = cd_base[CD2400_SCRl];
-	scrh = cd_base[CD2400_SCRh];
-	lnxt = cd_base[CD2400_LNXT];
-	rbpr = cd_base[CD2400_RBPR];
-	rcor = cd_base[CD2400_RCOR];
-	tbpr = cd_base[CD2400_TBPR];
-	rpilr = cd_base[CD2400_RPILR];
-	ier = cd_base[CD2400_IER];
-	ccr = cd_base[CD2400_CCR];
-	tcor = cd_base[CD2400_TCOR];
-	csr = cd_base[CD2400_CSR];
-	tpr = cd_base[CD2400_TPR];
-	rts = cd_base[CD2400_MSVR_RTS];
-	dtr = cd_base[CD2400_MSVR_DTR];
-	rtprl = cd_base[CD2400_RTPRl];
-	rtprh = cd_base[CD2400_RTPRh];
+	cl_reg = cl_cons.cl_vaddr;
+
+	sc = (struct clsoftc *) clcd.cd_devs[0];
+
+	s = splcl();
+	cl_reg->cl_car	= (char) channel;
+	livr = cl_reg->cl_livr;
+	cmr = cl_reg->cl_cmr;
+	cor1 = cl_reg->cl_cor1;
+	cor2 = cl_reg->cl_cor2;
+	cor3 = cl_reg->cl_cor3;
+	cor4 = cl_reg->cl_cor4;
+	cor5 = cl_reg->cl_cor5;
+	cor6 = cl_reg->cl_cor6;
+	cor7 = cl_reg->cl_cor7;
+	schr1 = cl_reg->cl_schr1;
+	schr2 = cl_reg->cl_schr2;
+	schr3 = cl_reg->cl_schr3;
+	schr4 = cl_reg->cl_schr4;
+	scrl = cl_reg->cl_scrl;
+	scrh = cl_reg->cl_scrh;
+	lnxt = cl_reg->cl_lnxt;
+	rbpr = cl_reg->cl_rbpr;
+	rcor = cl_reg->cl_rcor;
+	tbpr = cl_reg->cl_tbpr;
+	rpilr = cl_reg->cl_rpilr;
+	ier = cl_reg->cl_ier;
+	ccr = cl_reg->cl_ccr;
+	tcor = cl_reg->cl_tcor;
+	csr = cl_reg->cl_csr;
+	tpr = cl_reg->cl_tpr;
+	rts = cl_reg->cl_msvr_rts;
+	dtr = cl_reg->cl_msvr_dtr;
+	rtprl = cl_reg->cl_rtprl;
+	rtprh = cl_reg->cl_rtprh;
 	splx(s);
 
-	printf("{ port %x livr %x cmr %x\n", channel, livr, cmr);
+	printf("{ port %x livr %x cmr %x\n",
+		  channel,livr,   cmr);
 	printf("cor1 %x cor2 %x cor3 %x cor4 %x cor5 %x cor6 %x cor7 %x\n",
-	    cor1, cor2, cor3, cor4, cor5, cor6, cor7);
-	printf("schr1 %x schr2 %x schr3 %x schr4 %x\n", schr1, schr2, schr3,
-	    schr4);
-	printf("scrl %x scrh %x lnxt %x\n", scrl, scrh, lnxt);
-	printf("rbpr %x rcor %x tbpr %x tcor %x\n", rbpr, rcor, tbpr, tcor);
-	printf("rpilr %x rir %x ier %x ccr %x\n", rpilr, rir, ier, ccr);
-	printf("tpr %x csr %x rts %x dtr %x\n", tpr, csr, rts, dtr);
-	printf("rtprl %x rtprh %x\n", rtprl, rtprh);
-	printf("rxcnt %x txcnt %x\n", sc->sc_cl[channel].rxcnt,
-	    sc->sc_cl[channel].txcnt);
+		cor1,   cor2,   cor3,   cor4,   cor5,   cor6,   cor7);
+	printf("schr1 %x schr2 %x schr3 %x schr4 %x\n",
+		schr1,   schr2,   schr3,   schr4);
+	printf("scrl %x scrh %x lnxt %x\n",
+		scrl,   scrh,   lnxt);
+	printf("rbpr %x rcor %x tbpr %x tcor %x\n",
+		rbpr,   rcor,   tbpr,   tcor);
+	printf("rpilr %x rir %x ier %x ccr %x\n",
+		rpilr,   rir,   ier,   ccr);
+	printf("tpr %x csr %x rts %x dtr %x\n",
+		tpr,   csr,   rts,   dtr);
+	printf("rtprl %x rtprh %x\n",
+		rtprl,   rtprh);
+	printf("rxcnt %x txcnt %x\n",
+		sc->sc_cl[channel].rxcnt, sc->sc_cl[channel].txcnt);
 	printf("}\n");
+	return;
 }
diff --git a/sys/arch/mvme68k/dev/clreg.h b/sys/arch/mvme68k/dev/clreg.h
new file mode 100644
index 00000000000..4656c7c0007
--- /dev/null
+++ b/sys/arch/mvme68k/dev/clreg.h
@@ -0,0 +1,159 @@
+/*
+ * Copyright (c) 1995 Dale Rahn. All rights reserved.
+ *   
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *    must display the following acknowledgement:
+ *   This product includes software developed by Dale Rahn.
+ * 4. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */  
+
+struct clreg {
+	u_char	anon1[0x7];
+	u_char	cl_cor7;			/* 0x07 */
+	u_char	anon2[0x1];
+	u_char	cl_livr;			/* 0x09 */
+	u_char  anon3[0x6];
+	u_char	cl_cor1;			/* 0x10 */
+	u_char	cl_ier;				/* 0x11 */
+	u_char  cl_stcr;			/* 0x12 */
+	u_char	cl_ccr;				/* 0x13 */
+	u_char	cl_cor5;			/* 0x14 */
+	u_char	cl_cor4;			/* 0x15 */
+	u_char	cl_cor3;			/* 0x16 */
+	u_char	cl_cor2;			/* 0x17 */
+	u_char	cl_cor6;			/* 0x18 */
+	u_char	cl_dmabsts;			/* 0x19 */
+	u_char	cl_csr;				/* 0x1a */
+	u_char	cl_cmr;				/* 0x1b */
+	u_char  cl_schr4;			/* 0x1c */
+	u_char  cl_schr3;			/* 0x1d */
+	u_char  cl_schr2;			/* 0x1e */
+	u_char  cl_schr1;			/* 0x1f */
+	u_char	anon5[0x2];
+	u_char  cl_scrh;			/* 0x22 */
+	u_char  cl_scrl;			/* 0x23 */
+#define cl_rtpr rtpr.rtpr_rtpr
+#define cl_rtprh rtpr.hl.rtpr_rtprh
+#define cl_rtprl rtpr.hl.rtpr_rtprl
+	union {
+		u_short	rtpr_rtpr;		/* 0x24 */
+		struct {
+			u_char	rtpr_rtprh;	/* 0x24 */
+			u_char	rtpr_rtprl;	/* 0x25 */
+		} hl;
+	} rtpr;
+	u_char	cl_licr;			/* 0x26 */
+	u_char	anon6[0x7];
+	u_char	cl_lnxt;			/* 0x2e */
+	u_char	anon7[0x1];
+	u_char	cl_rfoc;			/* 0x30 */
+	u_char	anon8[0x7];
+	u_char	cl_rtbadru;			/* 0x38 */
+	u_char	anon9[0x1];
+	u_char	cl_rtbadrl;			/* 0x3a */
+	u_char	anona[0x1];
+	u_char	cl_rcbadru;			/* 0x3c */
+	u_char	anonb[0x1];
+	u_char	cl_rcbadrl;			/* 0x3e */
+	u_char	anonc[0x1];
+	u_char	cl_arbadru;			/* 0x40 */
+	u_char	anond[0x1];
+	u_char	cl_arbadrl;			/* 0x42 */
+	u_char	anone[0x1];
+	u_char	cl_brbadru;			/* 0x44 */
+	u_char	anonf[0x1];
+	u_char	cl_brbadrl;			/* 0x46 */
+	u_char	anong[0x1];
+	u_char	cl_brbcnt;			/* 0x48 */
+	u_char	anonh[0x1];
+	u_char	cl_arbcnt;			/* 0x4a */
+	u_char	anoni[0x3];
+	u_char	cl_brbsts;			/* 0x4e */
+	u_char	cl_arbsts;			/* 0x4f */
+	u_char	cl_atbadru;			/* 0x50 */
+	u_char	anonj[0x1];
+	u_char	cl_atbadrl;			/* 0x52 */
+	u_char	anonk[0x1];
+	u_char	cl_btbadru;			/* 0x54 */
+	u_char	anonl[0x1];
+	u_char	cl_btbadrl;			/* 0x56 */
+	u_char	anonm[0x1];
+	u_char	cl_btbcnt;			/* 0x58 */
+	u_char	anonn[0x1];
+	u_char	cl_atbcnt;			/* 0x5a */
+	u_char	anono[0x3];
+	u_char	cl_btbsts;			/* 0x5e */
+	u_char	cl_atbsts;			/* 0x5f */
+	u_char	anonp[0x20];
+	u_char	cl_tftc;			/* 0x80 */
+	u_char	cl_gfrcr;			/* 0x81 */
+	u_char	anonq[0x2];
+	u_char	cl_reoir;			/* 0x84 */
+	u_char	cl_teoir;			/* 0x85 */
+	u_char	cl_meoir;			/* 0x86 */
+	u_char	anonr[0x1];
+#define cl_risr risr.risr_risr
+#define cl_risrl risr.hl.risr_risrl
+#define cl_risrh risr.hl.risr_risrh
+	union {
+		u_short	risr_risr;		/* 0x88 */
+		struct {
+			u_char	risr_risrh;	/* 0x88 */
+			u_char	risr_risrl;	/* 0x89 */
+		} hl;
+	} risr;
+	u_char	cl_tisr;			/* 0x8a */
+	u_char	cl_misr;			/* 0x8b */
+	u_char	anons[0x2];
+	u_char	cl_bercnt;			/* 0x8e */
+	u_char	anont[0x31];
+	u_char	cl_tcor;			/* 0xc0 */
+	u_char	anonu[0x2];
+	u_char	cl_tbpr;			/* 0xc3 */
+	u_char	anonv[0x4];
+	u_char	cl_rcor;			/* 0xc8 */
+	u_char	anonw[0x2];
+	u_char	cl_rbpr;			/* 0xcb */
+	u_char	anonx[0xa];
+	u_char	cl_cpsr;			/* 0xd6 */
+	u_char	anony[0x3];
+	u_char	cl_tpr;				/* 0xda */
+	u_char	anonz[0x3];
+	u_char	cl_msvr_rts;			/* 0xde */
+	u_char	cl_msvr_dtr;			/* 0xdf */
+	u_char	cl_tpilr;			/* 0xe0 */
+	u_char	cl_rpilr;			/* 0xe1 */
+	u_char	cl_stk;				/* 0xe2 */
+	u_char	cl_mpilr;			/* 0xe3 */
+	u_char	anonA[0x8];
+	u_char	cl_tir;				/* 0xec */
+	u_char	cl_rir;				/* 0xed */
+	u_char	cl_car;				/* 0xee */
+	u_char	cl_mir;				/* 0xef */
+	u_char	anonB[0x6];
+	u_char	cl_dmr;				/* 0xf6 */
+	u_char	anonC[0x1];
+#define cl_rdr cl_tdr
+	u_char	cl_tdr;				/* 0xf8 */
+	u_char	anonD[7];
+};						/* 0x200 total */