In the 188 interrupt handler, only fiddle with the PSR once in the main loop.

1 files changed, 17 insertions, 10 deletions

diff --git a/sys/arch/mvme88k/mvme88k/m188_machdep.c b/sys/arch/mvme88k/mvme88k/m188_machdep.c
index 5478fbe535c..d8d67216038 100644
--- a/sys/arch/mvme88k/mvme88k/m188_machdep.c
+++ b/sys/arch/mvme88k/mvme88k/m188_machdep.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: m188_machdep.c,v 1.11 2005/12/03 14:30:06 miod Exp $	*/
+/*	$OpenBSD: m188_machdep.c,v 1.12 2005/12/04 14:58:43 miod Exp $	*/
 /*
  * Copyright (c) 1998, 1999, 2000, 2001 Steve Murphree, Jr.
  * Copyright (c) 1996 Nivas Madhur
@@ -157,10 +157,10 @@ m188_bootstrap()
 	md_raiseipl = &m188_raiseipl;
 
 	/* clear and disable all interrupts */
-	*int_mask_reg[0] = 0;
-	*int_mask_reg[1] = 0;
-	*int_mask_reg[2] = 0;
-	*int_mask_reg[3] = 0;
+	*(volatile u_int32_t *)IEN0_REG = 0;
+	*(volatile u_int32_t *)IEN1_REG = 0;
+	*(volatile u_int32_t *)IEN2_REG = 0;
+	*(volatile u_int32_t *)IEN3_REG = 0;
 }
 
 void
@@ -168,6 +168,7 @@ m188_reset()
 {
 	volatile int cnt;
 
+	/* clear and disable all interrupts */
 	*(volatile u_int32_t *)IEN0_REG = 0;
 	*(volatile u_int32_t *)IEN1_REG = 0;
 	*(volatile u_int32_t *)IEN2_REG = 0;
@@ -217,7 +218,7 @@ safe_level(u_int mask, u_int curlevel)
 {
 	int i;
 
-	for (i = curlevel; i < 8; i++)
+	for (i = curlevel; i < INT_LEVEL; i++)
 		if (!(int_mask_val[i] & mask))
 			return i;
 
@@ -298,6 +299,7 @@ m188_ext_int(u_int v, struct trapframe *eframe)
 	intrhand_t *list;
 	int ret, intbit;
 	u_int vec;
+	int unmasked = 0;
 
 	cur_mask = ISR_GET_CURRENT_MASK(cpu);
 	old_spl = m188_curspl[cpu];
@@ -323,6 +325,7 @@ m188_ext_int(u_int v, struct trapframe *eframe)
 	do {
 		level = safe_level(cur_mask, old_spl);
 
+#ifdef DIAGNOSTIC
 		if (old_spl >= level) {
 			int i;
 
@@ -333,12 +336,13 @@ m188_ext_int(u_int v, struct trapframe *eframe)
 			printf("\nCPU0 spl %d  CPU1 spl %d  CPU2 spl %d  CPU3 spl %d\n",
 			       m188_curspl[0], m188_curspl[1],
 			       m188_curspl[2], m188_curspl[3]);
-			for (i = 0; i < 8; i++)
+			for (i = 0; i < INT_LEVEL; i++)
 				printf("int_mask[%d] = 0x%08x\n", i, int_mask_val[i]);
 			printf("--CPU %d halted--\n", cpu_number());
 			setipl(IPL_ABORT);
 			for(;;) ;
 		}
+#endif
 
 #ifdef DEBUG
 		if (level > 7 || (int)level < 0) {
@@ -354,8 +358,9 @@ m188_ext_int(u_int v, struct trapframe *eframe)
 		 * For now, only the timer interrupt requires its condition
 		 * to be cleared before interrupts are enabled.
 		 */
-		if ((cur_mask & DTI_BIT) == 0) {
+		if (unmasked == 0 && (cur_mask & DTI_BIT) == 0) {
 			set_psr(get_psr() & ~PSR_IND);
+			unmasked = 1;
 		}
 
 		/* generate IACK and get the vector */
@@ -369,17 +374,19 @@ m188_ext_int(u_int v, struct trapframe *eframe)
 		/* find the first bit set in the current mask */
 		intbit = ff1(cur_mask);
 		if (OBIO_INTERRUPT_MASK & (1 << intbit)) {
-			vec = SYSCON_VECT + obio_vec[intbit];
+			vec = obio_vec[intbit];
 			if (vec == 0) {
 				panic("unknown onboard interrupt: mask = 0x%b",
 				    1 << intbit, IST_STRING);
 			}
+			vec += SYSCON_VECT;
 		} else if (HW_FAILURE_MASK & (1 << intbit)) {
-			vec = SYSCON_VECT + obio_vec[intbit];
+			vec = obio_vec[intbit];
 			if (vec == 0) {
 				panic("unknown hardware failure: mask = 0x%b",
 				    1 << intbit, IST_STRING);
 			}
+			vec += SYSCON_VECT;
 		} else if (VME_INTERRUPT_MASK & (1 << intbit)) {
 			vec = *(u_int32_t *)ivec[level] & VME_VECTOR_MASK;
 			if (vec & VME_BERR_MASK) {