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authorMiod Vallat <miod@cvs.openbsd.org>2009-05-24 17:31:08 +0000
committerMiod Vallat <miod@cvs.openbsd.org>2009-05-24 17:31:08 +0000
commit7759d1b406aab5978327e60c678d61de3ca582ea (patch)
treec457f2b0d856d3e1ad97230a253ecab98126bb8c
parent702537aa0dd31b28eaf4d82ee45d9c43c1d8adfb (diff)
Revert the memory range restriction code added to _dmamem_alloc(); devices
which require it will provide their own _dmamem_alloc() in their own bus_dma_tag_t. While there, rename bus_dma_segment_t ds_vaddr member to _ds_vaddr to make it clear this is an internal member.
-rw-r--r--sys/arch/sgi/include/bus.h5
-rw-r--r--sys/arch/sgi/sgi/bus_dma.c51
2 files changed, 15 insertions, 41 deletions
diff --git a/sys/arch/sgi/include/bus.h b/sys/arch/sgi/include/bus.h
index b5a3ba91fbd..de61e1fad1a 100644
--- a/sys/arch/sgi/include/bus.h
+++ b/sys/arch/sgi/include/bus.h
@@ -1,4 +1,4 @@
-/* $OpenBSD: bus.h,v 1.13 2009/04/20 00:42:06 oga Exp $ */
+/* $OpenBSD: bus.h,v 1.14 2009/05/24 17:31:05 miod Exp $ */
/*
* Copyright (c) 2003-2004 Opsycon AB Sweden. All rights reserved.
@@ -341,8 +341,9 @@ typedef struct machine_bus_dmamap *bus_dmamap_t;
*/
struct machine_bus_dma_segment {
bus_addr_t ds_addr; /* DMA address */
- bus_addr_t ds_vaddr; /* CPU address */
bus_size_t ds_len; /* length of transfer */
+
+ bus_addr_t _ds_vaddr; /* CPU address */
};
typedef struct machine_bus_dma_segment bus_dma_segment_t;
diff --git a/sys/arch/sgi/sgi/bus_dma.c b/sys/arch/sgi/sgi/bus_dma.c
index 0170d4a7a5f..a3969275f41 100644
--- a/sys/arch/sgi/sgi/bus_dma.c
+++ b/sys/arch/sgi/sgi/bus_dma.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: bus_dma.c,v 1.12 2009/05/08 20:55:20 miod Exp $ */
+/* $OpenBSD: bus_dma.c,v 1.13 2009/05/24 17:31:07 miod Exp $ */
/*
* Copyright (c) 2003-2004 Opsycon AB (www.opsycon.se / www.opsycon.com)
@@ -172,7 +172,7 @@ _dmamap_load(t, map, buf, buflen, p, flags)
map->dm_segs[seg].ds_addr =
(*t->_pa_to_device)(curaddr);
map->dm_segs[seg].ds_len = sgsize;
- map->dm_segs[seg].ds_vaddr = (vaddr_t)vaddr;
+ map->dm_segs[seg]._ds_vaddr = (vaddr_t)vaddr;
first = 0;
} else {
if (curaddr == lastaddr &&
@@ -188,7 +188,7 @@ _dmamap_load(t, map, buf, buflen, p, flags)
map->dm_segs[seg].ds_addr =
(*t->_pa_to_device)(curaddr);
map->dm_segs[seg].ds_len = sgsize;
- map->dm_segs[seg].ds_vaddr = (vaddr_t)vaddr;
+ map->dm_segs[seg]._ds_vaddr = (vaddr_t)vaddr;
}
}
@@ -249,7 +249,7 @@ _dmamap_load_mbuf(t, map, m, flags)
}
map->dm_segs[i].ds_addr =
(*t->_pa_to_device)(pa);
- map->dm_segs[i].ds_vaddr = vaddr;
+ map->dm_segs[i]._ds_vaddr = vaddr;
map->dm_segs[i].ds_len = incr;
i++;
vaddr += incr;
@@ -371,7 +371,7 @@ _dmamap_sync(t, map, addr, size, op)
bus_size_t ssize;
ssize = map->dm_segs[curseg].ds_len;
- vaddr = map->dm_segs[curseg].ds_vaddr;
+ vaddr = map->dm_segs[curseg]._ds_vaddr;
if (addr != 0) {
if (addr >= ssize) {
@@ -440,36 +440,8 @@ _dmamem_alloc(t, size, alignment, boundary, segs, nsegs, rsegs, flags)
int *rsegs;
int flags;
{
- vaddr_t low;
- vaddr_t high;
-
- /*
- * Limit bus_dma'able memory to the first 2GB of physical memory.
- * XXX This should be lifted if flags & BUS_DMA_64BIT for
- * XXX drivers which do not need 32 bit DMA on IP27/30/35.
- */
- switch (sys_config.system_type) {
-#if defined(TGT_OCTANE)
- case SGI_OCTANE:
- low = IP30_MEMORY_BASE;
- high = (2U << 30) - 1 + IP30_MEMORY_BASE;
- break;
-#endif
-#if defined(TGT_ORIGIN200) || defined(TGT_ORIGIN2000)
- case SGI_O200:
- case SGI_O300:
- low = 0;
- high = (2U << 30) - 1;
- break;
-#endif
- default:
- low = 0;
- high = (vaddr_t)-1;
- break;
- }
-
return _dmamem_alloc_range(t, size, alignment, boundary,
- segs, nsegs, rsegs, flags, low, high);
+ segs, nsegs, rsegs, flags, (vaddr_t)0, (vaddr_t)-1);
}
/*
@@ -521,13 +493,16 @@ _dmamem_map(t, segs, nsegs, size, kvap, flags)
bus_addr_t addr;
int curseg;
+#ifdef TGT_COHERENT
+ if (ISSET(flags, BUS_DMA_COHERENT))
+ CLR(flags, BUS_DMA_COHERENT);
+#endif
+
if (nsegs == 1) {
pa = (*t->_device_to_pa)(segs[0].ds_addr);
-#ifndef TGT_COHERENT
if (flags & BUS_DMA_COHERENT)
*kvap = (caddr_t)PHYS_TO_UNCACHED(pa);
else
-#endif
*kvap = (caddr_t)PHYS_TO_XKPHYS(pa, CCA_CACHED);
return (0);
}
@@ -549,10 +524,8 @@ _dmamem_map(t, segs, nsegs, size, kvap, flags)
pmap_enter(pmap_kernel(), va, pa,
VM_PROT_READ | VM_PROT_WRITE,
VM_PROT_READ | VM_PROT_WRITE | PMAP_WIRED);
- segs[curseg].ds_vaddr = va;
- if (flags & BUS_DMA_COHERENT &&
- sys_config.system_type == SGI_O2)
+ if (flags & BUS_DMA_COHERENT)
pmap_page_cache(PHYS_TO_VM_PAGE(pa),
PV_UNCACHED);
}