diff options
| author | Michael Shalayeff <mickey@cvs.openbsd.org> | 2003-02-11 19:20:29 +0000 |
|---|---|---|
| committer | Michael Shalayeff <mickey@cvs.openbsd.org> | 2003-02-11 19:20:29 +0000 |
| commit | 9f03a5af0492cb853685880bbbd9cbc622fa942f (patch) | |
| tree | 96c6440dfb40fb88110394ed46c228cde9f0922d | |
| parent | ba0bc613711d8eafa59eaaaad0a136d1566e7e36 (diff) | |
be consistant on Hz vs hz
55 files changed, 176 insertions, 176 deletions
diff --git a/sys/arch/alpha/tc/scc.c b/sys/arch/alpha/tc/scc.c index 9ec4912a9c7..706e681a18b 100644 --- a/sys/arch/alpha/tc/scc.c +++ b/sys/arch/alpha/tc/scc.c @@ -1,4 +1,4 @@ -/* $OpenBSD: scc.c,v 1.16 2002/05/27 20:07:06 deraadt Exp $ */ +/* $OpenBSD: scc.c,v 1.17 2003/02/11 19:20:25 mickey Exp $ */ /* $NetBSD: scc.c,v 1.58 2002/03/17 19:40:27 atatat Exp $ */ /* @@ -138,7 +138,7 @@ struct scc_softc { * BRGconstant = --------------------------- - 2 * 2 * BaudRate * ClockDivider * - * Speed selections with Pclk=7.3728Mhz, clock x16 + * Speed selections with Pclk=7.3728MHz, clock x16 */ struct speedtab sccspeedtab[] = { { 0, 0, }, diff --git a/sys/arch/hp300/hp300/clock.c b/sys/arch/hp300/hp300/clock.c index 17d6239dc71..a203b504ea0 100644 --- a/sys/arch/hp300/hp300/clock.c +++ b/sys/arch/hp300/hp300/clock.c @@ -1,4 +1,4 @@ -/* $OpenBSD: clock.c,v 1.7 2002/03/14 01:26:30 millert Exp $ */ +/* $OpenBSD: clock.c,v 1.8 2003/02/11 19:20:25 mickey Exp $ */ /* $NetBSD: clock.c,v 1.20 1997/04/27 20:43:38 thorpej Exp $ */ /* @@ -45,7 +45,7 @@ /* * HPs use the MC6840 PTM with the following arrangement: - * Timers 1 and 3 are externally driver from a 25Mhz source. + * Timers 1 and 3 are externally driver from a 25MHz source. * Output from timer 3 is tied to the input of timer 2. * The latter makes it possible to use timers 3 and 2 together to get * a 32-bit countdown timer. diff --git a/sys/arch/hp300/hp300/clockreg.h b/sys/arch/hp300/hp300/clockreg.h index fa76e6122dc..0d12987e580 100644 --- a/sys/arch/hp300/hp300/clockreg.h +++ b/sys/arch/hp300/hp300/clockreg.h @@ -1,4 +1,4 @@ -/* $OpenBSD: clockreg.h,v 1.2 1997/01/12 15:13:13 downsj Exp $ */ +/* $OpenBSD: clockreg.h,v 1.3 2003/02/11 19:20:26 mickey Exp $ */ /* $NetBSD: clockreg.h,v 1.5 1994/10/26 07:25:26 cgd Exp $ */ /* @@ -91,10 +91,10 @@ struct clkreg { #define CLK_INT3 0x04 /* interrupt flag for timer 3 (SR only) */ #define CLK_INTR 0x80 /* composite interrupt flag (SR only) */ -#define CLK_RESOLUTION 4 /* 4 usec resolution (250Khz) */ +#define CLK_RESOLUTION 4 /* 4 usec resolution (250KHz) */ #define CLK_INTERVAL 2500 /* 10msec interval at 250KHz */ #ifdef NOTDEF -#define CLK_INTERVAL 5000 /* 20msec interval at 250Khz */ +#define CLK_INTERVAL 5000 /* 20msec interval at 250KHz */ #endif /* diff --git a/sys/arch/hp300/include/cpu.h b/sys/arch/hp300/include/cpu.h index 9c664b5cf7c..66b7a8d1b12 100644 --- a/sys/arch/hp300/include/cpu.h +++ b/sys/arch/hp300/include/cpu.h @@ -1,4 +1,4 @@ -/* $OpenBSD: cpu.h,v 1.20 2002/06/07 21:33:43 nordin Exp $ */ +/* $OpenBSD: cpu.h,v 1.21 2003/02/11 19:20:26 mickey Exp $ */ /* $NetBSD: cpu.h,v 1.28 1998/02/13 07:41:51 scottr Exp $ */ /* @@ -117,7 +117,7 @@ extern int astpending; /* need to trap before returning to user mode */ * CTL_MACHDEP definitions. */ #define CPU_CONSDEV 1 /* dev_t: console terminal device */ -#define CPU_CPUSPEED 2 /* CPU speed in Mhz */ +#define CPU_CPUSPEED 2 /* CPU speed in MHz */ #define CPU_MACHINEID 3 /* machine id (HP_XXX) */ #define CPU_MMUID 4 /* mmu id (MMUID_*) */ #define CPU_MAXID 5 /* number of valid machdep ids */ diff --git a/sys/arch/hp300/include/hp300spu.h b/sys/arch/hp300/include/hp300spu.h index 1663f1cd27c..a7ec1e364d5 100644 --- a/sys/arch/hp300/include/hp300spu.h +++ b/sys/arch/hp300/include/hp300spu.h @@ -1,4 +1,4 @@ -/* $OpenBSD: hp300spu.h,v 1.5 2001/11/04 02:58:03 miod Exp $ */ +/* $OpenBSD: hp300spu.h,v 1.6 2003/02/11 19:20:26 mickey Exp $ */ /* $NetBSD: hp300spu.h,v 1.2 1997/05/01 05:26:48 thorpej Exp $ */ /*- @@ -68,7 +68,7 @@ #define MMUID_425_S 7 /* 425s - 25MHz Strider */ #define MMUID_433_T 4 /* 433t - 33MHz Trailways */ #define MMUID_433_S 6 /* 433s - 33MHz Strider */ -#define MMUID_425_E 9 /* 425e - 25Mhz Woody */ +#define MMUID_425_E 9 /* 425e - 25MHz Woody */ #define MMUID_SHIFT 8 /* left shift by this... */ #define MMUID_MASK 0xff /* ...and mask with this to get mmuid */ diff --git a/sys/arch/mac68k/dev/esp.c b/sys/arch/mac68k/dev/esp.c index 0cce56422aa..19f7021e19a 100644 --- a/sys/arch/mac68k/dev/esp.c +++ b/sys/arch/mac68k/dev/esp.c @@ -1,4 +1,4 @@ -/* $OpenBSD: esp.c,v 1.15 2002/03/14 01:26:35 millert Exp $ */ +/* $OpenBSD: esp.c,v 1.16 2003/02/11 19:20:26 mickey Exp $ */ /* $NetBSD: esp.c,v 1.59 1996/10/13 02:59:48 christos Exp $ */ /* @@ -212,7 +212,7 @@ espattach(parent, self, aux) sc->sc_id = 7; - /* gimme Mhz */ + /* gimme MHz */ sc->sc_freq /= 1000000; /* diff --git a/sys/arch/mvme68k/dev/sbic.c b/sys/arch/mvme68k/dev/sbic.c index 5a30ca3e007..6df0819013b 100644 --- a/sys/arch/mvme68k/dev/sbic.c +++ b/sys/arch/mvme68k/dev/sbic.c @@ -1,4 +1,4 @@ -/* $OpenBSD: sbic.c,v 1.11 2002/04/27 23:21:05 miod Exp $ */ +/* $OpenBSD: sbic.c,v 1.12 2003/02/11 19:20:26 mickey Exp $ */ /* $NetBSD: sbic.c,v 1.2 1996/04/23 16:32:54 chuck Exp $ */ /* @@ -2621,7 +2621,7 @@ sbictoscsiperiod(dev, a) /* * cycle = DIV / (2 * CLK) * DIV = FS + 2 - * best we can do is 200ns at 20Mhz, 2 cycles + * best we can do is 200ns at 20MHz, 2 cycles */ GET_SBIC_myid(dev->sc_sbicp, fs); diff --git a/sys/arch/mvme68k/dev/sbicreg.h b/sys/arch/mvme68k/dev/sbicreg.h index 8b8f359648c..b7e76e632b3 100644 --- a/sys/arch/mvme68k/dev/sbicreg.h +++ b/sys/arch/mvme68k/dev/sbicreg.h @@ -1,4 +1,4 @@ -/* $OpenBSD: sbicreg.h,v 1.4 2002/07/10 20:30:14 jsyn Exp $ */ +/* $OpenBSD: sbicreg.h,v 1.5 2003/02/11 19:20:26 mickey Exp $ */ /* * Copyright (c) 1990 The Regents of the University of California. @@ -105,10 +105,10 @@ * My ID register, and/or CDB Size */ -#define SBIC_ID_FS_8_10 0x00 /* Input clock is 8-10 Mhz */ - /* 11 Mhz is invalid */ -#define SBIC_ID_FS_12_15 0x40 /* Input clock is 12-15 Mhz */ -#define SBIC_ID_FS_16_20 0x80 /* Input clock is 16-20 Mhz */ +#define SBIC_ID_FS_8_10 0x00 /* Input clock is 8-10 MHz */ + /* 11 MHz is invalid */ +#define SBIC_ID_FS_12_15 0x40 /* Input clock is 12-15 MHz */ +#define SBIC_ID_FS_16_20 0x80 /* Input clock is 16-20 MHz */ #define SBIC_ID_EHP 0x10 /* Enable host parity */ #define SBIC_ID_EAF 0x08 /* Enable Advanced Features */ #define SBIC_ID_MASK 0x07 @@ -130,7 +130,7 @@ /* * Timeout period register - * [val in msecs, input clk in 0.1 Mhz] + * [val in msecs, input clk in 0.1 MHz] */ #define SBIC_TIMEOUT(val,clk) ((((val) * (clk)) / 800) + 1) diff --git a/sys/arch/mvme68k/dev/ssh.c b/sys/arch/mvme68k/dev/ssh.c index 1b835d3e5b7..76da2ca9579 100644 --- a/sys/arch/mvme68k/dev/ssh.c +++ b/sys/arch/mvme68k/dev/ssh.c @@ -1,4 +1,4 @@ -/* $OpenBSD: ssh.c,v 1.3 2002/04/27 23:21:05 miod Exp $ */ +/* $OpenBSD: ssh.c,v 1.4 2003/02/11 19:20:26 mickey Exp $ */ /* * Copyright (c) 1994 Michael L. Hitch @@ -1418,7 +1418,7 @@ sshintr(sc) } /* - * This is based on the Progressive Peripherals 33Mhz Zeus driver and will + * This is based on the Progressive Peripherals 33MHz Zeus driver and will * not be correct for other 53c710 boards. * */ diff --git a/sys/arch/mvme68k/dev/sshdma.c b/sys/arch/mvme68k/dev/sshdma.c index cf075cd58f5..32e2d098d2b 100644 --- a/sys/arch/mvme68k/dev/sshdma.c +++ b/sys/arch/mvme68k/dev/sshdma.c @@ -1,4 +1,4 @@ -/* $OpenBSD: sshdma.c,v 1.5 2002/09/17 21:54:56 miod Exp $ */ +/* $OpenBSD: sshdma.c,v 1.6 2003/02/11 19:20:26 mickey Exp $ */ /* * Copyright (c) 1995 Theo de Raadt @@ -116,7 +116,7 @@ void *auxp; */ sc->sc_clock_freq = cpuspeed * 2; #ifdef MVME177 - /* MVME177 ssh clock documented as fixed 50Mhz in VME177A/HX */ + /* MVME177 ssh clock documented as fixed 50MHz in VME177A/HX */ if (cputyp == CPU_177) sc->sc_clock_freq = 50; #endif diff --git a/sys/arch/mvme68k/dev/sshreg.h b/sys/arch/mvme68k/dev/sshreg.h index 9c4527f3ba3..cd64f7d0eb1 100644 --- a/sys/arch/mvme68k/dev/sshreg.h +++ b/sys/arch/mvme68k/dev/sshreg.h @@ -1,4 +1,4 @@ -/* $OpenBSD: sshreg.h,v 1.2 2002/04/21 23:44:29 miod Exp $ */ +/* $OpenBSD: sshreg.h,v 1.3 2003/02/11 19:20:26 mickey Exp $ */ /* * Copyright (c) 1995 Theo de Raadt @@ -324,10 +324,10 @@ typedef volatile ssh_regmap_t *ssh_regmap_p; /* DMA control register (dcntl) */ #define SSH_DCNTL_CF_MASK 0xc0 /* Clock frequency dividers: - 0 --> 37.51..50.00 Mhz, div=2 - 1 --> 25.01..37.50 Mhz, div=1.5 - 2 --> 16.67..25.00 Mhz, div=1 - 3 --> 50.01..66.67 Mhz, div=3 + 0 --> 37.51..50.00 MHz, div=2 + 1 --> 25.01..37.50 MHz, div=1.5 + 2 --> 16.67..25.00 MHz, div=1 + 3 --> 50.01..66.67 MHz, div=3 */ #define SSH_DCNTL_EA 0x20 /* Enable ack */ #define SSH_DCNTL_SSM 0x10 /* Single step mode */ diff --git a/sys/arch/mvme88k/dev/ssh.c b/sys/arch/mvme88k/dev/ssh.c index 545c8dbc6a1..415b6855040 100644 --- a/sys/arch/mvme88k/dev/ssh.c +++ b/sys/arch/mvme88k/dev/ssh.c @@ -1,4 +1,4 @@ -/* $OpenBSD: ssh.c,v 1.12 2002/03/14 01:26:39 millert Exp $ */ +/* $OpenBSD: ssh.c,v 1.13 2003/02/11 19:20:26 mickey Exp $ */ /* * Copyright (c) 1994 Michael L. Hitch @@ -108,7 +108,7 @@ int ssh_init_wait = SCSI_INIT_WAIT; #ifdef DEBUG_SYNC /* - * sync period transfer lookup - only valid for 66Mhz clock + * sync period transfer lookup - only valid for 66MHz clock */ static struct { unsigned char p; /* period from sync request message */ @@ -1786,7 +1786,7 @@ sshintr (sc) } /* - * This is based on the Progressive Peripherals 33Mhz Zeus driver and will + * This is based on the Progressive Peripherals 33MHz Zeus driver and will * not be correct for other 53c710 boards. * XXX fix this - nivas */ diff --git a/sys/arch/mvme88k/dev/sshreg.h b/sys/arch/mvme88k/dev/sshreg.h index eee64f1b4aa..232f555a979 100644 --- a/sys/arch/mvme88k/dev/sshreg.h +++ b/sys/arch/mvme88k/dev/sshreg.h @@ -1,4 +1,4 @@ -/* $OpenBSD: sshreg.h,v 1.2 2001/03/07 23:57:47 miod Exp $ */ +/* $OpenBSD: sshreg.h,v 1.3 2003/02/11 19:20:26 mickey Exp $ */ /* * Copyright (c) 1990 The Regents of the University of California. @@ -323,10 +323,10 @@ typedef volatile ssh_regmap_t *ssh_regmap_p; /* DMA control register (dcntl) */ #define SSH_DCNTL_CF_MASK 0xc0 /* Clock frequency dividers: - 0 --> 37.51..50.00 Mhz, div=2 - 1 --> 25.01..37.50 Mhz, div=1.5 - 2 --> 16.67..25.00 Mhz, div=1 - 3 --> 50.01..66.67 Mhz, div=3 + 0 --> 37.51..50.00 MHz, div=2 + 1 --> 25.01..37.50 MHz, div=1.5 + 2 --> 16.67..25.00 MHz, div=1 + 3 --> 50.01..66.67 MHz, div=3 */ #define SSH_DCNTL_EA 0x20 /* Enable ack */ #define SSH_DCNTL_SSM 0x10 /* Single step mode */ diff --git a/sys/arch/mvmeppc/dev/cpu.c b/sys/arch/mvmeppc/dev/cpu.c index 18e2d3b7430..468c7c84a19 100644 --- a/sys/arch/mvmeppc/dev/cpu.c +++ b/sys/arch/mvmeppc/dev/cpu.c @@ -1,4 +1,4 @@ -/* $OpenBSD: cpu.c,v 1.4 2002/06/08 15:49:52 miod Exp $ */ +/* $OpenBSD: cpu.c,v 1.5 2003/02/11 19:20:26 mickey Exp $ */ /* * Copyright (c) 1997 Per Fogelstrom @@ -145,9 +145,9 @@ cpuattach(parent, dev, aux) } if (clock_freq != 0) { - /* Openfirmware stores clock in HZ, not Mhz */ + /* Openfirmware stores clock in HZ, not MHz */ clock_freq /= 1000000; - printf(": %d Mhz", clock_freq); + printf(": %d MHz", clock_freq); } #endif diff --git a/sys/arch/sparc/dev/esp.c b/sys/arch/sparc/dev/esp.c index bc97c794a1a..85e23344de6 100644 --- a/sys/arch/sparc/dev/esp.c +++ b/sys/arch/sparc/dev/esp.c @@ -1,4 +1,4 @@ -/* $OpenBSD: esp.c,v 1.19 2002/04/30 01:12:29 art Exp $ */ +/* $OpenBSD: esp.c,v 1.20 2003/02/11 19:20:26 mickey Exp $ */ /* $NetBSD: esp.c,v 1.69 1997/08/27 11:24:18 bouyer Exp $ */ /* @@ -254,7 +254,7 @@ espattach(parent, self, aux) sc->sc_freq = ((struct sbus_softc *) sc->sc_dev.dv_parent)->sc_clockfreq; - /* gimme Mhz */ + /* gimme MHz */ sc->sc_freq /= 1000000; if (dmachild) { diff --git a/sys/arch/sparc/dev/magma.c b/sys/arch/sparc/dev/magma.c index 931711846ad..e5f91cf9f06 100644 --- a/sys/arch/sparc/dev/magma.c +++ b/sys/arch/sparc/dev/magma.c @@ -1,4 +1,4 @@ -/* $OpenBSD: magma.c,v 1.13 2002/04/30 01:12:29 art Exp $ */ +/* $OpenBSD: magma.c,v 1.14 2003/02/11 19:20:26 mickey Exp $ */ /* * magma.c * @@ -422,7 +422,7 @@ void *base; /* seemingly the Magma drivers just ignore the propstring */ cd->cd_chiprev = cd1400_read_reg(cd, CD1400_GFRCR); - dprintf(("%s attach CD1400 %d addr 0x%x rev %x clock %dMhz\n", sc->ms_dev.dv_xname, chip, cd->cd_reg, cd->cd_chiprev, cd->cd_clock)); + dprintf(("%s attach CD1400 %d addr 0x%x rev %x clock %dMHz\n", sc->ms_dev.dv_xname, chip, cd->cd_reg, cd->cd_chiprev, cd->cd_clock)); /* clear GFRCR */ cd1400_write_reg(cd, CD1400_GFRCR, 0x00); diff --git a/sys/arch/sparc/dev/magmareg.h b/sys/arch/sparc/dev/magmareg.h index 213f9f16551..35d3b9cfdbe 100644 --- a/sys/arch/sparc/dev/magmareg.h +++ b/sys/arch/sparc/dev/magmareg.h @@ -1,4 +1,4 @@ -/* $OpenBSD: magmareg.h,v 1.7 2002/03/14 01:26:43 millert Exp $ */ +/* $OpenBSD: magmareg.h,v 1.8 2003/02/11 19:20:26 mickey Exp $ */ /* magmareg.h * @@ -90,7 +90,7 @@ struct magma_board_info { struct cd1400 { __volatile u_char *cd_reg; /* chip registers */ int cd_chiprev; /* chip revision */ - int cd_clock; /* clock speed in Mhz */ + int cd_clock; /* clock speed in MHz */ int cd_parmode; /* parallel mode operation */ }; diff --git a/sys/arch/sparc/dev/spif.c b/sys/arch/sparc/dev/spif.c index 5bde86c4c4a..1d28652c70b 100644 --- a/sys/arch/sparc/dev/spif.c +++ b/sys/arch/sparc/dev/spif.c @@ -1,4 +1,4 @@ -/* $OpenBSD: spif.c,v 1.12 2002/04/30 01:12:29 art Exp $ */ +/* $OpenBSD: spif.c,v 1.13 2003/02/11 19:20:26 mickey Exp $ */ /* * Copyright (c) 1999 Jason L. Wright (jason@thought.net) @@ -203,7 +203,7 @@ spifattach(parent, self, aux) sc->sc_regs->stc.gscr1 = 0; sc->sc_regs->stc.gscr2 = 0; sc->sc_regs->stc.gscr3 = 0; - printf(": rev %x chiprev %x osc %sMhz stcpri %d ppcpri %d softpri %d\n", + printf(": rev %x chiprev %x osc %sMHz stcpri %d ppcpri %d softpri %d\n", sc->sc_rev, sc->sc_rev2, clockfreq(sc->sc_osc), stcpri, ppcpri, IPL_TTY); diff --git a/sys/arch/sparc/dev/spifreg.h b/sys/arch/sparc/dev/spifreg.h index 8a7481f37e7..b95e20fc8a9 100644 --- a/sys/arch/sparc/dev/spifreg.h +++ b/sys/arch/sparc/dev/spifreg.h @@ -1,4 +1,4 @@ -/* $OpenBSD: spifreg.h,v 1.8 2002/06/14 21:34:59 todd Exp $ */ +/* $OpenBSD: spifreg.h,v 1.9 2003/02/11 19:20:26 mickey Exp $ */ /* * Copyright (c) 1999 Jason L. Wright (jason@thought.net) @@ -387,8 +387,8 @@ struct spifregs { /* * "verosc" node tells which oscillator we have. */ -#define SPIF_OSC9 1 /* 9.8304 Mhz */ -#define SPIF_OSC10 2 /* 10Mhz */ +#define SPIF_OSC9 1 /* 9.8304 MHz */ +#define SPIF_OSC10 2 /* 10MHz */ /* * There are two interrupts, serial gets interrupt[0], and parallel diff --git a/sys/arch/sparc64/dev/psycho.c b/sys/arch/sparc64/dev/psycho.c index 09b9ddd72c6..951fa5ae12c 100644 --- a/sys/arch/sparc64/dev/psycho.c +++ b/sys/arch/sparc64/dev/psycho.c @@ -1,4 +1,4 @@ -/* $OpenBSD: psycho.c,v 1.25 2003/01/13 16:04:38 jason Exp $ */ +/* $OpenBSD: psycho.c,v 1.26 2003/02/11 19:20:26 mickey Exp $ */ /* $NetBSD: psycho.c,v 1.39 2001/10/07 20:30:41 eeh Exp $ */ /* @@ -142,7 +142,7 @@ struct cfdriver psycho_cd = { * * "psycho" and "psycho+" is a dual UPA to PCI bridge. It sits on the UPA bus * and manages two PCI buses. "psycho" has two 64-bit 33MHz buses, while - * "psycho+" controls both a 64-bit 33Mhz and a 64-bit 66Mhz PCI bus. You + * "psycho+" controls both a 64-bit 33MHz and a 64-bit 66MHz PCI bus. You * will usually find a "psycho+" since I don't think the original "psycho" * ever shipped, and if it did it would be in the U30. * diff --git a/sys/arch/vax/vsa/asc_vsbus.c b/sys/arch/vax/vsa/asc_vsbus.c index 7af06497102..4b934afa8cd 100644 --- a/sys/arch/vax/vsa/asc_vsbus.c +++ b/sys/arch/vax/vsa/asc_vsbus.c @@ -1,4 +1,4 @@ -/* $OpenBSD: asc_vsbus.c,v 1.5 2002/09/18 09:49:23 hugh Exp $ */ +/* $OpenBSD: asc_vsbus.c,v 1.6 2003/02/11 19:20:26 mickey Exp $ */ /* $NetBSD: asc_vsbus.c,v 1.22 2001/02/04 20:36:32 ragge Exp $ */ /*- @@ -280,7 +280,7 @@ asc_vsbus_attach(struct device *parent, struct device *self, void *aux) sc->sc_freq = ASC_FREQUENCY; - /* gimme Mhz */ + /* gimme MHz */ sc->sc_freq /= 1000000; scb_vecalloc(va->va_cvec, (void (*)(void *)) ncr53c9x_intr, diff --git a/sys/dev/ic/adwlib.c b/sys/dev/ic/adwlib.c index db69e12459b..8c3464b0a48 100644 --- a/sys/dev/ic/adwlib.c +++ b/sys/dev/ic/adwlib.c @@ -1,4 +1,4 @@ -/* $OpenBSD: adwlib.c,v 1.16 2002/03/14 01:26:53 millert Exp $ */ +/* $OpenBSD: adwlib.c,v 1.17 2003/02/11 19:20:27 mickey Exp $ */ /* $NetBSD: adwlib.c,v 1.20 2000/07/04 04:17:03 itojun Exp $ */ /* @@ -1463,7 +1463,7 @@ AdwASC38C1600Cabling(iot, ioh, cfg) * Each ASC-38C1600 function has two connectors. Only an HVD device * can not be connected to either connector. An LVD device or SE device * may be connected to either connecor. If an SE device is connected, - * then at most Ultra speed (20 Mhz) can be used on both connectors. + * then at most Ultra speed (20 MHz) can be used on both connectors. * * If an HVD device is attached, return an error. */ diff --git a/sys/dev/ic/aic6360.c b/sys/dev/ic/aic6360.c index fa5e31104cc..4a9bd055548 100644 --- a/sys/dev/ic/aic6360.c +++ b/sys/dev/ic/aic6360.c @@ -1,4 +1,4 @@ -/* $OpenBSD: aic6360.c,v 1.4 2002/03/14 01:26:53 millert Exp $ */ +/* $OpenBSD: aic6360.c,v 1.5 2003/02/11 19:20:27 mickey Exp $ */ /* $NetBSD: aic6360.c,v 1.52 1996/12/10 21:27:51 thorpej Exp $ */ #ifdef DDB @@ -269,7 +269,7 @@ aicattach(sc) * the chip's clock input and the size and offset of the sync period * register. * - * For a 20Mhz clock, this gives us 25, or 100nS, or 10MB/s, as a + * For a 20MHz clock, this gives us 25, or 100nS, or 10MB/s, as a * maximum transfer rate, and 112.5, or 450nS, or 2.22MB/s, as a * minimum transfer rate. */ diff --git a/sys/dev/ic/isp.c b/sys/dev/ic/isp.c index a2c31f71f0a..94dd3d5f523 100644 --- a/sys/dev/ic/isp.c +++ b/sys/dev/ic/isp.c @@ -1,4 +1,4 @@ -/* $OpenBSD: isp.c,v 1.28 2002/12/15 13:18:11 henning Exp $ */ +/* $OpenBSD: isp.c,v 1.29 2003/02/11 19:20:27 mickey Exp $ */ /* * Machine and OS Independent (well, as best as possible) * code for the Qlogic ISP SCSI adapters. @@ -397,7 +397,7 @@ isp_reset(struct ispsoftc *isp) isp_prt(isp, ISP_LOGCONFIG, "Ultra Mode Capable"); sdp->isp_ultramode = 1; /* - * If we're in Ultra Mode, we have to be 60Mhz clock- + * If we're in Ultra Mode, we have to be 60MHz clock- * even for the SBus version. */ isp->isp_clock = 60; diff --git a/sys/dev/ic/ncr53c9x.c b/sys/dev/ic/ncr53c9x.c index fd7709bfba4..75e556e6746 100644 --- a/sys/dev/ic/ncr53c9x.c +++ b/sys/dev/ic/ncr53c9x.c @@ -1,4 +1,4 @@ -/* $OpenBSD: ncr53c9x.c,v 1.17 2002/10/25 17:44:52 fgsch Exp $ */ +/* $OpenBSD: ncr53c9x.c,v 1.18 2003/02/11 19:20:27 mickey Exp $ */ /* $NetBSD: ncr53c9x.c,v 1.56 2000/11/30 14:41:46 thorpej Exp $ */ /* @@ -2668,8 +2668,8 @@ shortcut: * overhead to pay. For example, selecting, sending a message * and command and then doing some work can be done in one "pass". * - * The delay is a heuristic. It is 2 when at 20Mhz, 2 at 25Mhz and 1 - * at 40Mhz. This needs testing. + * The delay is a heuristic. It is 2 when at 20MHz, 2 at 25MHz and 1 + * at 40MHz. This needs testing. */ { struct timeval wait, cur; diff --git a/sys/dev/ic/ncr53c9xreg.h b/sys/dev/ic/ncr53c9xreg.h index fe21b94a01f..b26f446e0c5 100644 --- a/sys/dev/ic/ncr53c9xreg.h +++ b/sys/dev/ic/ncr53c9xreg.h @@ -1,4 +1,4 @@ -/* $OpenBSD: ncr53c9xreg.h,v 1.6 2001/09/27 04:01:42 jason Exp $ */ +/* $OpenBSD: ncr53c9xreg.h,v 1.7 2003/02/11 19:20:27 mickey Exp $ */ /* $NetBSD: ncr53c9xreg.h,v 1.4 1997/05/17 20:56:55 pk Exp $ */ /* @@ -122,14 +122,14 @@ #define NCRCFG1_BUSID 0x07 /* Bus ID */ #define NCR_CCF 0x09 /* WO - Clock Conversion Factor */ - /* 0 = 35.01 - 40Mhz */ + /* 0 = 35.01 - 40MHz */ /* NEVER SET TO 1 */ - /* 2 = 10Mhz */ - /* 3 = 10.01 - 15Mhz */ - /* 4 = 15.01 - 20Mhz */ - /* 5 = 20.01 - 25Mhz */ - /* 6 = 25.01 - 30Mhz */ - /* 7 = 30.01 - 35Mhz */ + /* 2 = 10MHz */ + /* 3 = 10.01 - 15MHz */ + /* 4 = 15.01 - 20MHz */ + /* 5 = 20.01 - 25MHz */ + /* 6 = 25.01 - 30MHz */ + /* 7 = 30.01 - 35MHz */ #define NCR_TEST 0x0a /* WO - Test (Chip Test Only) */ @@ -151,7 +151,7 @@ #define NCRCFG3_QTE 0x08 /* Queue Tag Enable */ #define NCRCFG3_CDB 0x04 /* CDB 10-bytes OK */ #define NCRCFG3_FSCSI 0x02 /* Fast SCSI */ -#define NCRCFG3_FCLK 0x01 /* Fast Clock (>25Mhz) */ +#define NCRCFG3_FCLK 0x01 /* Fast Clock (>25MHz) */ /* * For some unknown reason, the ESP406/FAS408 looks like every @@ -167,7 +167,7 @@ #define NCRESPCFG3_CDB 0x20 /* CDB 10-bytes OK */ #define NCRESPCFG3_FSCSI 0x10 /* Fast SCSI */ #define NCRESPCFG3_SRESB 0x08 /* Save Residual Byte */ -#define NCRESPCFG3_FCLK 0x04 /* Fast Clock (>25Mhz) */ +#define NCRESPCFG3_FCLK 0x04 /* Fast Clock (>25MHz) */ #define NCRESPCFG3_ADMA 0x02 /* Alternate DMA Mode */ #define NCRESPCFG3_T8M 0x01 /* Threshold 8 Mode */ @@ -177,7 +177,7 @@ #define NCRF9XCFG3_QTE 0x40 /* Queue Tag Enable */ #define NCRF9XCFG3_CDB 0x20 /* CDB 10-bytes OK */ #define NCRF9XCFG3_FSCSI 0x10 /* Fast SCSI */ -#define NCRF9XCFG3_FCLK 0x08 /* Fast Clock (>25Mhz) */ +#define NCRF9XCFG3_FCLK 0x08 /* Fast Clock (>25MHz) */ #define NCRF9XCFG3_SRESB 0x04 /* Save Residual Byte */ #define NCRF9XCFG3_ADMA 0x02 /* Alternate DMA Mode */ #define NCRF9XCFG3_T8M 0x01 /* Threshold 8 Mode */ diff --git a/sys/dev/ic/osiop.c b/sys/dev/ic/osiop.c index 3b264ecdb96..547c14da033 100644 --- a/sys/dev/ic/osiop.c +++ b/sys/dev/ic/osiop.c @@ -1,4 +1,4 @@ -/* $OpenBSD: osiop.c,v 1.2 2003/02/02 01:50:30 krw Exp $ */ +/* $OpenBSD: osiop.c,v 1.3 2003/02/11 19:20:27 mickey Exp $ */ /* $NetBSD: osiop.c,v 1.9 2002/04/05 18:27:54 bouyer Exp $ */ /* @@ -1855,7 +1855,7 @@ osiop_update_xfer_mode(sc, target) } /* - * This is based on the Progressive Peripherals 33Mhz Zeus driver and will + * This is based on the Progressive Peripherals 33MHz Zeus driver and will * not be correct for other 53c710 boards. * */ diff --git a/sys/dev/ic/osiopreg.h b/sys/dev/ic/osiopreg.h index 95690e1a977..a9de878d3cf 100644 --- a/sys/dev/ic/osiopreg.h +++ b/sys/dev/ic/osiopreg.h @@ -1,4 +1,4 @@ -/* $OpenBSD: osiopreg.h,v 1.1 2003/01/08 02:11:38 krw Exp $ */ +/* $OpenBSD: osiopreg.h,v 1.2 2003/02/11 19:20:27 mickey Exp $ */ /* $NetBSD: osiopreg.h,v 1.1 2001/04/30 04:47:51 tsutsui Exp $ */ /* @@ -367,10 +367,10 @@ /* DMA control register (dcntl) */ #define OSIOP_DCNTL_CF_MASK 0xc0 /* Clock frequency dividers: */ -#define OSIOP_DCNTL_CF_2 0x00 /* 0 --> 37.51..50.00 Mhz, div=2 */ -#define OSIOP_DCNTL_CF_1_5 0x40 /* 1 --> 25.01..37.50 Mhz, div=1.5 */ -#define OSIOP_DCNTL_CF_1 0x80 /* 2 --> 16.67..25.00 Mhz, div=1 */ -#define OSIOP_DCNTL_CF_3 0xc0 /* 3 --> 50.01..66.67 Mhz, div=3 */ +#define OSIOP_DCNTL_CF_2 0x00 /* 0 --> 37.51..50.00 MHz, div=2 */ +#define OSIOP_DCNTL_CF_1_5 0x40 /* 1 --> 25.01..37.50 MHz, div=1.5 */ +#define OSIOP_DCNTL_CF_1 0x80 /* 2 --> 16.67..25.00 MHz, div=1 */ +#define OSIOP_DCNTL_CF_3 0xc0 /* 3 --> 50.01..66.67 MHz, div=3 */ #define OSIOP_DCNTL_EA 0x20 /* Enable ACK */ #define OSIOP_DCNTL_SSM 0x10 /* Single step mode */ #define OSIOP_DCNTL_LLM 0x08 /* Enable SCSI Low-level mode */ diff --git a/sys/dev/ic/rtl81x9.c b/sys/dev/ic/rtl81x9.c index 22a8d7cb742..529926a1cf4 100644 --- a/sys/dev/ic/rtl81x9.c +++ b/sys/dev/ic/rtl81x9.c @@ -1,4 +1,4 @@ -/* $OpenBSD: rtl81x9.c,v 1.19 2002/10/15 16:02:10 mickey Exp $ */ +/* $OpenBSD: rtl81x9.c,v 1.20 2003/02/11 19:20:27 mickey Exp $ */ /* * Copyright (c) 1997, 1998 @@ -68,7 +68,7 @@ * levels. * * It's impossible given this rotten design to really achieve decent - * performance at 100Mbps, unless you happen to have a 400Mhz PII or + * performance at 100Mbps, unless you happen to have a 400MHz PII or * some equally overmuscled CPU to drive it. * * On the bright side, the 8139 does have a built-in PHY, although diff --git a/sys/dev/ic/siopreg.h b/sys/dev/ic/siopreg.h index cc22b87231b..632982be484 100644 --- a/sys/dev/ic/siopreg.h +++ b/sys/dev/ic/siopreg.h @@ -1,4 +1,4 @@ -/* $OpenBSD: siopreg.h,v 1.5 2002/09/16 00:53:12 krw Exp $ */ +/* $OpenBSD: siopreg.h,v 1.6 2003/02/11 19:20:27 mickey Exp $ */ /* $NetBSD: siopreg.h,v 1.13 2002/08/29 16:43:23 bouyer Exp $ */ /* @@ -82,27 +82,27 @@ struct scf_period { }; static const struct scf_period scf_period[] __attribute__((__unused__)) = { - {250, 25, 1}, /* 10.0 Mhz */ - {250, 37, 2}, /* 6.67 Mhz */ - {250, 50, 3}, /* 5.00 Mhz */ - {250, 75, 4}, /* 3.33 Mhz */ - {125, 12, 1}, /* 20.0 Mhz */ - {125, 18, 2}, /* 13.3 Mhz */ - {125, 25, 3}, /* 10.0 Mhz */ - {125, 37, 4}, /* 6.67 Mhz */ - {125, 50, 5}, /* 5.0 Mhz */ - { 62, 10, 1}, /* 40.0 Mhz */ - { 62, 12, 3}, /* 20.0 Mhz */ - { 62, 18, 4}, /* 13.3 Mhz */ - { 62, 25, 5}, /* 10.0 Mhz */ + {250, 25, 1}, /* 10.0 MHz */ + {250, 37, 2}, /* 6.67 MHz */ + {250, 50, 3}, /* 5.00 MHz */ + {250, 75, 4}, /* 3.33 MHz */ + {125, 12, 1}, /* 20.0 MHz */ + {125, 18, 2}, /* 13.3 MHz */ + {125, 25, 3}, /* 10.0 MHz */ + {125, 37, 4}, /* 6.67 MHz */ + {125, 50, 5}, /* 5.0 MHz */ + { 62, 10, 1}, /* 40.0 MHz */ + { 62, 12, 3}, /* 20.0 MHz */ + { 62, 18, 4}, /* 13.3 MHz */ + { 62, 25, 5}, /* 10.0 MHz */ }; static const struct scf_period dt_scf_period[] __attribute__((__unused__)) = { - { 62, 9, 1}, /* 80.0 Mhz */ - { 62, 10, 3}, /* 40.0 Mhz */ - { 62, 12, 5}, /* 20.0 Mhz */ - { 62, 18, 6}, /* 13.3 Mhz */ - { 62, 25, 7}, /* 10.0 Mhz */ + { 62, 9, 1}, /* 80.0 MHz */ + { 62, 10, 3}, /* 40.0 MHz */ + { 62, 12, 5}, /* 20.0 MHz */ + { 62, 18, 6}, /* 13.3 MHz */ + { 62, 25, 7}, /* 10.0 MHz */ }; #define SIOP_SCID 0x04 /* SCSI chip ID R/W */ diff --git a/sys/dev/ic/siopvar_common.h b/sys/dev/ic/siopvar_common.h index 9d27454910e..a7dd7da789c 100644 --- a/sys/dev/ic/siopvar_common.h +++ b/sys/dev/ic/siopvar_common.h @@ -1,4 +1,4 @@ -/* $OpenBSD: siopvar_common.h,v 1.12 2002/11/16 04:37:29 krw Exp $ */ +/* $OpenBSD: siopvar_common.h,v 1.13 2003/02/11 19:20:27 mickey Exp $ */ /* $NetBSD: siopvar_common.h,v 1.22 2002/10/23 02:32:36 christos Exp $ */ /* @@ -155,9 +155,9 @@ struct siop_common_softc { /* features */ #define SF_BUS_WIDE 0x00000001 /* wide bus */ -#define SF_BUS_ULTRA 0x00000002 /* Ultra (20Mhz) bus */ -#define SF_BUS_ULTRA2 0x00000004 /* Ultra2 (40Mhz) bus */ -#define SF_BUS_ULTRA3 0x00000008 /* Ultra3 (80Mhz) bus */ +#define SF_BUS_ULTRA 0x00000002 /* Ultra (20MHz) bus */ +#define SF_BUS_ULTRA2 0x00000004 /* Ultra2 (40MHz) bus */ +#define SF_BUS_ULTRA3 0x00000008 /* Ultra3 (80MHz) bus */ #define SF_BUS_DIFF 0x00000010 /* differential bus */ #define SF_CHIP_LED0 0x00000100 /* led on GPIO0 */ diff --git a/sys/dev/isa/ad1848.c b/sys/dev/isa/ad1848.c index 79f2786e029..da25e4d1e73 100644 --- a/sys/dev/isa/ad1848.c +++ b/sys/dev/isa/ad1848.c @@ -1,4 +1,4 @@ -/* $OpenBSD: ad1848.c,v 1.26 2002/06/14 21:34:59 todd Exp $ */ +/* $OpenBSD: ad1848.c,v 1.27 2003/02/11 19:20:27 mickey Exp $ */ /* $NetBSD: ad1848.c,v 1.45 1998/01/30 02:02:38 augustss Exp $ */ /* @@ -1338,7 +1338,7 @@ ad1848_set_speed(sc, argp) { /* * The sampling speed is encoded in the least significant nible of I8. The - * LSB selects the clock source (0=24.576 MHz, 1=16.9344 Mhz) and other + * LSB selects the clock source (0=24.576 MHz, 1=16.9344 MHz) and other * three bits select the divisor (indirectly): * * The available speeds are in the following table. Keep the speeds in diff --git a/sys/dev/isa/pasreg.h b/sys/dev/isa/pasreg.h index f8948f9f49e..33eb9b77027 100644 --- a/sys/dev/isa/pasreg.h +++ b/sys/dev/isa/pasreg.h @@ -1,4 +1,4 @@ -/* $OpenBSD: pasreg.h,v 1.2 1997/11/07 08:07:06 niklas Exp $ */ +/* $OpenBSD: pasreg.h,v 1.3 2003/02/11 19:20:27 mickey Exp $ */ /* $NetBSD: pasreg.h,v 1.2 1995/03/15 18:45:58 brezak Exp $ */ /* Port addresses and bit fields for the Media Vision Pro AudioSpectrum @@ -51,8 +51,8 @@ #define SYSTEM_CONFIGURATION_1 0x8388 /* R W Control */ #define S_C_1_PCS_ENABLE 0x01 /* R W PC speaker 1=enable, 0=disable PC speaker emulation */ - #define S_C_1_PCM_CLOCK_SELECT 0x02 /* R W PCM 1=14.31818Mhz/12, 0=28.224Mhz master clock */ - #define S_C_1_FM_EMULATE_CLOCK 0x04 /* R W FM 1=use 28.224Mhz/2, 0=use 14.31818Mhz clock */ + #define S_C_1_PCM_CLOCK_SELECT 0x02 /* R W PCM 1=14.31818MHz/12, 0=28.224MHz master clock */ + #define S_C_1_FM_EMULATE_CLOCK 0x04 /* R W FM 1=use 28.224MHz/2, 0=use 14.31818MHz clock */ #define S_C_1_PCS_STEREO 0x10 /* R W PC speaker 1=enable PC speaker stereo effect, 0=disable */ #define S_C_1_PCS_REALSOUND 0x20 /* R W PC speaker 1=enable RealSound enhancement, 0=disable */ #define S_C_1_FORCE_EXT_RESET 0x40 /* R W Control Force external reset */ @@ -61,7 +61,7 @@ #define S_C_2_PCM_OVERSAMPLING 0x03 /* R W PCM 00=0x, 01=2x, 10=4x, 11=reserved */ #define S_C_2_PCM_16_BIT 0x04 /* R W PCM 1=16-bit, 0=8-bit samples */ #define SYSTEM_CONFIGURATION_3 0x838A /* R W Control */ - #define S_C_3_PCM_CLOCK_SELECT 0x02 /* R W PCM 1=use 1.008Mhz clock for PCM, 0=don't */ + #define S_C_3_PCM_CLOCK_SELECT 0x02 /* R W PCM 1=use 1.008MHz clock for PCM, 0=don't */ #define SYSTEM_CONFIGURATION_4 0x838B /* R W Control CD-ROM interface controls */ #define IO_CONFIGURATION_1 0xF388 /* R W Control */ diff --git a/sys/dev/microcode/adw/adwmcode.h b/sys/dev/microcode/adw/adwmcode.h index 257e106b60e..c789f934035 100644 --- a/sys/dev/microcode/adw/adwmcode.h +++ b/sys/dev/microcode/adw/adwmcode.h @@ -1,4 +1,4 @@ -/* $OpenBSD: adwmcode.h,v 1.2 2002/03/14 01:26:57 millert Exp $ */ +/* $OpenBSD: adwmcode.h,v 1.3 2003/02/11 19:20:27 mickey Exp $ */ /* $NetBSD: adwmcode.h,v 1.5 2000/05/27 18:24:51 dante Exp $ */ /* @@ -127,11 +127,11 @@ struct adw_mcode { * 4-bit speed SDTR speed name * =========== =============== * 0000b (0x0) SDTR disabled - * 0001b (0x1) 5 Mhz - * 0010b (0x2) 10 Mhz - * 0011b (0x3) 20 Mhz (Ultra) - * 0100b (0x4) 40 Mhz (LVD/Ultra2) - * 0101b (0x5) 80 Mhz (LVD2/Ultra3) + * 0001b (0x1) 5 MHz + * 0010b (0x2) 10 MHz + * 0011b (0x3) 20 MHz (Ultra) + * 0100b (0x4) 40 MHz (LVD/Ultra2) + * 0101b (0x5) 80 MHz (LVD2/Ultra3) * 0110b (0x6) Undefined * ... * 1111b (0xF) Undefined diff --git a/sys/dev/mii/mtdphyreg.h b/sys/dev/mii/mtdphyreg.h index aa2c937765f..d20e5d9e00f 100644 --- a/sys/dev/mii/mtdphyreg.h +++ b/sys/dev/mii/mtdphyreg.h @@ -1,4 +1,4 @@ -/* $OpenBSD: mtdphyreg.h,v 1.1 1998/12/28 03:37:55 jason Exp $ */ +/* $OpenBSD: mtdphyreg.h,v 1.2 2003/02/11 19:20:27 mickey Exp $ */ /* * Copyright (c) 1998 Jason L. Wright (jason@thought.net) @@ -64,8 +64,8 @@ #define PCR_TODIS 0x2000 /* Descrambler Time Out Disable */ #define PCR_RPTR 0x1000 /* Enable Repeater mode */ #define PCR_ENCSEL 0x0800 /* PMD ENCSEL pin control */ -#define PCR_20MENB 0x0100 /* 20Mhz output enable */ -#define PCR_25MDIS 0x0080 /* 25Mhz output disable */ +#define PCR_20MENB 0x0100 /* 20MHz output enable */ +#define PCR_25MDIS 0x0080 /* 25MHz output disable */ #define PCR_FGLNKTX 0x0040 /* Force link status good */ #define PCR_FCONNT 0x0020 /* Bypass disconnect function */ #define PCR_TXOFF 0x0010 /* Turn off TX */ diff --git a/sys/dev/pci/bktr/bktr_audio.c b/sys/dev/pci/bktr/bktr_audio.c index ecb4912e49e..02a8fc61439 100644 --- a/sys/dev/pci/bktr/bktr_audio.c +++ b/sys/dev/pci/bktr/bktr_audio.c @@ -1,4 +1,4 @@ -/* $OpenBSD: bktr_audio.c,v 1.2 2003/01/04 22:36:12 deraadt Exp $ */ +/* $OpenBSD: bktr_audio.c,v 1.3 2003/02/11 19:20:28 mickey Exp $ */ /* $FreeBSD: src/sys/dev/bktr/bktr_audio.c,v 1.8 2000/10/31 13:09:56 roger Exp $ */ /* * This is part of the Driver for Video Capture Cards (Frame grabbers) @@ -596,7 +596,7 @@ void msp_autodetect( bktr_ptr_t bktr ) { } - /* uncomment the following line to enable the MSP34xx 1Khz Tone Generator */ + /* uncomment the following line to enable the MSP34xx 1KHz Tone Generator */ /* turn your speaker volume down low before trying this */ /* msp_dpl_write(bktr, bktr->msp_addr, 0x12, 0x0014, 0x7f40); */ } diff --git a/sys/dev/pci/bktr/bktr_core.c b/sys/dev/pci/bktr/bktr_core.c index 1c6607ea9d3..c4ceede3427 100644 --- a/sys/dev/pci/bktr/bktr_core.c +++ b/sys/dev/pci/bktr/bktr_core.c @@ -1,4 +1,4 @@ -/* $OpenBSD: bktr_core.c,v 1.9 2003/01/21 19:55:13 mickey Exp $ */ +/* $OpenBSD: bktr_core.c,v 1.10 2003/02/11 19:20:28 mickey Exp $ */ /* $FreeBSD: src/sys/dev/bktr/bktr_core.c,v 1.114 2000/10/31 13:09:56 roger Exp $ */ /* @@ -1005,7 +1005,7 @@ video_open( bktr_ptr_t bktr ) OUTB(bktr, BKTR_BDELAY, format_params[bktr->format_params].bdelay); frame_rate = format_params[bktr->format_params].frame_rate; - /* enable PLL mode using 28Mhz crystal for PAL/SECAM users */ + /* enable PLL mode using 28MHz crystal for PAL/SECAM users */ if (bktr->xtal_pll_mode == BT848_USE_PLL) { OUTB(bktr, BKTR_TGCTRL, 0); OUTB(bktr, BKTR_PLL_F_LO, 0xf9); diff --git a/sys/dev/pci/bktr/bktr_tuner.c b/sys/dev/pci/bktr/bktr_tuner.c index 5d9b657f960..31b93309f34 100644 --- a/sys/dev/pci/bktr/bktr_tuner.c +++ b/sys/dev/pci/bktr/bktr_tuner.c @@ -1,4 +1,4 @@ -/* $OpenBSD: bktr_tuner.c,v 1.2 2002/04/30 23:18:38 mickey Exp $ */ +/* $OpenBSD: bktr_tuner.c,v 1.3 2003/02/11 19:20:28 mickey Exp $ */ /* $FreeBSD: src/sys/dev/bktr/bktr_tuner.c,v 1.9 2000/10/19 07:33:28 roger Exp $ */ /* @@ -718,17 +718,17 @@ void select_tuner( bktr_ptr_t bktr, int tuner_type ) { * Tuner Notes: * Programming the tuner properly is quite complicated. * Here are some notes, based on a FM1246 data sheet for a PAL-I tuner. - * The tuner (front end) covers 45.75 Mhz - 855.25 Mhz and an FM band of - * 87.5 Mhz to 108.0 Mhz. + * The tuner (front end) covers 45.75 MHz - 855.25 MHz and an FM band of + * 87.5 MHz to 108.0 MHz. * * RF and IF. RF = radio frequencies, it is the transmitted signal. * IF is the Intermediate Frequency (the offset from the base * signal where the video, color, audio and NICAM signals are. * - * Eg, Picture at 38.9 Mhz, Colour at 34.47 MHz, sound at 32.9 MHz - * NICAM at 32.348 Mhz. + * Eg, Picture at 38.9 MHz, Colour at 34.47 MHz, sound at 32.9 MHz + * NICAM at 32.348 MHz. * Strangely enough, there is an IF (intermediate frequency) for - * FM Radio which is 10.7 Mhz. + * FM Radio which is 10.7 MHz. * * The tuner also works in Bands. Philips bands are * FM radio band 87.50 to 108.00 MHz diff --git a/sys/dev/pci/if_bge.c b/sys/dev/pci/if_bge.c index 5bf51d3bcc4..320091ed349 100644 --- a/sys/dev/pci/if_bge.c +++ b/sys/dev/pci/if_bge.c @@ -1,4 +1,4 @@ -/* $OpenBSD: if_bge.c,v 1.18 2003/01/15 06:31:24 art Exp $ */ +/* $OpenBSD: if_bge.c,v 1.19 2003/02/11 19:20:27 mickey Exp $ */ /* * Copyright (c) 2001 Wind River Systems * Copyright (c) 1997, 1998, 1999, 2001 @@ -55,7 +55,7 @@ * into the driver. * * The BCM5700 supports the PCI v2.2 and PCI-X v1.0 standards, and will - * function in a 32-bit/64-bit 33/66Mhz bus, or a 64-bit/133Mhz bus. + * function in a 32-bit/64-bit 33/66MHz bus, or a 64-bit/133MHz bus. * * The BCM5701 is a single-chip solution incorporating both the BCM5700 * MAC and a BCM5401 10/100/1000 PHY. Unlike the BCM5700, the BCM5701 @@ -1035,7 +1035,7 @@ bge_chipinit(sc) BGE_PCI_READ_BNDRY_1024); #endif - /* Set the timer prescaler (always 66Mhz) */ + /* Set the timer prescaler (always 66MHz) */ CSR_WRITE_4(sc, BGE_MISC_CFG, 65 << 1/*BGE_32BITTIME_66MHZ*/); return(0); diff --git a/sys/dev/pci/if_em_hw.h b/sys/dev/pci/if_em_hw.h index f4b498dc7a8..b5dc3cd5520 100644 --- a/sys/dev/pci/if_em_hw.h +++ b/sys/dev/pci/if_em_hw.h @@ -951,7 +951,7 @@ struct em_hw { #define E1000_STATUS_SPEED_1000 0x00000080 /* Speed 1000Mb/s */ #define E1000_STATUS_ASDV 0x00000300 /* Auto speed detect value */ #define E1000_STATUS_MTXCKOK 0x00000400 /* MTX clock running OK */ -#define E1000_STATUS_PCI66 0x00000800 /* In 66Mhz slot */ +#define E1000_STATUS_PCI66 0x00000800 /* In 66MHz slot */ #define E1000_STATUS_BUS64 0x00001000 /* In 64 bit slot */ #define E1000_STATUS_PCIX_MODE 0x00002000 /* PCI-X mode */ #define E1000_STATUS_PCIX_SPEED 0x0000C000 /* PCI-X bus speed */ diff --git a/sys/dev/pci/if_lmc_media.c b/sys/dev/pci/if_lmc_media.c index fef70e20ed8..dfff7eb775b 100644 --- a/sys/dev/pci/if_lmc_media.c +++ b/sys/dev/pci/if_lmc_media.c @@ -1,5 +1,5 @@ -/* $OpenBSD: if_lmc_media.c,v 1.12 2001/11/06 19:53:19 miod Exp $ */ -/* $Id: if_lmc_media.c,v 1.12 2001/11/06 19:53:19 miod Exp $ */ +/* $OpenBSD: if_lmc_media.c,v 1.13 2003/02/11 19:20:27 mickey Exp $ */ +/* $Id: if_lmc_media.c,v 1.13 2003/02/11 19:20:27 mickey Exp $ */ /*- * Copyright (c) 1997-1999 LAN Media Corporation (LMC) @@ -661,10 +661,10 @@ lmc_ssi_set_speed(lmc_softc_t * const sc, lmc_ctl_t *ctl) lmc_av9110_t *av; /* original settings for clock rate of: - * 100 Khz (8,25,0,0,2) were incorrect + * 100 KHz (8,25,0,0,2) were incorrect * they should have been 80,125,1,3,3 * There are 17 param combinations to produce this freq. - * For 1.5 Mhz use 120,100,1,1,2 (226 param. combinations) + * For 1.5 MHz use 120,100,1,1,2 (226 param. combinations) */ if (ctl == NULL) { av = &ictl->cardspec.ssi; diff --git a/sys/dev/pci/if_skreg.h b/sys/dev/pci/if_skreg.h index d3e98c70935..cbb331207a3 100644 --- a/sys/dev/pci/if_skreg.h +++ b/sys/dev/pci/if_skreg.h @@ -1,4 +1,4 @@ -/* $OpenBSD: if_skreg.h,v 1.6 2001/06/23 22:03:12 fgsch Exp $ */ +/* $OpenBSD: if_skreg.h,v 1.7 2003/02/11 19:20:27 mickey Exp $ */ /* * Copyright (c) 1997, 1998, 1999, 2000 @@ -151,7 +151,7 @@ #define SK_CSR_SW_IRQ_CLEAR 0x0040 #define SK_CSR_SW_IRQ_SET 0x0080 #define SK_CSR_SLOTSIZE 0x0100 /* 1 == 64 bits, 0 == 32 */ -#define SK_CSR_BUSCLOCK 0x0200 /* 1 == 33/66 Mhz, = 33 */ +#define SK_CSR_BUSCLOCK 0x0200 /* 1 == 33/66 MHz, = 33 */ /* SK_LED register */ #define SK_LED_GREEN_OFF 0x01 diff --git a/sys/dev/pci/ncr.c b/sys/dev/pci/ncr.c index 74f23f8e552..d3912d16865 100644 --- a/sys/dev/pci/ncr.c +++ b/sys/dev/pci/ncr.c @@ -1,4 +1,4 @@ -/* $OpenBSD: ncr.c,v 1.65 2003/01/05 22:41:35 deraadt Exp $ */ +/* $OpenBSD: ncr.c,v 1.66 2003/02/11 19:20:27 mickey Exp $ */ /* $NetBSD: ncr.c,v 1.63 1997/09/23 02:39:15 perry Exp $ */ /************************************************************************** @@ -1466,7 +1466,7 @@ static void ncr_attach (pcici_t tag, int unit); #if 0 static char ident[] = - "\n$OpenBSD: ncr.c,v 1.65 2003/01/05 22:41:35 deraadt Exp $\n"; + "\n$OpenBSD: ncr.c,v 1.66 2003/02/11 19:20:27 mickey Exp $\n"; #endif static const u_long ncr_version = NCR_VERSION * 11 @@ -7818,13 +7818,13 @@ static u_long ncr_lookup(char * id) ** Note: we have to return the correct value. ** THERE IS NO SAVE DEFAULT VALUE. ** -** Most NCR/SYMBIOS boards are delivered with a 40 Mhz clock. +** Most NCR/SYMBIOS boards are delivered with a 40 MHz clock. ** 53C860 and 53C875 rev. 1 support fast20 transfers but ** do not have a clock doubler and so are provided with a ** 80 MHz clock. All other fast20 boards incorporate a doubler ** and so should be delivered with a 40 MHz clock. -** The future fast40 chips (895/895) use a 40 Mhz base clock -** and provide a clock quadrupler (160 Mhz). The code below +** The future fast40 chips (895/895) use a 40 MHz base clock +** and provide a clock quadrupler (160 MHz). The code below ** tries to deal as cleverly as possible with all this stuff. ** **---------------------------------------------------------- @@ -7931,9 +7931,9 @@ static void ncr_getclock (ncb_p np, u_char multiplier) printf ("\tNCR clock is %uKHz, %uKHz\n", f1, f2); if (f1 > f2) f1 = f2; /* trust lower result */ if (f1 > 45000) { - scntl3 = 5; /* >45Mhz: assume 80MHz */ + scntl3 = 5; /* >45MHz: assume 80MHz */ } else { - scntl3 = 3; /* <45Mhz: assume 40MHz */ + scntl3 = 3; /* <45MHz: assume 40MHz */ } } else if ((scntl3 & 7) == 5) diff --git a/sys/dev/pci/noctreg.h b/sys/dev/pci/noctreg.h index cc38ef0194a..4570ae1c411 100644 --- a/sys/dev/pci/noctreg.h +++ b/sys/dev/pci/noctreg.h @@ -1,4 +1,4 @@ -/* $OpenBSD: noctreg.h,v 1.6 2002/07/16 22:44:31 jason Exp $ */ +/* $OpenBSD: noctreg.h,v 1.7 2003/02/11 19:20:28 mickey Exp $ */ /* * Copyright (c) 2002 Jason L. Wright (jason@thought.net) @@ -311,7 +311,7 @@ union noct_pkh_cmd { /* NOCT_EA_SDRAM_CFG */ #define EASDRC_8KREFRESH 0x00000080 /* 8K refreshes/64ms */ -#define EASDRC_FREQ 0x0000003f /* in Mhz */ +#define EASDRC_FREQ 0x0000003f /* in MHz */ /* NOCT_RNG_CTL */ #define RNGCTL_RNG_ENA 0x80000000 /* rng enable */ diff --git a/sys/dev/pci/pucdata.c b/sys/dev/pci/pucdata.c index f85ae39ddaa..7e99d38bca1 100644 --- a/sys/dev/pci/pucdata.c +++ b/sys/dev/pci/pucdata.c @@ -1,4 +1,4 @@ -/* $OpenBSD: pucdata.c,v 1.24 2002/11/30 01:11:46 fgsch Exp $ */ +/* $OpenBSD: pucdata.c,v 1.25 2003/02/11 19:20:28 mickey Exp $ */ /* $NetBSD: pucdata.c,v 1.6 1999/07/03 05:55:23 cgd Exp $ */ /* @@ -589,8 +589,8 @@ const struct puc_device_description puc_devices[] = { * VScom PCI 400H and 800H. Uses 4/8 16950 UART, behind a PCI chips * that offers 4 com port on PCI device 0 (both 400H and 800H) * and 4 on PCI device 1 (800H only). PCI device 0 has - * device ID 3 and PCI device 1 device ID 4. Uses a 14.7456 Mhz crystal - * instead of the standart 1.8432Mhz. + * device ID 3 and PCI device 1 device ID 4. Uses a 14.7456 MHz crystal + * instead of the standart 1.8432MHz. * There's a version with a jumper for selecting the crystal frequency, * defaults to 8x as used here. The jumperless version uses 8x, too. */ diff --git a/sys/dev/pci/sv.c b/sys/dev/pci/sv.c index 787f0b49059..0b092dc7084 100644 --- a/sys/dev/pci/sv.c +++ b/sys/dev/pci/sv.c @@ -1,4 +1,4 @@ -/* $OpenBSD: sv.c,v 1.14 2002/06/11 06:04:17 nordin Exp $ */ +/* $OpenBSD: sv.c,v 1.15 2003/02/11 19:20:28 mickey Exp $ */ /* * Copyright (c) 1998 Constantine Paul Sapuntzakis @@ -761,7 +761,7 @@ sv_set_params(addr, setmode, usemode, p, r) with the constraint that: - 80 MhZ < (m + 2) / (n + 2) * f_ref <= 150Mhz + 80 MhZ < (m + 2) / (n + 2) * f_ref <= 150MHz and n, m >= 1 */ diff --git a/sys/dev/pcmcia/gpr.c b/sys/dev/pcmcia/gpr.c index de96d1f9722..60a6ab36426 100644 --- a/sys/dev/pcmcia/gpr.c +++ b/sys/dev/pcmcia/gpr.c @@ -1,4 +1,4 @@ -/* $OpenBSD: gpr.c,v 1.8 2002/11/10 03:57:25 fgsch Exp $ */ +/* $OpenBSD: gpr.c,v 1.9 2003/02/11 19:20:28 mickey Exp $ */ /* * Copyright (c) 2002, Federico G. Schwindt @@ -78,7 +78,7 @@ #define GPR400_SELECT 0x50 /* Select card */ #define GPR400_DRV0 0x00 /* Downloaded driver 0 */ #define GPR400_ISODRV 0x02 /* ISO7816-3 driver */ -#define GPR400_CLK_MASK 0x08 /* 0: 3.68Mhz, 1: 7.36Mhz */ +#define GPR400_CLK_MASK 0x08 /* 0: 3.68MHz, 1: 7.36MHz */ #define GPR400_STATUS 0xA0 /* Reader status */ #define GPR400_CONT 0x04 /* Chain block */ diff --git a/sys/dev/pcmcia/if_xe.c b/sys/dev/pcmcia/if_xe.c index b238aa636fb..87eda3fa4b2 100644 --- a/sys/dev/pcmcia/if_xe.c +++ b/sys/dev/pcmcia/if_xe.c @@ -1,4 +1,4 @@ -/* $OpenBSD: if_xe.c,v 1.24 2002/03/14 01:27:01 millert Exp $ */ +/* $OpenBSD: if_xe.c,v 1.25 2003/02/11 19:20:28 mickey Exp $ */ /* * Copyright (c) 1999 Niklas Hallqvist, Brandon Creighton, Job de Haas @@ -1407,7 +1407,7 @@ xe_full_reset(sc) PAGE(sc, 4); /* * Drive GP1 low to power up ML6692 and GP2 high to power up - * the 10Mhz chip. XXX What chip is that? The phy? + * the 10MHz chip. XXX What chip is that? The phy? */ bus_space_write_1(bst, bsh, offset + GP0, GP1_OUT | GP2_OUT | GP2_WR); diff --git a/sys/dev/sbus/esp_sbus.c b/sys/dev/sbus/esp_sbus.c index 204400f5500..61cdfd24bc6 100644 --- a/sys/dev/sbus/esp_sbus.c +++ b/sys/dev/sbus/esp_sbus.c @@ -1,4 +1,4 @@ -/* $OpenBSD: esp_sbus.c,v 1.9 2003/02/09 09:25:11 jason Exp $ */ +/* $OpenBSD: esp_sbus.c,v 1.10 2003/02/11 19:20:28 mickey Exp $ */ /* $NetBSD: esp_sbus.c,v 1.14 2001/04/25 17:53:37 bouyer Exp $ */ /*- @@ -445,7 +445,7 @@ espattach(esc, gluep) */ sc->sc_glue = gluep; - /* gimme Mhz */ + /* gimme MHz */ sc->sc_freq /= 1000000; /* diff --git a/sys/dev/sbus/magma.c b/sys/dev/sbus/magma.c index 7e749d212e5..35c1a0b3346 100644 --- a/sys/dev/sbus/magma.c +++ b/sys/dev/sbus/magma.c @@ -1,4 +1,4 @@ -/* $OpenBSD: magma.c,v 1.5 2002/03/14 04:18:05 jason Exp $ */ +/* $OpenBSD: magma.c,v 1.6 2003/02/11 19:20:28 mickey Exp $ */ /* * magma.c * @@ -422,7 +422,7 @@ magma_attach(parent, dev, aux) /* seemingly the Magma drivers just ignore the propstring */ cd->cd_chiprev = cd1400_read_reg(cd, CD1400_GFRCR); - dprintf(("%s attach CD1400 %d addr 0x%x rev %x clock %dMhz\n", + dprintf(("%s attach CD1400 %d addr 0x%x rev %x clock %dMHz\n", sc->ms_dev.dv_xname, chip, cd->cd_reg, cd->cd_chiprev, cd->cd_clock)); diff --git a/sys/dev/sbus/magmareg.h b/sys/dev/sbus/magmareg.h index bbfb7ec2a70..0d122438d56 100644 --- a/sys/dev/sbus/magmareg.h +++ b/sys/dev/sbus/magmareg.h @@ -1,4 +1,4 @@ -/* $OpenBSD: magmareg.h,v 1.5 2002/03/14 01:27:02 millert Exp $ */ +/* $OpenBSD: magmareg.h,v 1.6 2003/02/11 19:20:28 mickey Exp $ */ /* magmareg.h * @@ -91,7 +91,7 @@ struct cd1400 { bus_space_handle_t cd_regh; /* chip register handle */ bus_space_tag_t cd_regt; /* chip register tag */ int cd_chiprev; /* chip revision */ - int cd_clock; /* clock speed in Mhz */ + int cd_clock; /* clock speed in MHz */ int cd_parmode; /* parallel mode operation */ }; diff --git a/sys/dev/sbus/spif.c b/sys/dev/sbus/spif.c index 4e673dc807e..9bfe8ff564c 100644 --- a/sys/dev/sbus/spif.c +++ b/sys/dev/sbus/spif.c @@ -1,4 +1,4 @@ -/* $OpenBSD: spif.c,v 1.4 2002/04/08 17:49:42 jason Exp $ */ +/* $OpenBSD: spif.c,v 1.5 2003/02/11 19:20:28 mickey Exp $ */ /* * Copyright (c) 1999-2002 Jason L. Wright (jason@thought.net) @@ -275,7 +275,7 @@ spifattach(parent, self, aux) STC_WRITE(sc, STC_GSCR2, 0); STC_WRITE(sc, STC_GSCR3, 0); - printf(": rev %x chiprev %x osc %sMhz\n", + printf(": rev %x chiprev %x osc %sMHz\n", sc->sc_rev, sc->sc_rev2, clockfreq(sc->sc_osc)); (void)config_found(self, sttymatch, NULL); diff --git a/sys/dev/sbus/spifreg.h b/sys/dev/sbus/spifreg.h index 17672851d24..afb4e43ac0b 100644 --- a/sys/dev/sbus/spifreg.h +++ b/sys/dev/sbus/spifreg.h @@ -1,4 +1,4 @@ -/* $OpenBSD: spifreg.h,v 1.3 2002/06/14 21:34:59 todd Exp $ */ +/* $OpenBSD: spifreg.h,v 1.4 2003/02/11 19:20:28 mickey Exp $ */ /* * Copyright (c) 1999-2002 Jason L. Wright (jason@thought.net) @@ -362,8 +362,8 @@ /* * "verosc" node tells which oscillator we have. */ -#define SPIF_OSC9 1 /* 9.8304 Mhz */ -#define SPIF_OSC10 2 /* 10Mhz */ +#define SPIF_OSC9 1 /* 9.8304 MHz */ +#define SPIF_OSC10 2 /* 10MHz */ /* * There are two interrupts, serial gets interrupt[0], and parallel diff --git a/sys/dev/tc/asc_tc.c b/sys/dev/tc/asc_tc.c index df417243dba..5b1bf643b32 100644 --- a/sys/dev/tc/asc_tc.c +++ b/sys/dev/tc/asc_tc.c @@ -1,4 +1,4 @@ -/* $OpenBSD: asc_tc.c,v 1.6 2002/05/02 22:56:06 miod Exp $ */ +/* $OpenBSD: asc_tc.c,v 1.7 2003/02/11 19:20:28 mickey Exp $ */ /* $NetBSD: asc_tc.c,v 1.19 2001/11/15 09:48:19 lukem Exp $ */ /*- @@ -149,7 +149,7 @@ asc_tc_attach(parent, self, aux) sc->sc_id = 7; sc->sc_freq = (ta->ta_busspeed) ? 25000000 : 12500000; - /* gimme Mhz */ + /* gimme MHz */ sc->sc_freq /= 1000000; /* diff --git a/sys/dev/tc/asc_tcds.c b/sys/dev/tc/asc_tcds.c index aecbef78109..13662a35f94 100644 --- a/sys/dev/tc/asc_tcds.c +++ b/sys/dev/tc/asc_tcds.c @@ -1,4 +1,4 @@ -/* $OpenBSD: asc_tcds.c,v 1.1 2002/05/02 22:56:06 miod Exp $ */ +/* $OpenBSD: asc_tcds.c,v 1.2 2003/02/11 19:20:28 mickey Exp $ */ /* $NetBSD: asc_tcds.c,v 1.5 2001/11/15 09:48:19 lukem Exp $ */ /*- @@ -177,7 +177,7 @@ asc_tcds_attach(parent, self, aux) sc->sc_id = tcdsdev->tcdsda_id; sc->sc_freq = tcdsdev->tcdsda_freq; - /* gimme Mhz */ + /* gimme MHz */ sc->sc_freq /= 1000000; tcds_intr_establish(parent, tcdsdev->tcdsda_chip, ncr53c9x_intr, sc); |