diff options
| author | Reyk Floeter <reyk@cvs.openbsd.org> | 2005-05-29 06:03:12 +0000 |
|---|---|---|
| committer | Reyk Floeter <reyk@cvs.openbsd.org> | 2005-05-29 06:03:12 +0000 |
| commit | a1ad16c401b1015a2e0a51f14084a6701ce35f06 (patch) | |
| tree | d33c151f1419a4849d4fdc110239926a4146076e | |
| parent | 6a5adcbaa9a31384ce8b9d6b9198ee7412fa3939 (diff) | |
use JAPAN for locale code 0 stored in some rtw EEPROMs.
| -rw-r--r-- | sys/dev/ic/rtw.c | 4 | ||||
| -rw-r--r-- | sys/dev/ic/rtwvar.h | 4 |
2 files changed, 5 insertions, 3 deletions
diff --git a/sys/dev/ic/rtw.c b/sys/dev/ic/rtw.c index 041aa7e9818..2d49a0120b8 100644 --- a/sys/dev/ic/rtw.c +++ b/sys/dev/ic/rtw.c @@ -1,4 +1,4 @@ -/* $OpenBSD: rtw.c,v 1.31 2005/05/29 03:57:54 reyk Exp $ */ +/* $OpenBSD: rtw.c,v 1.32 2005/05/29 06:03:11 reyk Exp $ */ /* $NetBSD: rtw.c,v 1.29 2004/12/27 19:49:16 dyoung Exp $ */ /*- @@ -678,6 +678,7 @@ rtw_srom_parse(struct rtw_softc *sc) *locale = RTW_LOCALE_EUROPE; break; case RTW8180_CONFIG0_GL_JAPAN: + case RTW8180_CONFIG0_GL_JAPAN2: *locale = RTW_LOCALE_JAPAN; break; default: @@ -865,6 +866,7 @@ rtw_identify_country(struct rtw_regs *regs, enum rtw_locale *locale, *locale = RTW_LOCALE_USA; break; case RTW8180_CONFIG0_GL_JAPAN: + case RTW8180_CONFIG0_GL_JAPAN2: *locale = RTW_LOCALE_JAPAN; break; case RTW8180_CONFIG0_GL_EUROPE: diff --git a/sys/dev/ic/rtwvar.h b/sys/dev/ic/rtwvar.h index 444366fa96c..9d40ca769c3 100644 --- a/sys/dev/ic/rtwvar.h +++ b/sys/dev/ic/rtwvar.h @@ -1,4 +1,4 @@ -/* $OpenBSD: rtwvar.h,v 1.11 2005/05/29 03:49:52 reyk Exp $ */ +/* $OpenBSD: rtwvar.h,v 1.12 2005/05/29 06:03:11 reyk Exp $ */ /* $NetBSD: rtwvar.h,v 1.10 2004/12/26 22:37:57 mycroft Exp $ */ /*- @@ -112,11 +112,11 @@ enum rtw_rfchipid { #define RTW_F_ENABLED 0x00000001 /* chip is enabled */ #define RTW_F_DIGPHY 0x00000002 /* digital PHY */ #define RTW_F_DFLANTB 0x00000004 /* B antenna is default */ +#define RTW_F_RTL8185 0x00000008 /* RTL8185 or newer */ #define RTW_F_ANTDIV 0x00000010 /* h/w antenna diversity */ #define RTW_F_9356SROM 0x00000020 /* 93c56 SROM */ #define RTW_F_SLEEP 0x00000040 /* chip is asleep */ #define RTW_F_INVALID 0x00000080 /* chip is absent */ -#define RTW_F_RTL8185 0x00000100 /* RTL8185 or newer */ /* all PHY flags */ #define RTW_F_ALLPHY (RTW_F_DIGPHY|RTW_F_DFLANTB|RTW_F_ANTDIV) |