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authorMiod Vallat <miod@cvs.openbsd.org>2009-07-23 19:24:31 +0000
committerMiod Vallat <miod@cvs.openbsd.org>2009-07-23 19:24:31 +0000
commitb3d854ac504dbc8d0d69c69de49f3b780355e655 (patch)
tree0d21ebbad163adf54f52c454be9b4cb25db6dd22
parentc799fb60dcc3b3d8407cf7031909e66d1964d9ed (diff)
When computing the total resources required by devices behind a ppb, take
PCI ROM into account, if any.
-rw-r--r--sys/arch/sgi/pci/pci_machdep.c23
1 files changed, 20 insertions, 3 deletions
diff --git a/sys/arch/sgi/pci/pci_machdep.c b/sys/arch/sgi/pci/pci_machdep.c
index 76ccc4fb76a..3220e7224a1 100644
--- a/sys/arch/sgi/pci/pci_machdep.c
+++ b/sys/arch/sgi/pci/pci_machdep.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: pci_machdep.c,v 1.4 2009/07/21 21:25:19 miod Exp $ */
+/* $OpenBSD: pci_machdep.c,v 1.5 2009/07/23 19:24:30 miod Exp $ */
/*
* Copyright (c) 2009 Miodrag Vallat.
@@ -180,8 +180,8 @@ ppb_function_explore(pci_chipset_tag_t pc, pcitag_t tag, struct extent *ioex,
{
bus_addr_t base;
bus_size_t size;
- int reg, reg_start, reg_end;
- pcireg_t csr, bhlcr, type;
+ int reg, reg_start, reg_end, reg_rom;
+ pcireg_t csr, bhlcr, type, mask;
csr = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG);
pci_conf_write(pc, tag, PCI_COMMAND_STATUS_REG, csr &
@@ -192,14 +192,17 @@ ppb_function_explore(pci_chipset_tag_t pc, pcitag_t tag, struct extent *ioex,
case 0:
reg_start = PCI_MAPREG_START;
reg_end = PCI_MAPREG_END;
+ reg_rom = PCI_ROM_REG;
break;
case 1: /* PCI-PCI bridge */
reg_start = PCI_MAPREG_START;
reg_end = PCI_MAPREG_PPB_END;
+ reg_rom = 0; /* 0x38 */
break;
case 2: /* PCI-Cardbus bridge */
reg_start = PCI_MAPREG_START;
reg_end = PCI_MAPREG_PCB_END;
+ reg_rom = 0;
break;
default:
return;
@@ -234,6 +237,20 @@ ppb_function_explore(pci_chipset_tag_t pc, pcitag_t tag, struct extent *ioex,
reg += 4;
}
+ if (reg_rom != 0) {
+ pci_conf_write(pc, tag, reg_rom, ~PCI_ROM_ENABLE);
+ mask = pci_conf_read(pc, tag, reg_rom);
+ size = PCI_ROM_SIZE(mask);
+
+ if (size != 0) {
+ if (memex != NULL)
+ (void)extent_alloc(memex, size, size, 0, 0, 0,
+ &base);
+ }
+
+ pci_conf_write(pc, tag, reg_rom, 0);
+ }
+
/*
* Note that we do not try to be recursive and configure PCI-PCI
* bridges behind PCI-PCI bridges.