Establish per-cpu locked mappings for `struct cpuinfo' through the PROM as

well.

2 files changed, 12 insertions, 38 deletions

diff --git a/sys/arch/sparc64/sparc64/locore.s b/sys/arch/sparc64/sparc64/locore.s
index abaf84a5579..ff2d15d2c59 100644
--- a/sys/arch/sparc64/sparc64/locore.s
+++ b/sys/arch/sparc64/sparc64/locore.s
@@ -1,4 +1,4 @@
-/*	$OpenBSD: locore.s,v 1.116 2008/03/19 20:42:05 kettenis Exp $	*/
+/*	$OpenBSD: locore.s,v 1.117 2008/03/19 23:16:19 kettenis Exp $	*/
 /*	$NetBSD: locore.s,v 1.137 2001/08/13 06:10:10 jdolecek Exp $	*/
 
 /*
@@ -3672,36 +3672,6 @@ _C_LABEL(cpu_initialize):
 	 * switch to our initial stack.
 	 */
 
-	mov	%g2, %l1			! Load the interrupt stack's PA
-
-	sethi	%hi(0xa0000000), %l2		! V=1|SZ=01|NFO=0|IE=0
-	sllx	%l2, 32, %l2			! Shift it into place
-
-	mov	-1, %l3				! Create a nice mask
-	sllx	%l3, 41, %l4			! Mask off high bits
-	or	%l4, 0xfff, %l4			! We can just load this in 12 (of 13) bits
-
-	andn	%l1, %l4, %l1			! Mask the phys page number
-
-	or	%l2, %l1, %l1			! Now take care of the high bits
-#ifdef NO_VCACHE
-	or	%l1, TLB_L|TLB_CP|TLB_P|TLB_W, %l2	! And low bits:	L=1|CP=1|CV=0|E=0|P=1|W=0|G=0
-#else	/* NO_VCACHE */
-	or	%l1, TLB_L|TLB_CP|TLB_CV|TLB_P|TLB_W, %l2	! And low bits:	L=1|CP=1|CV=1|E=0|P=1|W=0|G=0
-#endif	/* NO_VCACHE */
-
-	!!
-	!!  Now, map in the interrupt stack as context==0
-	!!
-	set	TLB_TAG_ACCESS, %l5
-	sethi	%hi(INTSTACK), %l0
-	stxa	%l0, [%l5] ASI_DMMU		! Make DMMU point to it
-	membar	#Sync				! We may need more membar #Sync in here
-	stxa	%l2, [%g0] ASI_DMMU_DATA_IN	! Store it
-	membar	#Sync				! We may need more membar #Sync in here
-	sethi	%hi(KERNBASE), %o5
-	flush	%o5
-
 !!! Make sure our stack's OK.
 	flushw
 	sethi	%hi(CPUINFO_VA+CI_INITSTACK), %l0
@@ -3786,10 +3756,10 @@ ENTRY(cpu_mp_startup)
 	set	tmpstack-CC64FSZ-BIAS, %sp
 
 	call	_C_LABEL(pmap_bootstrap_cpu)
-	 mov	%o0, %l0
+	 nop
 
-	ba,pt	%xcc, cpu_initialize
-	 mov	%l0, %g2
+	ba,a,pt	%xcc, cpu_initialize
+	 nop
 #endif
 
 /*
diff --git a/sys/arch/sparc64/sparc64/pmap.c b/sys/arch/sparc64/sparc64/pmap.c
index bb5b9f854fb..f639a9a3ac7 100644
--- a/sys/arch/sparc64/sparc64/pmap.c
+++ b/sys/arch/sparc64/sparc64/pmap.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: pmap.c,v 1.52 2008/03/19 20:42:05 kettenis Exp $	*/
+/*	$OpenBSD: pmap.c,v 1.53 2008/03/19 23:16:19 kettenis Exp $	*/
 /*	$NetBSD: pmap.c,v 1.107 2001/08/31 16:47:41 eeh Exp $	*/
 #undef	NO_VCACHE /* Don't forget the locked TLB in dostart */
 /*
@@ -198,7 +198,7 @@ extern void	pmap_remove_pv(struct pmap *pm, vaddr_t va, paddr_t pa);
 extern void	pmap_enter_pv(struct pmap *pm, vaddr_t va, paddr_t pa);
 extern void	pmap_page_cache(struct pmap *pm, paddr_t pa, int mode);
 
-void	pmap_bootstrap_cpu(void);
+void	pmap_bootstrap_cpu(paddr_t);
 
 void	pmap_pinit(struct pmap *);
 void	pmap_release(struct pmap *);
@@ -1404,11 +1404,11 @@ remap_data:
 		avail_end = mp->start+mp->size;
 	BDPRINTF(PDB_BOOT1, ("Finished pmap_bootstrap()\r\n"));
 
-	pmap_bootstrap_cpu();
+	pmap_bootstrap_cpu(cpus->ci_paddr);
 }
 
 void
-pmap_bootstrap_cpu(void)
+pmap_bootstrap_cpu(paddr_t intstack)
 {
 	u_int64_t data;
 	paddr_t pa;
@@ -1437,6 +1437,10 @@ pmap_bootstrap_cpu(void)
 		prom_dtlb_load(index, data, va);
 		index--;
 	}
+
+	data = TSB_DATA(0, PGSZ_64K, intstack, 1, 1, 1, FORCE_ALIAS, 1, 0);
+	data |= TLB_L;
+	prom_dtlb_load(index, data, INTSTACK);
 }
 
 /*