sync

1 files changed, 40 insertions, 38 deletions

diff --git a/sys/dev/mii/miidevs.h b/sys/dev/mii/miidevs.h
index 472d2f17421..0a173bfdad7 100644
--- a/sys/dev/mii/miidevs.h
+++ b/sys/dev/mii/miidevs.h
@@ -1,10 +1,10 @@
-/*	$OpenBSD: miidevs.h,v 1.48 2004/10/04 13:02:44 deraadt Exp $	*/
+/*	$OpenBSD: miidevs.h,v 1.49 2004/10/17 22:32:25 deraadt Exp $	*/
 
 /*
  * THIS FILE AUTOMATICALLY GENERATED.  DO NOT EDIT.
  *
  * generated from:
- *	OpenBSD: miidevs,v 1.45 2004/10/04 13:02:33 deraadt Exp 
+ *	OpenBSD: miidevs,v 1.46 2004/10/17 22:32:15 deraadt Exp 
  */
 /* $NetBSD: miidevs,v 1.3 1998/11/05 03:43:43 thorpej Exp $ */
 
@@ -107,17 +107,19 @@
 
 /* Advanced Micro Devices PHYs */
 #define	MII_MODEL_xxAMD_79C873	0x0000
-#define	MII_STR_xxAMD_79C873	"Am79C873 10/100 media interface"
+#define	MII_STR_xxAMD_79C873	"Am79C873 10/100 PHY"
 #define	MII_MODEL_AMD_79C873phy	0x0036
 #define	MII_STR_AMD_79C873phy	"Am79C873 internal PHY"
 #define	MII_MODEL_AMD_79C875phy	0x0014
 #define	MII_STR_AMD_79C875phy	"Am79C875 quad PHY"
 
 /* Altima Communications PHYs */
+#define	MII_MODEL_xxALTIMA_AC_UNKNOWN	0x0001
+#define	MII_STR_xxALTIMA_AC_UNKNOWN	"AC_UNKNOWN 10/100 PHY"
 #define	MII_MODEL_xxALTIMA_AC101	0x0021
-#define	MII_STR_xxALTIMA_AC101	"AC101 10/100 media interface"
+#define	MII_STR_xxALTIMA_AC101	"AC101 10/100 PHY"
 #define	MII_MODEL_xxALTIMA_AC101L	0x0012
-#define	MII_STR_xxALTIMA_AC101L	"AC101L 10/100 media interface"
+#define	MII_STR_xxALTIMA_AC101L	"AC101L 10/100 PHY"
 
 /* Broadcom Corp. PHYs */
 #define	MII_MODEL_xxBROADCOM_BCM5400	0x0004
@@ -151,17 +153,17 @@
 #define	MII_MODEL_BROADCOM_BCM5221	0x001e
 #define	MII_STR_BROADCOM_BCM5221	"BCM5221 100baseTX PHY"
 #define	MII_MODEL_BROADCOM_BCM5201	0x0021
-#define	MII_STR_BROADCOM_BCM5201	"BCM5201 10/100 media interface"
+#define	MII_STR_BROADCOM_BCM5201	"BCM5201 10/100 PHY"
 #define	MII_MODEL_BROADCOM_BCM4401_0x0036	BCM4401
 #define	MII_STR_BROADCOM_BCM4401_0x0036	"10/100baseTX PHY"
 
 /* Davicom Semiconductor PHYs */
 #define	MII_MODEL_xxDAVICOM_DM9101	0x0000
-#define	MII_STR_xxDAVICOM_DM9101	"DM9101 10/100 media interface"
+#define	MII_STR_xxDAVICOM_DM9101	"DM9101 10/100 PHY"
 #define	MII_MODEL_DAVICOM_DM9102	0x0004
-#define	MII_STR_DAVICOM_DM9102	"DM9102 10/100 media interface"
+#define	MII_STR_DAVICOM_DM9102	"DM9102 10/100 PHY"
 #define	MII_MODEL_DAVICOM_DM9601	0x000c
-#define	MII_STR_DAVICOM_DM9601	"DM9601 10/100 media interface"
+#define	MII_STR_DAVICOM_DM9601	"DM9601 10/100 PHY"
 
 /* Enable Semiconductor PHYs */
 #define	MII_MODEL_ENABLESEMI_88E1000	0x0005
@@ -193,84 +195,84 @@
 
 /* Integrated Circuit Systems PHYs */
 #define	MII_MODEL_xxICS_1890	0x0002
-#define	MII_STR_xxICS_1890	"ICS1890 10/100 media interface"
+#define	MII_STR_xxICS_1890	"ICS1890 10/100 PHY"
 #define	MII_MODEL_xxICS_1892	0x0003
-#define	MII_STR_xxICS_1892	"ICS1892 10/100 media interface"
+#define	MII_STR_xxICS_1892	"ICS1892 10/100 PHY"
 #define	MII_MODEL_xxICS_1893	0x0004
-#define	MII_STR_xxICS_1893	"ICS1893 10/100 media interface"
+#define	MII_STR_xxICS_1893	"ICS1893 10/100 PHY"
 
 /* Intel PHYs */
 #define	MII_MODEL_xxINTEL_I82553	0x0000
-#define	MII_STR_xxINTEL_I82553	"i82553 10/100 media interface"
+#define	MII_STR_xxINTEL_I82553	"i82553 10/100 PHY"
 #define	MII_MODEL_INTEL_I82555	0x0015
-#define	MII_STR_INTEL_I82555	"i82555 10/100 media interface"
+#define	MII_STR_INTEL_I82555	"i82555 10/100 PHY"
 #define	MII_MODEL_INTEL_I82562EM	0x0032
-#define	MII_STR_INTEL_I82562EM	"i82562EM 10/100 media interface"
+#define	MII_STR_INTEL_I82562EM	"i82562EM 10/100 PHY"
 #define	MII_MODEL_INTEL_I82562ET	0x0033
-#define	MII_STR_INTEL_I82562ET	"i82562ET 10/100 media interface"
+#define	MII_STR_INTEL_I82562ET	"i82562ET 10/100 PHY"
 #define	MII_MODEL_INTEL_I82553	0x0035
-#define	MII_STR_INTEL_I82553	"i82553 10/100 media interface"
+#define	MII_STR_INTEL_I82553	"i82553 10/100 PHY"
 
 /* Level 1 PHYs */
 #define	MII_MODEL_xxLEVEL1_LXT970	0x0000
-#define	MII_STR_xxLEVEL1_LXT970	"LXT970 10/100 media interface"
+#define	MII_STR_xxLEVEL1_LXT970	"LXT970 10/100 PHY"
 #define	MII_MODEL_xxLEVEL1a_LXT971	0x000e
-#define	MII_STR_xxLEVEL1a_LXT971	"LXT971 10/100 media interface"
+#define	MII_STR_xxLEVEL1a_LXT971	"LXT971 10/100 PHY"
 
 /* Myson Technology PHYs */
 #define	MII_MODEL_MYSON_MTD972	0x0000
-#define	MII_STR_MYSON_MTD972	"MTD972 10/100 media interface"
+#define	MII_STR_MYSON_MTD972	"MTD972 10/100 PHY"
 
 /* National Semiconductor PHYs */
 #define	MII_MODEL_NATSEMI_DP83840	0x0000
-#define	MII_STR_NATSEMI_DP83840	"DP83840 10/100 media interface"
+#define	MII_STR_NATSEMI_DP83840	"DP83840 10/100 PHY"
 #define	MII_MODEL_NATSEMI_DP83843	0x0001
-#define	MII_STR_NATSEMI_DP83843	"DP83843 10/100 media interface"
+#define	MII_STR_NATSEMI_DP83843	"DP83843 10/100 PHY"
 #define	MII_MODEL_NATSEMI_DP83815	0x0002
-#define	MII_STR_NATSEMI_DP83815	"DP83815 10/100 integrated"
+#define	MII_STR_NATSEMI_DP83815	"DP83815 10/100 PHY"
 #define	MII_MODEL_NATSEMI_DP83891	0x0005
-#define	MII_STR_NATSEMI_DP83891	"DP83891 10/100/1000 media interface"
+#define	MII_STR_NATSEMI_DP83891	"DP83891 10/100/1000 PHY"
 #define	MII_MODEL_NATSEMI_DP83861	0x0006
-#define	MII_STR_NATSEMI_DP83861	"DP83861 10/100/1000 media interface"
+#define	MII_STR_NATSEMI_DP83861	"DP83861 10/100/1000 PHY"
 
 /* Plessey Semiconductor PHYs */
 #define	MII_MODEL_PLESSEY_NWK914	0x0000
-#define	MII_STR_PLESSEY_NWK914	"NWK914 10/100 media interface"
+#define	MII_STR_PLESSEY_NWK914	"NWK914 10/100 PHY"
 
 /* Quality Semiconductor PHYs */
 #define	MII_MODEL_QUALSEMI_QS6612	0x0000
-#define	MII_STR_QUALSEMI_QS6612	"QS6612 10/100 media interface"
+#define	MII_STR_QUALSEMI_QS6612	"QS6612 10/100 PHY"
 
 /* Realtek Semiconductor PHYs */
 #define	MII_MODEL_REALTEK_RTL8201L	0x0020
-#define	MII_STR_REALTEK_RTL8201L	"RTL8201L 10/100 media interface"
+#define	MII_STR_REALTEK_RTL8201L	"RTL8201L 10/100 PHY"
 #define	MII_MODEL_xxREALTEK_RTL8169S	0x0011
-#define	MII_STR_xxREALTEK_RTL8169S	"RTL8169S/8110S media interface"
+#define	MII_STR_xxREALTEK_RTL8169S	"RTL8169S/8110S PHY"
 
 /* Seeq PHYs */
 #define	MII_MODEL_xxSEEQ_80220	0x0003
-#define	MII_STR_xxSEEQ_80220	"Seeq 80220 10/100 media interface"
+#define	MII_STR_xxSEEQ_80220	"Seeq 80220 10/100 PHY"
 #define	MII_MODEL_xxSEEQ_84220	0x0004
-#define	MII_STR_xxSEEQ_84220	"Seeq 84220 10/100 media interface"
+#define	MII_STR_xxSEEQ_84220	"Seeq 84220 10/100 PHY"
 
 /* Silicon Integrated Systems PHYs */
 #define	MII_MODEL_xxSIS_900	0x0000
-#define	MII_STR_xxSIS_900	"SiS 900 10/100 media interface"
+#define	MII_STR_xxSIS_900	"SiS 900 10/100 PHY"
 
 /* Texas Instruments PHYs */
 #define	MII_MODEL_xxTI_TLAN10T	0x0001
-#define	MII_STR_xxTI_TLAN10T	"ThunderLAN 10baseT media interface"
+#define	MII_STR_xxTI_TLAN10T	"ThunderLAN 10baseT PHY"
 #define	MII_MODEL_xxTI_100VGPMI	0x0002
-#define	MII_STR_xxTI_100VGPMI	"ThunderLAN 100VG-AnyLan media interface"
+#define	MII_STR_xxTI_100VGPMI	"ThunderLAN 100VG-AnyLan PHY"
 #define	MII_MODEL_xxTI_TNETE2101	0x0003
-#define	MII_STR_xxTI_TNETE2101	"TNETE2101 media interface"
+#define	MII_STR_xxTI_TNETE2101	"TNETE2101 PHY"
 
 /* TDK Semiconductor PHYs */
 #define	MII_MODEL_TSC_78Q2120	0x0014
-#define	MII_STR_TSC_78Q2120	"78Q2120 10/100 media interface"
+#define	MII_STR_TSC_78Q2120	"78Q2120 10/100 PHY"
 #define	MII_MODEL_TSC_78Q2121	0x0015
-#define	MII_STR_TSC_78Q2121	"78Q2121 100baseTX media interface"
+#define	MII_STR_TSC_78Q2121	"78Q2121 100baseTX PHY"
 
 /* XaQti Corp. PHYs */
 #define	MII_MODEL_XAQTI_XMACII	0x0000
-#define	MII_STR_XAQTI_XMACII	"XaQti Corp. XMAC II Gigabit interface"
+#define	MII_STR_XAQTI_XMACII	"XaQti Corp. XMAC II Gigabit PHY"