- Add some more defines.

- Use one of the new defines in the re(4) code to remove a magic number.
- Correct a comment.
- Fix a typo.

Most of this is from NetBSD.

ok dlg@

2 files changed, 8 insertions, 5 deletions

diff --git a/sys/dev/ic/re.c b/sys/dev/ic/re.c
index 4daa4406c61..941ed8c0ad2 100644
--- a/sys/dev/ic/re.c
+++ b/sys/dev/ic/re.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: re.c,v 1.78 2008/03/20 23:54:57 brad Exp $	*/
+/*	$OpenBSD: re.c,v 1.79 2008/04/20 00:42:27 brad Exp $	*/
 /*	$FreeBSD: if_re.c,v 1.31 2004/09/04 07:54:05 ru Exp $	*/
 /*
  * Copyright (c) 1997, 1998-2003
@@ -610,7 +610,7 @@ re_reset(struct rl_softc *sc)
 	if (i == RL_TIMEOUT)
 		printf("%s: reset never completed!\n", sc->sc_dev.dv_xname);
 
-	CSR_WRITE_1(sc, 0x82, 1);
+	CSR_WRITE_1(sc, RL_LDPS, 1);
 }
 
 #ifdef RE_DIAG
diff --git a/sys/dev/ic/rtl81x9reg.h b/sys/dev/ic/rtl81x9reg.h
index 937bd22dce1..9d173f0ff75 100644
--- a/sys/dev/ic/rtl81x9reg.h
+++ b/sys/dev/ic/rtl81x9reg.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: rtl81x9reg.h,v 1.44 2008/04/20 00:34:39 brad Exp $	*/
+/*	$OpenBSD: rtl81x9reg.h,v 1.45 2008/04/20 00:42:27 brad Exp $	*/
 
 /*
  * Copyright (c) 1997, 1998
@@ -123,14 +123,17 @@
 /*
  * Registers specific to the 8169 gigE chip
  */
+#define RL_GTXSTART		0x0038	/* 8 bits */
 #define RL_TIMERINT_8169	0x0058	/* different offset than 8139 */
 #define RL_PHYAR		0x0060
 #define RL_TBICSR		0x0064
 #define RL_TBI_ANAR		0x0068
 #define RL_TBI_LPAR		0x006A
 #define RL_GMEDIASTAT		0x006C	/* 8 bits */
+#define RL_LDPS			0x0082	/* Link Down Power Saving */
 #define RL_MAXRXPKTLEN		0x00DA	/* 16 bits, chip multiplies by 8 */
-#define RL_GTXSTART		0x0038	/* 16 bits */
+#define RL_IM			0x00E2
+
 /*
  * TX config register bits
  */
@@ -434,7 +437,7 @@
 
 /*
  * The RealTek doesn't use a fragment-based descriptor mechanism.
- * Instead, there are only four register sets, each or which represents
+ * Instead, there are only four register sets, each of which represents
  * one 'descriptor.' Basically, each TX descriptor is just a contiguous
  * packet buffer (32-bit aligned!) and we place the buffer addresses in
  * the registers so the chip knows where they are.