diff options
| author | Jonathan Gray <jsg@jsg.id.au> | 2013-07-01 13:43:06 +1000 |
|---|---|---|
| committer | Jonathan Gray <jsg@jsg.id.au> | 2013-08-12 10:44:00 +1000 |
| commit | 2029199ba67a241442cc9c05790fd85bf5a94e60 (patch) | |
| tree | 9be4fa3c8e1e1ddb3ff92e60dfa9ebafd2d52233 | |
| parent | 24cbbbb7271f7e3b4627ef20b342a5537fd271fd (diff) | |
drm/radeon/dce6: add missing display reg for tiling setup, from 3.8.13
| -rw-r--r-- | sys/dev/pci/drm/radeon/ni.c | 2 | ||||
| -rw-r--r-- | sys/dev/pci/drm/radeon/nid.h | 4 | ||||
| -rw-r--r-- | sys/dev/pci/drm/radeon/si.c | 1 | ||||
| -rw-r--r-- | sys/dev/pci/drm/radeon/sid.h | 2 |
4 files changed, 9 insertions, 0 deletions
diff --git a/sys/dev/pci/drm/radeon/ni.c b/sys/dev/pci/drm/radeon/ni.c index 5a318fd7236..4d31acf1023 100644 --- a/sys/dev/pci/drm/radeon/ni.c +++ b/sys/dev/pci/drm/radeon/ni.c @@ -617,6 +617,8 @@ static void cayman_gpu_init(struct radeon_device *rdev) WREG32(GB_ADDR_CONFIG, gb_addr_config); WREG32(DMIF_ADDR_CONFIG, gb_addr_config); + if (ASIC_IS_DCE6(rdev)) + WREG32(DMIF_ADDR_CALC, gb_addr_config); WREG32(HDP_ADDR_CONFIG, gb_addr_config); WREG32(DMA_TILING_CONFIG + DMA0_REGISTER_OFFSET, gb_addr_config); WREG32(DMA_TILING_CONFIG + DMA1_REGISTER_OFFSET, gb_addr_config); diff --git a/sys/dev/pci/drm/radeon/nid.h b/sys/dev/pci/drm/radeon/nid.h index 48e5022ee92..e045f8cbcd4 100644 --- a/sys/dev/pci/drm/radeon/nid.h +++ b/sys/dev/pci/drm/radeon/nid.h @@ -45,6 +45,10 @@ #define ARUBA_GB_ADDR_CONFIG_GOLDEN 0x12010001 #define DMIF_ADDR_CONFIG 0xBD4 + +/* DCE6 only */ +#define DMIF_ADDR_CALC 0xC00 + #define SRBM_GFX_CNTL 0x0E44 #define RINGID(x) (((x) & 0x3) << 0) #define VMID(x) (((x) & 0x7) << 0) diff --git a/sys/dev/pci/drm/radeon/si.c b/sys/dev/pci/drm/radeon/si.c index 6f1e20ea1ae..62625573c53 100644 --- a/sys/dev/pci/drm/radeon/si.c +++ b/sys/dev/pci/drm/radeon/si.c @@ -1660,6 +1660,7 @@ static void si_gpu_init(struct radeon_device *rdev) WREG32(GB_ADDR_CONFIG, gb_addr_config); WREG32(DMIF_ADDR_CONFIG, gb_addr_config); + WREG32(DMIF_ADDR_CALC, gb_addr_config); WREG32(HDP_ADDR_CONFIG, gb_addr_config); WREG32(DMA_TILING_CONFIG + DMA0_REGISTER_OFFSET, gb_addr_config); WREG32(DMA_TILING_CONFIG + DMA1_REGISTER_OFFSET, gb_addr_config); diff --git a/sys/dev/pci/drm/radeon/sid.h b/sys/dev/pci/drm/radeon/sid.h index c056aae814f..e9a01f025dc 100644 --- a/sys/dev/pci/drm/radeon/sid.h +++ b/sys/dev/pci/drm/radeon/sid.h @@ -60,6 +60,8 @@ #define DMIF_ADDR_CONFIG 0xBD4 +#define DMIF_ADDR_CALC 0xC00 + #define SRBM_STATUS 0xE50 #define SRBM_SOFT_RESET 0x0E60 |