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authorBrad Smith <brad@cvs.openbsd.org>2005-06-29 04:03:43 +0000
committerBrad Smith <brad@cvs.openbsd.org>2005-06-29 04:03:43 +0000
commit32cf128730ee8f4bd32781c5e415018c1df675c7 (patch)
tree76f604ccee585a4018f7942f935fd67cb0c5a6c8
parent7abeb40bbfb573eaca2c836845e06276fdab52f6 (diff)
rev 1.25
* Add workaround for revision Bx bcm5700: chip bugs in decoding of PCI register writes may leave the hardware in (partial) powersave state, such that writes to "indirect" registers do not work. Explicitly force chip into D0 state at attach time. From NetBSD
-rw-r--r--sys/dev/pci/if_bge.c6
1 files changed, 1 insertions, 5 deletions
diff --git a/sys/dev/pci/if_bge.c b/sys/dev/pci/if_bge.c
index 82b8146c463..89b48c4d295 100644
--- a/sys/dev/pci/if_bge.c
+++ b/sys/dev/pci/if_bge.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: if_bge.c,v 1.67 2005/06/29 03:36:06 brad Exp $ */
+/* $OpenBSD: if_bge.c,v 1.68 2005/06/29 04:03:42 brad Exp $ */
/*
* Copyright (c) 2001 Wind River Systems
@@ -1814,9 +1814,7 @@ bge_attach(parent, self, aux)
u_int32_t hwcfg = 0;
u_int32_t mac_addr = 0;
u_int32_t command;
-#if 0
u_int32_t pm_ctl;
-#endif
struct ifnet *ifp;
int unit, error = 0;
caddr_t kva;
@@ -1877,7 +1875,6 @@ bge_attach(parent, self, aux)
goto fail;
}
-#if 0
/*
* Kludge for 5700 Bx bug: a hardware bug (PCIX byte enable?)
* can clobber the chip's PCI config-space power control registers,
@@ -1890,7 +1887,6 @@ bge_attach(parent, self, aux)
pm_ctl |= (1 << 8) | PCI_PWR_D0 ; /* D0 state */
pci_conf_write(pc, pa->pa_tag, BGE_PCI_PWRMGMT_CMD, pm_ctl);
DELAY(1000); /* 27 usec is allegedly sufficent */
-#endif
/*
* Save ASIC rev. Look up any quirks