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authorMiod Vallat <miod@cvs.openbsd.org>2003-01-05 01:51:28 +0000
committerMiod Vallat <miod@cvs.openbsd.org>2003-01-05 01:51:28 +0000
commit35eb04d8442f225f79f63b881426d9c3a1b68245 (patch)
tree597215b5c61ae77b81c3ca3ec7dad23151f90ad9
parent57aa6227eec11ee3adc1e0937b05ecc71da6c47e (diff)
splassert on m68k-based arches. Not totally accurate on hp300 at the moment,
still.
-rw-r--r--sys/arch/hp300/include/intr.h46
-rw-r--r--sys/arch/m68k/include/psl.h37
-rw-r--r--sys/arch/m68k/m68k/m68k_machdep.c22
-rw-r--r--sys/arch/mac68k/include/intr.h23
-rw-r--r--sys/arch/mvme68k/include/intr.h23
5 files changed, 113 insertions, 38 deletions
diff --git a/sys/arch/hp300/include/intr.h b/sys/arch/hp300/include/intr.h
index 2a8b23a9bbb..866efd622be 100644
--- a/sys/arch/hp300/include/intr.h
+++ b/sys/arch/hp300/include/intr.h
@@ -1,4 +1,4 @@
-/* $OpenBSD: intr.h,v 1.9 2002/04/29 07:35:17 miod Exp $ */
+/* $OpenBSD: intr.h,v 1.10 2003/01/05 01:51:27 miod Exp $ */
/* $NetBSD: intr.h,v 1.2 1997/07/24 05:43:08 scottr Exp $ */
/*-
@@ -61,36 +61,11 @@ struct isr {
};
#endif /* _HP300_INTR_H_PRIVATE */
-/*
- * Interrupt "levels". These are a more abstract representation
- * of interrupt levels, and do not have the same meaning as m68k
- * CPU interrupt levels. They serve two purposes:
- *
- * - properly order ISRs in the list for that CPU ipl
- * - compute CPU PSL values for the spl*() calls.
- */
-#define IPL_NONE 0 /* disable only this interrupt */
-#define IPL_BIO 1 /* disable block I/O interrupts */
-#define IPL_NET 2 /* disable network interrupts */
-#define IPL_TTY 3 /* disable terminal interrupts */
-#define IPL_TTYNOBUF 4 /* IPL_TTY + higher ISR priority */
-#define IPL_CLOCK 5 /* disable clock interrupts */
-#define IPL_HIGH 6 /* disable all interrupts */
-
-/*
- * Convert PSL values to CPU IPLs and vice-versa.
- */
-#define PSLTOIPL(x) (((x) >> 8) & 0xf)
-#define IPLTOPSL(x) ((((x) & 0xf) << 8) | PSL_S)
-
#ifdef _KERNEL
/*
* spl functions; all but spl0 are done in-line
*/
-/* SPL asserts */
-#define splassert(wantipl) /* nothing */
-
#define _spl(s) \
({ \
register int _spl_r; \
@@ -139,6 +114,25 @@ extern unsigned short hp300_netipl;
extern unsigned short hp300_ttyipl;
extern unsigned short hp300_impipl;
+/*
+ * Interrupt "levels". These are a more abstract representation
+ * of interrupt levels, and do not have the same meaning as m68k
+ * CPU interrupt levels. They serve two purposes:
+ *
+ * - properly order ISRs in the list for that CPU ipl
+ * - compute CPU PSL values for the spl*() calls.
+ */
+#define IPL_NONE 0
+#define IPL_SOFTNET 1
+#define IPL_SOFTCLOCK 1
+#define IPL_BIO 1
+#define IPL_NET 2
+#define IPL_TTY 3
+#define IPL_TTYNOBUF 4 /* XXX */
+#define IPL_CLOCK 6
+#define IPL_STATCLOCK 6
+#define IPL_HIGH 6
+
/* These spl calls are _not_ to be used by machine-independent code. */
#define splhil() _splraise(PSL_S|PSL_IPL1)
#define splkbd() splhil()
diff --git a/sys/arch/m68k/include/psl.h b/sys/arch/m68k/include/psl.h
index df0db67f997..e234296bc93 100644
--- a/sys/arch/m68k/include/psl.h
+++ b/sys/arch/m68k/include/psl.h
@@ -1,4 +1,4 @@
-/* $OpenBSD: psl.h,v 1.2 1996/05/29 18:38:34 niklas Exp $ */
+/* $OpenBSD: psl.h,v 1.3 2003/01/05 01:51:25 miod Exp $ */
/* $NetBSD: psl.h,v 1.5 1994/10/26 07:50:50 cgd Exp $ */
/*
@@ -36,9 +36,11 @@
* @(#)psl.h 8.1 (Berkeley) 6/10/93
*/
-#ifndef PSL_C
+#ifndef _M68K_PSL_H_
+#define _M68K_PSL_H_
+
/*
- * MC68000 program status word
+ * MC680x0 program status word
*/
#define PSL_C 0x0001 /* carry bit */
@@ -71,4 +73,33 @@
#define PSL_USERCLR (PSL_S | PSL_IPL7 | PSL_MBZ)
#define USERMODE(ps) (((ps) & PSL_S) == 0)
+
+#ifdef _KERNEL
+
+/* SPL asserts */
+#ifdef DIAGNOSTIC
+/*
+ * Although this function is implemented in MI code, it must be in this MD
+ * header because we don't want this header to include MI includes.
+ */
+void splassert_fail(int, int, const char *);
+extern int splassert_ctl;
+void splassert_check(int, const char *);
+#define splassert(__wantipl) do { \
+ if (__predict_false(splassert_ctl > 0)) { \
+ splassert_check(__wantipl, __func__); \
+ } \
+} while (0)
+#else
+#define splassert(wantipl) do { /* nothing */ } while (0)
#endif
+
+/*
+ * Convert PSL values to CPU IPLs and vice-versa.
+ */
+#define PSLTOIPL(x) (((x) >> 8) & 0xf)
+#define IPLTOPSL(x) ((((x) & 0xf) << 8) | PSL_S)
+
+#endif /* _KERNEL */
+
+#endif /* _M68K_PSL_H_ */
diff --git a/sys/arch/m68k/m68k/m68k_machdep.c b/sys/arch/m68k/m68k/m68k_machdep.c
index 82bef3908e0..9cd5957440f 100644
--- a/sys/arch/m68k/m68k/m68k_machdep.c
+++ b/sys/arch/m68k/m68k/m68k_machdep.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: m68k_machdep.c,v 1.4 2001/11/25 21:31:06 miod Exp $ */
+/* $OpenBSD: m68k_machdep.c,v 1.5 2003/01/05 01:51:27 miod Exp $ */
/* $NetBSD: m68k_machdep.c,v 1.3 1997/06/12 09:57:04 veego Exp $ */
/*-
@@ -70,3 +70,23 @@ child_return(arg)
#endif
}
+#ifdef DIAGNOSTIC
+void
+splassert_check(int wantipl, const char *func)
+{
+ int oldipl;
+
+ __asm __volatile ("movew sr,%0" : "=&d" (oldipl));
+
+ oldipl = PSLTOIPL(oldipl);
+
+ if (oldipl < wantipl) {
+ splassert_fail(wantipl, oldipl, func);
+ /*
+ * If the splassert_ctl is set to not panic, raise the ipl
+ * in a feeble attempt to reduce damage.
+ */
+ _spl(PSL_S | IPLTOPSL(wantipl));
+ }
+}
+#endif
diff --git a/sys/arch/mac68k/include/intr.h b/sys/arch/mac68k/include/intr.h
index 7c6a80913fb..f96958e377c 100644
--- a/sys/arch/mac68k/include/intr.h
+++ b/sys/arch/mac68k/include/intr.h
@@ -1,4 +1,4 @@
-/* $OpenBSD: intr.h,v 1.7 2002/04/29 07:35:19 miod Exp $ */
+/* $OpenBSD: intr.h,v 1.8 2003/01/05 01:51:27 miod Exp $ */
/* $NetBSD: intr.h,v 1.8 1997/11/07 07:33:18 scottr Exp $ */
/*
@@ -36,9 +36,6 @@
* spl functions; all but spl0 are done in-line
*/
-/* SPL asserts */
-#define splassert(wantipl) /* nothing */
-
#define _spl(s) \
({ \
register int _spl_r; \
@@ -95,6 +92,24 @@ extern unsigned short mac68k_clockipl;
extern unsigned short mac68k_statclockipl;
/*
+ * Interrupt "levels". These are a more abstract representation
+ * of interrupt levels, and do not have the same meaning as m68k
+ * CPU interrupt levels. They serve two purposes:
+ *
+ * - properly order ISRs in the list for that CPU ipl
+ * - compute CPU PSL values for the spl*() calls.
+ */
+#define IPL_NONE 0
+#define IPL_SOFTNET 1
+#define IPL_SOFTCLOCK 1
+#define IPL_BIO PSLTOIPL(mac68k_bioipl)
+#define IPL_NET PSLTOIPL(mac68k_netipl)
+#define IPL_TTY PSLTOIPL(mac68k_ttyipl)
+#define IPL_CLOCK PSLTOIPL(mac68k_clockipl)
+#define IPL_STATCLOCK PSLTOIPL(mac68k_statclockipl)
+#define IPL_HIGH 7
+
+/*
* These should be used for:
* 1) ensuring mutual exclusion (why use processor level?)
* 2) allowing faster devices to take priority
diff --git a/sys/arch/mvme68k/include/intr.h b/sys/arch/mvme68k/include/intr.h
index 6d23bd50158..268e98a3453 100644
--- a/sys/arch/mvme68k/include/intr.h
+++ b/sys/arch/mvme68k/include/intr.h
@@ -1,4 +1,4 @@
-/* $OpenBSD: intr.h,v 1.8 2002/04/29 07:35:20 miod Exp $ */
+/* $OpenBSD: intr.h,v 1.9 2003/01/05 01:51:27 miod Exp $ */
/*
* Copyright (C) 2000 Steve Murphree, Jr.
* All rights reserved.
@@ -44,9 +44,6 @@ extern unsigned char ssir;
#define setsoftclock() ssir |= SIR_CLOCK
u_long allocate_sir(void (*proc)(void *), void *arg);
-/* SPL asserts */
-#define splassert(wantipl) /* nothing */
-
#define _spl(s) \
({ \
register int _spl_r; \
@@ -65,6 +62,24 @@ u_long allocate_sir(void (*proc)(void *), void *arg);
#define spl6() _spl(PSL_S|PSL_IPL6)
#define spl7() _spl(PSL_S|PSL_IPL7)
+/*
+ * Interrupt "levels". These are a more abstract representation
+ * of interrupt levels, and do not have the same meaning as m68k
+ * CPU interrupt levels. They serve two purposes:
+ *
+ * - properly order ISRs in the list for that CPU ipl
+ * - compute CPU PSL values for the spl*() calls.
+ */
+#define IPL_NONE 0
+#define IPL_SOFTNET 1
+#define IPL_SOFTCLOCK 1
+#define IPL_BIO 2
+#define IPL_NET 3
+#define IPL_TTY 3
+#define IPL_CLOCK 5
+#define IPL_STATCLOCK 5
+#define IPL_HIGH 7
+
#define spllowersoftclock() spl1()
#define splsoftclock() spl1()
#define splsoftnet() spl1()