Add support for the optics on the Sun variant of ixgb(4) boards.

From Intel

tested by and ok dlg@

4 files changed, 96 insertions, 9 deletions

diff --git a/sys/dev/pci/if_ixgb.c b/sys/dev/pci/if_ixgb.c
index e0e16d729ca..9d1dff79e0d 100644
--- a/sys/dev/pci/if_ixgb.c
+++ b/sys/dev/pci/if_ixgb.c
@@ -31,7 +31,7 @@ POSSIBILITY OF SUCH DAMAGE.
 
 ***************************************************************************/
 
-/* $OpenBSD: if_ixgb.c,v 1.38 2007/10/01 15:34:48 krw Exp $ */
+/* $OpenBSD: if_ixgb.c,v 1.39 2008/02/19 18:47:18 brad Exp $ */
 
 #include <dev/pci/if_ixgb.h>
 
@@ -1919,8 +1919,13 @@ ixgb_receive_checksum(struct ixgb_softc *sc,
 void
 ixgb_enable_intr(struct ixgb_softc *sc)
 {
-	IXGB_WRITE_REG(&sc->hw, IMS, (IXGB_INT_RXT0 | IXGB_INT_TXDW |
-			    IXGB_INT_RXDMT0 | IXGB_INT_LSC | IXGB_INT_RXO));
+	uint32_t val;
+
+	val = IXGB_INT_RXT0 | IXGB_INT_TXDW | IXGB_INT_RXDMT0 |
+	      IXGB_INT_LSC | IXGB_INT_RXO;
+	if (sc->hw.subsystem_vendor_id == SUN_SUBVENDOR_ID)
+		val |= IXGB_INT_GPI0;
+	IXGB_WRITE_REG(&sc->hw, IMS, val);
 }
 
 void
diff --git a/sys/dev/pci/ixgb_hw.c b/sys/dev/pci/ixgb_hw.c
index 49de8d16840..4890e89f57f 100644
--- a/sys/dev/pci/ixgb_hw.c
+++ b/sys/dev/pci/ixgb_hw.c
@@ -31,7 +31,7 @@
 
 *******************************************************************************/
 
-/* $OpenBSD: ixgb_hw.c,v 1.2 2006/06/22 04:50:31 brad Exp $ */
+/* $OpenBSD: ixgb_hw.c,v 1.3 2008/02/19 18:47:18 brad Exp $ */
 
 /* ixgb_hw.c
  * Shared functions for accessing and configuring the adapter
@@ -79,6 +79,8 @@ static boolean_t ixgb_link_reset(struct ixgb_hw *hw);
 
 static void ixgb_optics_reset(struct ixgb_hw *hw);
 
+static void ixgb_optics_reset_bcm(struct ixgb_hw *hw);
+
 static ixgb_phy_type ixgb_identify_phy(struct ixgb_hw *hw);
 
 uint32_t ixgb_mac_reset(struct ixgb_hw *hw);
@@ -112,10 +114,20 @@ ixgb_mac_reset(struct ixgb_hw *hw)
 	ASSERT(!(ctrl_reg & IXGB_CTRL0_RST));
 #endif
 
-	if(hw->phy_type == ixgb_phy_type_txn17401) {
-		ixgb_optics_reset(hw);
+	if (hw->subsystem_vendor_id == SUN_SUBVENDOR_ID) {
+		ctrl_reg = /* Enable interrupt from XFP and SerDes */
+			   IXGB_CTRL1_GPI0_EN |
+			   IXGB_CTRL1_SDP6_DIR |
+			   IXGB_CTRL1_SDP7_DIR |
+			   IXGB_CTRL1_SDP6 |
+			   IXGB_CTRL1_SDP7;
+		IXGB_WRITE_REG(hw, CTRL1, ctrl_reg);
+		ixgb_optics_reset_bcm(hw);
 	}
 
+	if (hw->phy_type == ixgb_phy_type_txn17401)
+		ixgb_optics_reset(hw);
+
 	return ctrl_reg;
 }
 
@@ -273,6 +285,10 @@ ixgb_identify_phy(struct ixgb_hw *hw)
 		break;
 	}
 
+	/* update phy type for sun specific board */
+	if (hw->subsystem_vendor_id == SUN_SUBVENDOR_ID)
+		phy_type = ixgb_phy_type_bcm; 
+
 	return (phy_type);
 }
 
@@ -1210,3 +1226,65 @@ ixgb_optics_reset(struct ixgb_hw *hw)
 
 	return;
 }
+
+/******************************************************************************
+ * Resets the 10GbE optics module for Sun variant NIC.
+ *
+ * hw - Struct containing variables accessed by shared code
+ *****************************************************************************/
+
+#define	IXGB_BCM8704_USER_PMD_TX_CTRL_REG	0xC803
+#define	IXGB_BCM8704_USER_PMD_TX_CTRL_REG_VAL	0x0164
+#define	IXGB_BCM8704_USER_CTRL_REG		0xC800
+#define	IXGB_BCM8704_USER_CTRL_REG_VAL		0x7FBF
+#define	IXGB_BCM8704_USER_DEV3_ADDR		0x0003
+#define	IXGB_SUN_PHY_ADDRESS			0x0000
+#define	IXGB_SUN_PHY_RESET_DELAY		305
+
+static void
+ixgb_optics_reset_bcm(struct ixgb_hw *hw)
+{
+	uint32_t ctrl = IXGB_READ_REG(hw, CTRL0);
+	ctrl &= ~IXGB_CTRL0_SDP2;
+	ctrl |= IXGB_CTRL0_SDP3;
+	IXGB_WRITE_REG(hw, CTRL0, ctrl);
+
+	/* SerDes needs extra delay */
+	msec_delay(IXGB_SUN_PHY_RESET_DELAY);
+
+	/* Broadcom 7408L configuration */
+	/* Reference clock config */
+	ixgb_write_phy_reg(hw,
+			   IXGB_BCM8704_USER_PMD_TX_CTRL_REG,
+			   IXGB_SUN_PHY_ADDRESS,
+			   IXGB_BCM8704_USER_DEV3_ADDR,
+			   IXGB_BCM8704_USER_PMD_TX_CTRL_REG_VAL);
+	/* we must read the registers twice */
+	ixgb_read_phy_reg(hw,
+			  IXGB_BCM8704_USER_PMD_TX_CTRL_REG,
+			  IXGB_SUN_PHY_ADDRESS,
+			  IXGB_BCM8704_USER_DEV3_ADDR);
+	ixgb_read_phy_reg(hw,
+			  IXGB_BCM8704_USER_PMD_TX_CTRL_REG,
+			  IXGB_SUN_PHY_ADDRESS,
+			  IXGB_BCM8704_USER_DEV3_ADDR);
+
+	ixgb_write_phy_reg(hw,
+			   IXGB_BCM8704_USER_CTRL_REG,
+			   IXGB_SUN_PHY_ADDRESS,
+			   IXGB_BCM8704_USER_DEV3_ADDR,
+			   IXGB_BCM8704_USER_CTRL_REG_VAL);
+	ixgb_read_phy_reg(hw,
+			  IXGB_BCM8704_USER_CTRL_REG,
+			  IXGB_SUN_PHY_ADDRESS,
+			  IXGB_BCM8704_USER_DEV3_ADDR);
+	ixgb_read_phy_reg(hw,
+			  IXGB_BCM8704_USER_CTRL_REG,
+			  IXGB_SUN_PHY_ADDRESS,
+			  IXGB_BCM8704_USER_DEV3_ADDR);
+
+	/* SerDes needs extra delay */
+	msec_delay(IXGB_SUN_PHY_RESET_DELAY);
+
+	return;
+} 
diff --git a/sys/dev/pci/ixgb_hw.h b/sys/dev/pci/ixgb_hw.h
index 3c6203d5e0f..1e14df6bf54 100644
--- a/sys/dev/pci/ixgb_hw.h
+++ b/sys/dev/pci/ixgb_hw.h
@@ -31,7 +31,7 @@
 
 *******************************************************************************/
 
-/* $OpenBSD: ixgb_hw.h,v 1.1 2005/11/14 23:25:43 brad Exp $ */ 
+/* $OpenBSD: ixgb_hw.h,v 1.2 2008/02/19 18:47:18 brad Exp $ */ 
 
 #ifndef _IXGB_HW_H_
 #define _IXGB_HW_H_
@@ -51,7 +51,8 @@ typedef enum {
 	ixgb_phy_type_g6005,	/* 850nm, MM fiber, XPAK transceiver */
 	ixgb_phy_type_g6104,	/* 1310nm, SM fiber, XPAK transceiver */
 	ixgb_phy_type_txn17201,	/* 850nm, MM fiber, XPAK transceiver */
-	ixgb_phy_type_txn17401	/* 1310nm, SM fiber, XENPAK transceiver */
+	ixgb_phy_type_txn17401,	/* 1310nm, SM fiber, XENPAK transceiver */
+	ixgb_phy_type_bcm	/* SUN specific board */
 } ixgb_phy_type;
 
 /* XPAK transceiver vendors, for the SR adapters */
diff --git a/sys/dev/pci/ixgb_ids.h b/sys/dev/pci/ixgb_ids.h
index 285be0c188d..52febc46c3c 100644
--- a/sys/dev/pci/ixgb_ids.h
+++ b/sys/dev/pci/ixgb_ids.h
@@ -31,7 +31,7 @@
 
 *******************************************************************************/
 
-/* $OpenBSD: ixgb_ids.h,v 1.2 2006/06/22 04:50:31 brad Exp $ */
+/* $OpenBSD: ixgb_ids.h,v 1.3 2008/02/19 18:47:18 brad Exp $ */
 
 #ifndef _IXGB_IDS_H_
 #define _IXGB_IDS_H_
@@ -42,6 +42,8 @@
 
 #define INTEL_VENDOR_ID         0x8086
 #define INTEL_SUBVENDOR_ID      0x8086
+#define SUN_VENDOR_ID           0x108E
+#define SUN_SUBVENDOR_ID        0x108E
 
 #define IXGB_DEVICE_ID_82597EX      0x1048
 #define IXGB_DEVICE_ID_82597EX_SR   0x1A48
@@ -52,6 +54,7 @@
 #define IXGB_DEVICE_ID_82597EX_CX4   0x109E
 #define IXGB_SUBDEVICE_ID_A00C  0xA00C
 #define IXGB_SUBDEVICE_ID_A01C  0xA01C   
+#define IXGB_SUBDEVICE_ID_7036  0x7036
 
 #endif /* #ifndef _IXGB_IDS_H_ */
 /* End of File */