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authorTodd C. Miller <millert@cvs.openbsd.org>2002-06-28 00:40:54 +0000
committerTodd C. Miller <millert@cvs.openbsd.org>2002-06-28 00:40:54 +0000
commit6d3f0e82d41522c4925339147c5288bcb4f9595f (patch)
treea1a8641dfaf9c1aa5d4a008f35bd94a60797dd19
parent54295fed3b9af2129e74cedba534c4f30c3c30df (diff)
not used by new ahc driver
-rw-r--r--sys/dev/ic/smc93cx6.c206
-rw-r--r--sys/dev/ic/smc93cx6var.h102
-rw-r--r--sys/dev/microcode/aic7xxx/sequencer.h122
3 files changed, 0 insertions, 430 deletions
diff --git a/sys/dev/ic/smc93cx6.c b/sys/dev/ic/smc93cx6.c
deleted file mode 100644
index 870d58c7656..00000000000
--- a/sys/dev/ic/smc93cx6.c
+++ /dev/null
@@ -1,206 +0,0 @@
-/* $OpenBSD: smc93cx6.c,v 1.10 2002/06/28 00:34:54 smurph Exp $ */
-/* $FreeBSD: sys/dev/aic7xxx/93cx6.c,v 1.5 2000/01/07 23:08:17 gibbs Exp $ */
-/*
- * Interface for the 93C66/56/46/26/06 serial eeprom parts.
- *
- * Copyright (c) 1995, 1996 Daniel M. Eischen
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice immediately at the beginning of the file, without modification,
- * this list of conditions, and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. Absolutely no warranty of function or purpose is made by the author
- * Daniel M. Eischen.
- * 4. Modifications may be freely made to this file if the above conditions
- * are met.
- */
-
-/*
- * The instruction set of the 93C66/56/46/26/06 chips are as follows:
- *
- * Start OP *
- * Function Bit Code Address** Data Description
- * -------------------------------------------------------------------
- * READ 1 10 A5 - A0 Reads data stored in memory,
- * starting at specified address
- * EWEN 1 00 11XXXX Write enable must precede
- * all programming modes
- * ERASE 1 11 A5 - A0 Erase register A5A4A3A2A1A0
- * WRITE 1 01 A5 - A0 D15 - D0 Writes register
- * ERAL 1 00 10XXXX Erase all registers
- * WRAL 1 00 01XXXX D15 - D0 Writes to all registers
- * EWDS 1 00 00XXXX Disables all programming
- * instructions
- * *Note: A value of X for address is a don't care condition.
- * **Note: There are 8 address bits for the 93C56/66 chips unlike
- * the 93C46/26/06 chips which have 6 address bits.
- *
- * The 93C46 has a four wire interface: clock, chip select, data in, and
- * data out. In order to perform one of the above functions, you need
- * to enable the chip select for a clock period (typically a minimum of
- * 1 usec, with the clock high and low a minimum of 750 and 250 nsec
- * respectively). While the chip select remains high, you can clock in
- * the instructions (above) starting with the start bit, followed by the
- * OP code, Address, and Data (if needed). For the READ instruction, the
- * requested 16-bit register contents is read from the data out line but
- * is preceded by an initial zero (leading 0, followed by 16-bits, MSB
- * first). The clock cycling from low to high initiates the next data
- * bit to be sent from the chip.
- *
- */
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#if !(defined(__NetBSD__) || defined(__OpenBSD__))
-#include <machine/bus_memio.h>
-#include <machine/bus_pio.h>
-#endif
-#include <machine/bus.h>
-#if defined(__OpenBSD__)
-#include <dev/ic/aic7xxx_openbsd.h>
-#endif
-#include <dev/ic/aic7xxx_inline.h>
-#if !(defined(__NetBSD__) || defined(__OpenBSD__))
-#include <dev/aic7xxx/93cx6.h>
-#else
-#include <dev/ic/smc93cx6var.h>
-#endif
-
-/*
- * Right now, we only have to read the SEEPROM. But we make it easier to
- * add other 93Cx6 functions.
- */
-static struct seeprom_cmd {
- unsigned char len;
- unsigned char bits[3];
-} seeprom_read = {3, {1, 1, 0}};
-
-/*
- * Wait for the SEERDY to go high; about 800 ns.
- */
-#define CLOCK_PULSE(sd, rdy) \
- while ((SEEPROM_STATUS_INB(sd) & rdy) == 0) { \
- ; /* Do nothing */ \
- } \
- (void)SEEPROM_INB(sd); /* Clear clock */
-
-/*
- * Read the serial EEPROM and returns 1 if successful and 0 if
- * not successful.
- */
-int
-read_seeprom(sd, buf, start_addr, count)
- struct seeprom_descriptor *sd;
- u_int16_t *buf;
- bus_size_t start_addr;
- bus_size_t count;
-{
- int i = 0;
- u_int k = 0;
- u_int16_t v;
- u_int8_t temp;
-
- /*
- * Read the requested registers of the seeprom. The loop
- * will range from 0 to count-1.
- */
- for (k = start_addr; k < count + start_addr; k++) {
- /* Send chip select for one clock cycle. */
- temp = sd->sd_MS ^ sd->sd_CS;
- SEEPROM_OUTB(sd, temp ^ sd->sd_CK);
- CLOCK_PULSE(sd, sd->sd_RDY);
-
- /*
- * Now we're ready to send the read command followed by the
- * address of the 16-bit register we want to read.
- */
- for (i = 0; i < seeprom_read.len; i++) {
- if (seeprom_read.bits[i] != 0)
- temp ^= sd->sd_DO;
- SEEPROM_OUTB(sd, temp);
- CLOCK_PULSE(sd, sd->sd_RDY);
- SEEPROM_OUTB(sd, temp ^ sd->sd_CK);
- CLOCK_PULSE(sd, sd->sd_RDY);
- if (seeprom_read.bits[i] != 0)
- temp ^= sd->sd_DO;
- }
- /* Send the 6 or 8 bit address (MSB first, LSB last). */
- for (i = (sd->sd_chip - 1); i >= 0; i--) {
- if ((k & (1 << i)) != 0)
- temp ^= sd->sd_DO;
- SEEPROM_OUTB(sd, temp);
- CLOCK_PULSE(sd, sd->sd_RDY);
- SEEPROM_OUTB(sd, temp ^ sd->sd_CK);
- CLOCK_PULSE(sd, sd->sd_RDY);
- if ((k & (1 << i)) != 0)
- temp ^= sd->sd_DO;
- }
-
- /*
- * Now read the 16 bit register. An initial 0 precedes the
- * register contents which begins with bit 15 (MSB) and ends
- * with bit 0 (LSB). The initial 0 will be shifted off the
- * top of our word as we let the loop run from 0 to 16.
- */
- v = 0;
- for (i = 16; i >= 0; i--) {
- SEEPROM_OUTB(sd, temp);
- CLOCK_PULSE(sd, sd->sd_RDY);
- v <<= 1;
- if (SEEPROM_DATA_INB(sd) & sd->sd_DI)
- v |= 1;
- SEEPROM_OUTB(sd, temp ^ sd->sd_CK);
- CLOCK_PULSE(sd, sd->sd_RDY);
- }
-
- buf[k - start_addr] = v;
-
- /* Reset the chip select for the next command cycle. */
- temp = sd->sd_MS;
- SEEPROM_OUTB(sd, temp);
- CLOCK_PULSE(sd, sd->sd_RDY);
- SEEPROM_OUTB(sd, temp ^ sd->sd_CK);
- CLOCK_PULSE(sd, sd->sd_RDY);
- SEEPROM_OUTB(sd, temp);
- CLOCK_PULSE(sd, sd->sd_RDY);
- }
-#ifdef AHC_DUMP_EEPROM
- printf("\nSerial EEPROM:\n\t");
- for (k = 0; k < count; k = k + 1) {
- if (((k % 8) == 0) && (k != 0)) {
- printf ("\n\t");
- }
- printf (" 0x%x", buf[k]);
- }
- printf ("\n");
-#endif
- return (1);
-}
-
-int
-verify_cksum(struct seeprom_config *sc)
-{
- int i;
- int maxaddr;
- u_int32_t checksum;
- u_int16_t *scarray;
-
- maxaddr = (sizeof(*sc)/2) - 1;
- checksum = 0;
- scarray = (uint16_t *)sc;
-
- for (i = 0; i < maxaddr; i++)
- checksum = checksum + scarray[i];
- if (checksum == 0
- || (checksum & 0xFFFF) != sc->checksum) {
- return (0);
- } else {
- return(1);
- }
-}
diff --git a/sys/dev/ic/smc93cx6var.h b/sys/dev/ic/smc93cx6var.h
deleted file mode 100644
index 4272cfa31e7..00000000000
--- a/sys/dev/ic/smc93cx6var.h
+++ /dev/null
@@ -1,102 +0,0 @@
-/* $OpenBSD: smc93cx6var.h,v 1.9 2002/06/28 00:34:54 smurph Exp $ */
-/* $FreeBSD: sys/dev/aic7xxx/93cx6.h,v 1.3 1999/12/29 04:35:33 peter Exp $ */
-/*
- * Interface to the 93C46 serial EEPROM that is used to store BIOS
- * settings for the aic7xxx based adaptec SCSI controllers. It can
- * also be used for 93C26 and 93C06 serial EEPROMS.
- *
- * Copyright (c) 1994, 1995 Justin T. Gibbs.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions, and the following disclaimer,
- * without modification, immediately at the beginning of the file.
- * 2. The name of the author may not be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- * Where this Software is combined with software released under the terms of
- * the GNU Public License ("GPL") and the terms of the GPL would require the
- * combined work to also be released under the terms of the GPL, the terms
- * and conditions of this License will apply in addition to those of the
- * GPL with the exception of any terms or conditions of this License that
- * conflict with, or are expressly prohibited by, the GPL.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
- * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-#ifndef _SMC93CX6VAR_H_
-#define _SMC93CX6VAR_H_
-
-#include <sys/param.h>
-#if !(defined(__NetBSD__) || defined(__OpenBSD__))
-#include <sys/systm.h>
-#endif
-
-#ifdef _KERNEL
-
-typedef enum {
- C46 = 6,
- C56_66 = 8
-} seeprom_chip_t;
-
-struct seeprom_descriptor {
- struct ahc_softc *sd_ahc;
- bus_size_t sd_control_offset;
- bus_size_t sd_status_offset;
- bus_size_t sd_dataout_offset;
- seeprom_chip_t sd_chip;
- u_int16_t sd_MS;
- u_int16_t sd_RDY;
- u_int16_t sd_CS;
- u_int16_t sd_CK;
- u_int16_t sd_DO;
- u_int16_t sd_DI;
-};
-
-/*
- * This function will read count 16-bit words from the serial EEPROM and
- * return their value in buf. The port address of the aic7xxx serial EEPROM
- * control register is passed in as offset. The following parameters are
- * also passed in:
- *
- * CS - Chip select
- * CK - Clock
- * DO - Data out
- * DI - Data in
- * RDY - SEEPROM ready
- * MS - Memory port mode select
- *
- * A failed read attempt returns 0, and a successful read returns 1.
- */
-
-#define SEEPROM_INB(sd) \
- ahc_inb(sd->sd_ahc, sd->sd_control_offset)
-#define SEEPROM_OUTB(sd, value) \
-do { \
- ahc_outb(sd->sd_ahc, sd->sd_control_offset, value); \
- ahc_flush_device_writes(sd->sd_ahc); \
-} while(0)
-
-#define SEEPROM_STATUS_INB(sd) \
- ahc_inb(sd->sd_ahc, sd->sd_status_offset)
-#define SEEPROM_DATA_INB(sd) \
- ahc_inb(sd->sd_ahc, sd->sd_dataout_offset)
-
-int read_seeprom(struct seeprom_descriptor *sd, u_int16_t *buf,
- bus_size_t start_addr, bus_size_t count);
-int verify_cksum(struct seeprom_config *sc);
-
-#endif /* _KERNEL */
-#endif /* SMC93CX6VAR_H_ */
diff --git a/sys/dev/microcode/aic7xxx/sequencer.h b/sys/dev/microcode/aic7xxx/sequencer.h
deleted file mode 100644
index e634a725640..00000000000
--- a/sys/dev/microcode/aic7xxx/sequencer.h
+++ /dev/null
@@ -1,122 +0,0 @@
-/* $OpenBSD: sequencer.h,v 1.4 2002/06/28 00:34:55 smurph Exp $ */
-/*
- * Instruction formats for the sequencer program downloaded to
- * Aic7xxx SCSI host adapters
- *
- * Copyright (c) 1997, 1998, 2000 Justin T. Gibbs.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions, and the following disclaimer,
- * without modification.
- * 2. The name of the author may not be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- * Alternatively, this software may be distributed under the terms of the
- * GNU Public License ("GPL").
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
- * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD: src/sys/dev/aic7xxx/sequencer.h,v 1.6 1999/12/06 18:23:31 gibbs Exp $
- */
-
-struct ins_format1 {
-#if BYTE_ORDER == LITTLE_ENDIAN
- u_int32_t immediate : 8,
- source : 9,
- destination : 9,
- ret : 1,
- opcode : 4,
- parity : 1;
-#else
- u_int32_t parity : 1,
- opcode : 4,
- ret : 1,
- destination : 9,
- source : 9,
- immediate : 8;
-#endif
-};
-
-struct ins_format2 {
-#if BYTE_ORDER == LITTLE_ENDIAN
- u_int32_t shift_control : 8,
- source : 9,
- destination : 9,
- ret : 1,
- opcode : 4,
- parity : 1;
-#else
- u_int32_t parity : 1,
- opcode : 4,
- ret : 1,
- destination : 9,
- source : 9,
- shift_control : 8;
-#endif
-};
-
-struct ins_format3 {
-#if BYTE_ORDER == LITTLE_ENDIAN
- u_int32_t immediate : 8,
- source : 9,
- address : 10,
- opcode : 4,
- parity : 1;
-#else
- u_int32_t parity : 1,
- opcode : 4,
- address : 10,
- source : 9,
- immediate : 8;
-#endif
-};
-
-union ins_formats {
- struct ins_format1 format1;
- struct ins_format2 format2;
- struct ins_format3 format3;
- u_int8_t bytes[4];
- u_int32_t integer;
-};
-struct instruction {
- union ins_formats format;
- u_int srcline;
- struct symbol *patch_label;
- TAILQ_ENTRY(instruction) links;
-};
-
-#define AIC_OP_OR 0x0
-#define AIC_OP_AND 0x1
-#define AIC_OP_XOR 0x2
-#define AIC_OP_ADD 0x3
-#define AIC_OP_ADC 0x4
-#define AIC_OP_ROL 0x5
-#define AIC_OP_BMOV 0x6
-
-#define AIC_OP_JMP 0x8
-#define AIC_OP_JC 0x9
-#define AIC_OP_JNC 0xa
-#define AIC_OP_CALL 0xb
-#define AIC_OP_JNE 0xc
-#define AIC_OP_JNZ 0xd
-#define AIC_OP_JE 0xe
-#define AIC_OP_JZ 0xf
-
-/* Pseudo Ops */
-#define AIC_OP_SHL 0x10
-#define AIC_OP_SHR 0x20
-#define AIC_OP_ROR 0x30