The recent cleanups make blatantly visible that the pending_int handler

does almost exactly what splx() is doing if ipending is zero, and triggers
soft interrupts as well.

So don't bother checking for ipending in splx, and always invoke pending_int,
which gets renamed as splx_handler for consistency.

5 files changed, 29 insertions, 62 deletions

diff --git a/sys/arch/mips64/mips64/interrupt.c b/sys/arch/mips64/mips64/interrupt.c
index 09711c8cacd..e7c6491383d 100644
--- a/sys/arch/mips64/mips64/interrupt.c
+++ b/sys/arch/mips64/mips64/interrupt.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: interrupt.c,v 1.46 2009/10/22 20:10:44 miod Exp $ */
+/*	$OpenBSD: interrupt.c,v 1.47 2009/10/22 20:39:16 miod Exp $ */
 
 /*
  * Copyright (c) 2001-2004 Opsycon AB  (www.opsycon.se / www.opsycon.com)
@@ -54,6 +54,8 @@
 #include <ddb/db_sym.h>
 #endif
 
+void	dummy_splx(int);
+void	interrupt(struct trap_frame *);
 
 static struct evcount soft_count;
 static int soft_irq = 0;
@@ -68,9 +70,7 @@ struct {
 	uint32_t (*int_hand)(uint32_t, struct trap_frame *);
 } cpu_int_tab[NLOWINT];
 
-void dummy_do_pending_int(int);
-
-int_f *pending_hand = &dummy_do_pending_int;
+int_f	*splx_hand = &dummy_splx;
 
 /*
  *  Modern versions of MIPS processors have extended interrupt
@@ -85,7 +85,7 @@ int_f *pending_hand = &dummy_do_pending_int;
  *  an interrupt handler for that particular interrupt. More than one
  *  handler can register to an interrupt input and one handler may register
  *  for more than one interrupt input. A handler is only called once even
- *  if it register for more than one interrupt input.
+ *  if it registers for more than one interrupt input.
  *
  *  The interrupt mechanism in this port uses a delayed masking model
  *  where interrupts are not really masked when doing an spl(). Instead
@@ -94,38 +94,16 @@ int_f *pending_hand = &dummy_do_pending_int;
  *  register this interrupt as pending and return a new mask to this
  *  code that will turn off the interrupt hardware wise. Later when
  *  the pending interrupt is unmasked it will be processed as usual
- *  and the hardware mask will be restored.
+ *  and the regular hardware mask will be restored.
  */
 
 /*
- *  Interrupt mapping is as follows:
- *
- *  irq can be between 1 and 10. This maps to CPU IPL2..IPL11.
- *  The two software interrupts IPL0 and IPL1 are reserved for
- *  kernel functions. IPL13 is used for the performance counters
- *  in the RM7000. IPL12 extra timer is currently not used.
- *
- *  irq's maps into the software spl register to the bit corresponding
- *  to its status/mask bit in the cause/sr register shifted right eight
- *  places.
- *
- *  A well designed system uses the CPUs interrupt inputs in a way, such
- *  that masking can be done according to the IPL in the CPU status and
- *  interrupt control register. However support for an external masking
- *  register is provided but will cause a slightly higher overhead when
- *  used. When an external masking register is used, no masking in the
- *  CPU is done. Instead a fixed mask is set and used throughout.
- */
-
-void interrupt(struct trap_frame *);
-
-/*
  * Handle an interrupt. Both kernel and user mode is handled here.
  *
  * The interrupt handler is called with the CR_INT bits set that
- * was given when the handlers was registered that needs servicing.
+ * were given when the handler was registered.
  * The handler should return a similar word with a mask indicating
- * which CR_INT bits that has been served.
+ * which CR_INT bits have been handled.
  */
 
 void
@@ -144,9 +122,8 @@ interrupt(struct trap_frame *trapframe)
 	 *  enough... i don't know but better safe than sorry...
 	 *  The main effect is not the interrupts but the spl mechanism.
 	 */
-	if (!(trapframe->sr & SR_INT_ENAB)) {
+	if (!(trapframe->sr & SR_INT_ENAB))
 		return;
-	}
 
 #ifdef DEBUG_INTERRUPT
 	trapdebug_enter(trapframe, 0);
@@ -234,7 +211,7 @@ set_intr(int pri, uint32_t mask,
 struct intrhand *intrhand[INTMASKSIZE];
 
 void
-dummy_do_pending_int(int newcpl)
+dummy_splx(int newcpl)
 {
 	/* Dummy handler */
 }
@@ -285,16 +262,7 @@ splraise(int newcpl)
 void
 splx(int newcpl)
 {
-	struct cpu_info *ci = curcpu();
-
-	if (ci->ci_ipending & ~newcpl)
-		(*pending_hand)(newcpl);
-	else {
-		__asm__ (" .set noreorder\n");
-		ci->ci_cpl = newcpl;
-		__asm__ (" sync\n .set reorder\n");
-		hw_setintrmask(newcpl);
-	}
+	(*splx_hand)(newcpl);
 }
 
 int
@@ -307,4 +275,3 @@ spllower(int newcpl)
 	splx(newcpl);
 	return (oldcpl);
 }
-
diff --git a/sys/arch/sgi/include/intr.h b/sys/arch/sgi/include/intr.h
index da0a71b838b..33cbd8aec22 100644
--- a/sys/arch/sgi/include/intr.h
+++ b/sys/arch/sgi/include/intr.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: intr.h,v 1.32 2009/10/22 20:10:46 miod Exp $ */
+/*	$OpenBSD: intr.h,v 1.33 2009/10/22 20:39:17 miod Exp $ */
 
 /*
  * Copyright (c) 2001-2004 Opsycon AB  (www.opsycon.se / www.opsycon.com)
@@ -146,15 +146,15 @@ void	splinit(void);
 extern uint32_t imask[NIPLS];
 
 /* Inlines */
-static __inline void register_pending_int_handler(void (*)(int));
+static __inline void register_splx_handler(void (*)(int));
 
 typedef void (int_f) (int);
-extern int_f *pending_hand;
+extern int_f *splx_hand;
 
 static __inline void
-register_pending_int_handler(void(*pending)(int))
+register_splx_handler(void(*handler)(int))
 {
-	pending_hand = pending;
+	splx_hand = handler;
 }
 
 int	splraise(int);
diff --git a/sys/arch/sgi/localbus/macebus.c b/sys/arch/sgi/localbus/macebus.c
index e83e04d7907..7c818d0347c 100644
--- a/sys/arch/sgi/localbus/macebus.c
+++ b/sys/arch/sgi/localbus/macebus.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: macebus.c,v 1.47 2009/10/22 20:10:46 miod Exp $ */
+/*	$OpenBSD: macebus.c,v 1.48 2009/10/22 20:39:17 miod Exp $ */
 
 /*
  * Copyright (c) 2000-2004 Opsycon AB  (www.opsycon.se)
@@ -54,7 +54,7 @@ int	 macebusprint(void *, const char *);
 int	 macebussearch(struct device *, void *, void *);
 
 void	 macebus_intr_makemasks(void);
-void	 macebus_do_pending_int(int);
+void	 macebus_splx(int);
 uint32_t macebus_iointr(uint32_t, struct trap_frame *);
 uint32_t macebus_aux(uint32_t, struct trap_frame *);
 
@@ -252,7 +252,7 @@ macebusattach(struct device *parent, struct device *self, void *aux)
 	 * handler. Register all except clock.
 	 */
 	set_intr(INTPRI_MACEIO, CR_INT_0, macebus_iointr);
-	register_pending_int_handler(macebus_do_pending_int);
+	register_splx_handler(macebus_splx);
 
 	/* Set up a handler called when clock interrupts go off. */
 	set_intr(INTPRI_MACEAUX, CR_INT_5, macebus_aux);
@@ -592,7 +592,7 @@ macebus_intr_makemasks(void)
 }
 
 void
-macebus_do_pending_int(int newcpl)
+macebus_splx(int newcpl)
 {
 	struct cpu_info *ci = curcpu();
 
diff --git a/sys/arch/sgi/sgi/ip27_machdep.c b/sys/arch/sgi/sgi/ip27_machdep.c
index 85d18039ded..f98901546d1 100644
--- a/sys/arch/sgi/sgi/ip27_machdep.c
+++ b/sys/arch/sgi/sgi/ip27_machdep.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: ip27_machdep.c,v 1.25 2009/10/22 20:05:28 miod Exp $	*/
+/*	$OpenBSD: ip27_machdep.c,v 1.26 2009/10/22 20:39:17 miod Exp $	*/
 
 /*
  * Copyright (c) 2008, 2009 Miodrag Vallat.
@@ -72,7 +72,7 @@ int	ip27_hub_intr_establish(int (*)(void *), void *, int, int,
 void	ip27_hub_intr_disestablish(int);
 uint32_t ip27_hub_intr_handler(uint32_t, struct trap_frame *);
 void	ip27_hub_intr_makemasks(void);
-void	ip27_hub_do_pending_int(int);
+void	ip27_hub_splx(int);
 
 void	ip27_attach_node(struct device *, int16_t);
 int	ip27_print(void *, const char *);
@@ -231,7 +231,7 @@ ip27_setup()
 	xbow_intr_widget_intr_disestablish = ip27_hub_intr_disestablish;
 
 	set_intr(INTPRI_XBOWMUX, CR_INT_0, ip27_hub_intr_handler);
-	register_pending_int_handler(ip27_hub_do_pending_int);
+	register_splx_handler(ip27_hub_splx);
 
 	/*
 	 * Disable all hardware interrupts.
@@ -718,7 +718,7 @@ ip27_hub_intr_makemasks()
 }
 
 void
-ip27_hub_do_pending_int(int newcpl)
+ip27_hub_splx(int newcpl)
 {
 	struct cpu_info *ci = curcpu();
 
diff --git a/sys/arch/sgi/xbow/xheart.c b/sys/arch/sgi/xbow/xheart.c
index 1a9a8e077ee..65b05c9d10f 100644
--- a/sys/arch/sgi/xbow/xheart.c
+++ b/sys/arch/sgi/xbow/xheart.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: xheart.c,v 1.10 2009/10/22 20:05:28 miod Exp $	*/
+/*	$OpenBSD: xheart.c,v 1.11 2009/10/22 20:39:17 miod Exp $	*/
 
 /*
  * Copyright (c) 2008 Miodrag Vallat.
@@ -70,7 +70,7 @@ int	xheart_intr_establish(int (*)(void *), void *, int, int, const char *);
 void	xheart_intr_disestablish(int);
 uint32_t xheart_intr_handler(uint32_t, struct trap_frame *);
 void	xheart_intr_makemasks(struct xheart_softc *);
-void	xheart_do_pending_int(int);
+void	xheart_splx(int);
 
 int
 xheart_match(struct device *parent, void *match, void *aux)
@@ -132,7 +132,7 @@ xheart_attach(struct device *parent, struct device *self, void *aux)
 		*(volatile uint64_t*)(heart + HEART_IMR(3)) = 0UL;
 
 		set_intr(INTPRI_XBOWMUX, CR_INT_0, xheart_intr_handler);
-		register_pending_int_handler(xheart_do_pending_int);
+		register_splx_handler(xheart_splx);
 	}
 }
 
@@ -390,7 +390,7 @@ xheart_intr_makemasks(struct xheart_softc *sc)
 }
 
 void
-xheart_do_pending_int(int newcpl)
+xheart_splx(int newcpl)
 {
 	struct cpu_info *ci = curcpu();
 
@@ -398,7 +398,7 @@ xheart_do_pending_int(int newcpl)
 	__asm__ (" .set noreorder\n");
 	ci->ci_cpl = newcpl;
 	__asm__ (" sync\n .set reorder\n");
-	if(CPU_IS_PRIMARY(ci))
+	if (CPU_IS_PRIMARY(ci))
 		hw_setintrmask(newcpl);
 	/* If we still have softints pending trigger processing. */
 	if (ci->ci_ipending & SINT_ALLMASK & ~newcpl)