Fix a variety of structure packing and byte order bugs to try to get

BE support working.  Doesn't hurt LE32 or LE64.  Doesn't make BE64
(sparc64) move traffic yet, but it no longer crashes as hard.
ok jsg

2 files changed, 14 insertions, 21 deletions

diff --git a/sys/dev/pci/if_ixgb.c b/sys/dev/pci/if_ixgb.c
index 3e07d58018a..04b84752aa8 100644
--- a/sys/dev/pci/if_ixgb.c
+++ b/sys/dev/pci/if_ixgb.c
@@ -31,7 +31,7 @@ POSSIBILITY OF SUCH DAMAGE.
 
 ***************************************************************************/
 
-/* $OpenBSD: if_ixgb.c,v 1.56 2010/08/27 08:24:53 deraadt Exp $ */
+/* $OpenBSD: if_ixgb.c,v 1.57 2010/09/20 07:50:19 deraadt Exp $ */
 
 #include <dev/pci/if_ixgb.h>
 
@@ -690,10 +690,10 @@ ixgb_encap(struct ixgb_softc *sc, struct mbuf *m_head)
 	/* Find out if we are in VLAN mode */
 	if (m_head->m_flags & M_VLANTAG) {
 		/* Set the VLAN id */
-		current_tx_desc->vlan = m_head->m_pkthdr.ether_vtag;
+		current_tx_desc->vlan = htole16(m_head->m_pkthdr.ether_vtag);
 
 		/* Tell hardware to add tag */
-		current_tx_desc->cmd_type_len |= IXGB_TX_DESC_CMD_VLE;
+		current_tx_desc->cmd_type_len |= htole32(IXGB_TX_DESC_CMD_VLE);
 	}
 
 	tx_buffer->m_head = m_head;
@@ -1476,6 +1476,7 @@ ixgb_get_buf(struct ixgb_softc *sc, int i,
 		return (error);
 	}
 	rx_buffer->m_head = mp;
+	bzero(&sc->rx_desc_base[i], sizeof(sc->rx_desc_base[i]));
 	sc->rx_desc_base[i].buff_addr = htole64(rx_buffer->map->dm_segs[0].ds_addr);
 	bus_dmamap_sync(sc->rxtag, rx_buffer->map, 0,
 	    rx_buffer->map->dm_mapsize, BUS_DMASYNC_PREREAD);
@@ -1742,7 +1743,7 @@ ixgb_rxeof(struct ixgb_softc *sc, int count)
 		} else {
 			eop = 0;
 		}
-		len = current_desc->length;
+		len = letoh16(current_desc->length);
 
 		if (current_desc->errors & (IXGB_RX_DESC_ERRORS_CE |
 			    IXGB_RX_DESC_ERRORS_SE | IXGB_RX_DESC_ERRORS_P |
@@ -1774,7 +1775,7 @@ ixgb_rxeof(struct ixgb_softc *sc, int count)
 #if NVLAN > 0
 				if (current_desc->status & IXGB_RX_DESC_STATUS_VP) {
 					sc->fmp->m_pkthdr.ether_vtag =
-					    current_desc->special;
+					    letoh16(current_desc->special);
 					sc->fmp->m_flags |= M_VLANTAG;
 				}
 #endif
diff --git a/sys/dev/pci/ixgb_hw.h b/sys/dev/pci/ixgb_hw.h
index 1e14df6bf54..e1da959436f 100644
--- a/sys/dev/pci/ixgb_hw.h
+++ b/sys/dev/pci/ixgb_hw.h
@@ -31,7 +31,7 @@
 
 *******************************************************************************/
 
-/* $OpenBSD: ixgb_hw.h,v 1.2 2008/02/19 18:47:18 brad Exp $ */ 
+/* $OpenBSD: ixgb_hw.h,v 1.3 2010/09/20 07:50:19 deraadt Exp $ */ 
 
 #ifndef _IXGB_HW_H_
 #define _IXGB_HW_H_
@@ -561,11 +561,7 @@ typedef enum {
 #define G6XXX_XGXS_XAUI_VS2_INPUT_MASK      0x0F	/* XAUI lanes
 							 * synchronized */
 
-/* Layout of a single receive descriptor.  The controller assumes that this
- * structure is packed into 16 bytes, which is a safe assumption with most
- * compilers.  However, some compilers may insert padding between the fields,
- * in which case the structure must be packed in some compiler-specific
- * manner. */
+/* Layout of a single receive descriptor. */
 struct ixgb_rx_desc {
 	uint64_t buff_addr;
 	uint16_t length;
@@ -573,7 +569,7 @@ struct ixgb_rx_desc {
 	uint8_t status;
 	uint8_t errors;
 	uint16_t special;
-};
+} __packed;
 
 #define IXGB_RX_DESC_STATUS_DD    0x01
 #define IXGB_RX_DESC_STATUS_EOP   0x02
@@ -595,18 +591,14 @@ struct ixgb_rx_desc {
 #define IXGB_RX_DESC_SPECIAL_PRI_SHIFT  0x000D	/* Priority is in upper 3 of 16 
 						 */
 
-/* Layout of a single transmit descriptor.  The controller assumes that this
- * structure is packed into 16 bytes, which is a safe assumption with most
- * compilers.  However, some compilers may insert padding between the fields,
- * in which case the structure must be packed in some compiler-specific
- * manner. */
+/* Layout of a single transmit descriptor. */
 struct ixgb_tx_desc {
 	uint64_t buff_addr;
 	uint32_t cmd_type_len;
 	uint8_t status;
 	uint8_t popts;
 	uint16_t vlan;
-};
+} __packed;
 
 #define IXGB_TX_DESC_LENGTH_MASK    0x000FFFFF
 #define IXGB_TX_DESC_TYPE_MASK      0x00F00000
@@ -639,7 +631,7 @@ struct ixgb_context_desc {
 	uint8_t status;
 	uint8_t hdr_len;
 	uint16_t mss;
-};
+} __packed;
 
 #define IXGB_CONTEXT_DESC_CMD_TCP 0x01000000
 #define IXGB_CONTEXT_DESC_CMD_IP  0x02000000
@@ -678,7 +670,7 @@ struct ixgb_flash_buffer {
 	uint8_t filler2[0x2AAA];
 	uint8_t cmd1;
 	uint8_t filler3[0xAAAA];
-};
+} __packed;
 
 /*
  * This is a little-endian specific check.
@@ -699,7 +691,7 @@ struct ixgb_fc {
 	uint16_t pause_time;	/* Flow Control Pause timer */
 	boolean_t send_xon;	/* Flow control send XON */
 	ixgb_fc_type type;	/* Type of flow control */
-};
+} __packed;
 
 /* The historical defaults for the flow control values are given below. */
 #define FC_DEFAULT_HI_THRESH        (0x8000)	/* 32KB */