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authorBrad Smith <brad@cvs.openbsd.org>2006-02-24 00:57:50 +0000
committerBrad Smith <brad@cvs.openbsd.org>2006-02-24 00:57:50 +0000
commitc17106b41067c5b5295f53ac64e18e0295f6176d (patch)
tree1b7076c2ed764bbffc3008d55841fbf1c456817e
parent5e5014427132924bb52ebb624213191b180a1638 (diff)
clear the powerdown mode that Windows will put bce chips into
when soft rebooting a system, also set proper LED modes. From FreeBSD's bfe driver. Tested by Alexey E. Suslikov <suslikov at texnika dot com dot ua>
-rw-r--r--sys/dev/pci/if_bce.c11
-rw-r--r--sys/dev/pci/if_bcereg.h7
2 files changed, 13 insertions, 5 deletions
diff --git a/sys/dev/pci/if_bce.c b/sys/dev/pci/if_bce.c
index 9c9ad45a7a3..9ff8419da63 100644
--- a/sys/dev/pci/if_bce.c
+++ b/sys/dev/pci/if_bce.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: if_bce.c,v 1.10 2005/10/06 20:09:28 brad Exp $ */
+/* $OpenBSD: if_bce.c,v 1.11 2006/02/24 00:57:49 brad Exp $ */
/* $NetBSD: if_bce.c,v 1.3 2003/09/29 01:53:02 mrg Exp $ */
/*
@@ -959,10 +959,15 @@ bce_init(ifp)
sc->bce_txsnext = 0;
sc->bce_txin = 0;
- /* enable crc32 generation */
+ /* enable crc32 generation and set proper LED modes */
bus_space_write_4(sc->bce_btag, sc->bce_bhandle, BCE_MACCTL,
bus_space_read_4(sc->bce_btag, sc->bce_bhandle, BCE_MACCTL) |
- BCE_EMC_CG);
+ BCE_EMC_CRC32_ENAB | BCE_EMC_LED);
+
+ /* reset or clear powerdown control bit */
+ bus_space_write_4(sc->bce_btag, sc->bce_bhandle, BCE_MACCTL,
+ bus_space_read_4(sc->bce_btag, sc->bce_bhandle, BCE_MACCTL) &
+ ~BCE_EMC_PDOWN);
/* setup DMA interrupt control */
bus_space_write_4(sc->bce_btag, sc->bce_bhandle, BCE_DMAI_CTL, 1 << 24); /* MAGIC */
diff --git a/sys/dev/pci/if_bcereg.h b/sys/dev/pci/if_bcereg.h
index 9de71f4f4e6..1b6c6066de8 100644
--- a/sys/dev/pci/if_bcereg.h
+++ b/sys/dev/pci/if_bcereg.h
@@ -1,4 +1,4 @@
-/* $OpenBSD: if_bcereg.h,v 1.1 2004/02/13 23:24:30 andreas Exp $ */
+/* $OpenBSD: if_bcereg.h,v 1.2 2006/02/24 00:57:49 brad Exp $ */
/* $NetBSD: if_bcereg.h,v 1.3 2003/09/29 01:53:02 mrg Exp $ */
/*
@@ -72,7 +72,10 @@
/* Ethernet MAC Control */
#define BCE_MACCTL 0x00A8 /* ethernet mac control */
/* mac control bits */
-#define BCE_EMC_CG 0x00000001 /* crc32 generation */
+#define BCE_EMC_CRC32_ENAB 0x00000001 /* crc32 generation */
+#define BCE_EMC_PDOWN 0x00000004 /* PHY powerdown */
+#define BCE_EMC_EDET 0x00000008 /* PHY energy detect */
+#define BCE_EMC_LED 0x000000e0 /* PHY LED control */
/* DMA Interrupt control */
#define BCE_DMAI_CTL 0x0100