diff options
| author | Mark Kettenis <kettenis@cvs.openbsd.org> | 2006-11-23 21:56:33 +0000 |
|---|---|---|
| committer | Mark Kettenis <kettenis@cvs.openbsd.org> | 2006-11-23 21:56:33 +0000 |
| commit | d6c6607df635185a10749b951e99de542d74ef6d (patch) | |
| tree | 37141e6cede0fef7459d50c6bfe8d8a0e86574b4 | |
| parent | e4c2947427ebf9be147eb451d67af43385dc4731 (diff) | |
Set some more power management bits; makes Yukon-2 XL work somewhat.
ok brad@
| -rw-r--r-- | sys/dev/pci/if_msk.c | 31 | ||||
| -rw-r--r-- | sys/dev/pci/if_skreg.h | 15 |
2 files changed, 41 insertions, 5 deletions
diff --git a/sys/dev/pci/if_msk.c b/sys/dev/pci/if_msk.c index 06ef68a428f..6a7e78d902f 100644 --- a/sys/dev/pci/if_msk.c +++ b/sys/dev/pci/if_msk.c @@ -1,4 +1,4 @@ -/* $OpenBSD: if_msk.c,v 1.23 2006/11/17 19:34:34 kettenis Exp $ */ +/* $OpenBSD: if_msk.c,v 1.24 2006/11/23 21:56:32 kettenis Exp $ */ /* * Copyright (c) 1997, 1998, 1999, 2000 @@ -792,20 +792,45 @@ mskc_probe(struct device *parent, void *match, void *aux) */ void msk_reset(struct sk_softc *sc) { - u_int32_t imtimer_ticks; + u_int32_t imtimer_ticks, reg1; int reg; DPRINTFN(2, ("msk_reset\n")); CSR_WRITE_1(sc, SK_CSR, SK_CSR_SW_RESET); CSR_WRITE_1(sc, SK_CSR, SK_CSR_MASTER_RESET); - CSR_WRITE_2(sc, SK_LINK_CTRL, SK_LINK_RESET_SET); DELAY(1000); CSR_WRITE_1(sc, SK_CSR, SK_CSR_SW_UNRESET); DELAY(2); CSR_WRITE_1(sc, SK_CSR, SK_CSR_MASTER_UNRESET); + + sk_win_write_1(sc, SK_TESTCTL1, 2); + + reg1 = sk_win_read_4(sc, SK_Y2_PCI_REG(SK_PCI_OURREG1)); + if (sc->sk_type == SK_YUKON_XL && sc->sk_rev > SK_YUKON_XL_REV_A1) + reg1 |= (SK_Y2_REG1_PHY1_COMA | SK_Y2_REG1_PHY2_COMA); + else + reg1 &= ~(SK_Y2_REG1_PHY1_COMA | SK_Y2_REG1_PHY2_COMA); + sk_win_write_4(sc, SK_Y2_PCI_REG(SK_PCI_OURREG1), reg1); + + if (sc->sk_type == SK_YUKON_XL && sc->sk_rev > SK_YUKON_XL_REV_A1) + sk_win_write_1(sc, SK_Y2_CLKGATE, + SK_Y2_CLKGATE_LINK1_GATE_DIS | + SK_Y2_CLKGATE_LINK2_GATE_DIS | + SK_Y2_CLKGATE_LINK1_CORE_DIS | + SK_Y2_CLKGATE_LINK2_CORE_DIS | + SK_Y2_CLKGATE_LINK1_PCI_DIS | SK_Y2_CLKGATE_LINK2_PCI_DIS); + else + sk_win_write_1(sc, SK_Y2_CLKGATE, 0); + + CSR_WRITE_2(sc, SK_LINK_CTRL, SK_LINK_RESET_SET); + CSR_WRITE_2(sc, SK_LINK_CTRL + SK_WIN_LEN, SK_LINK_RESET_SET); + DELAY(1000); CSR_WRITE_2(sc, SK_LINK_CTRL, SK_LINK_RESET_CLEAR); + CSR_WRITE_2(sc, SK_LINK_CTRL + SK_WIN_LEN, SK_LINK_RESET_CLEAR); + + sk_win_write_1(sc, SK_TESTCTL1, 1); DPRINTFN(2, ("sk_reset: sk_csr=%x\n", CSR_READ_1(sc, SK_CSR))); DPRINTFN(2, ("msk_reset: sk_link_ctrl=%x\n", diff --git a/sys/dev/pci/if_skreg.h b/sys/dev/pci/if_skreg.h index b59a0387092..fbd9f3534a7 100644 --- a/sys/dev/pci/if_skreg.h +++ b/sys/dev/pci/if_skreg.h @@ -1,4 +1,4 @@ -/* $OpenBSD: if_skreg.h,v 1.40 2006/11/16 03:27:46 brad Exp $ */ +/* $OpenBSD: if_skreg.h,v 1.41 2006/11/23 21:56:32 kettenis Exp $ */ /* * Copyright (c) 1997, 1998, 1999, 2000 @@ -1329,7 +1329,15 @@ /* Block 32-33 -- Pattern Ram */ #define SK_WOL_PRAM 0x1000 -/* Block 0x22 - 0x3f -- reserved */ +/* Block 0x22 - 0x37 -- reserved */ + +/* Block 0x38 -- Y2 PCI config registers */ +#define SK_Y2_PCI_BASE 0x1c00 + +/* Compute offset of mirrored PCI register */ +#define SK_Y2_PCI_REG(reg) ((reg) + SK_Y2_PCI_BASE) + +/* Block 0x39 - 0x3f -- reserved */ /* Block 0x40 to 0x4F -- XMAC 1 registers */ #define SK_XMAC1_BASE 0x2000 @@ -1449,6 +1457,9 @@ #define SK_PCI_PWRMGMTCTRL 0x004C /* 16 bits */ #define SK_PCI_PME_EVENT 0x004F +#define SK_Y2_REG1_PHY1_COMA 0x10000000 +#define SK_Y2_REG1_PHY2_COMA 0x20000000 + #define SK_PSTATE_MASK 0x0003 #define SK_PSTATE_D0 0x0000 #define SK_PSTATE_D1 0x0001 |