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authorMiod Vallat <miod@cvs.openbsd.org>2010-02-05 20:44:02 +0000
committerMiod Vallat <miod@cvs.openbsd.org>2010-02-05 20:44:02 +0000
commite5f3f0dd86849cb662e0b5474e89bcd29a59de5d (patch)
tree9eff8822e73961ee543da6154dd722b83dd0ae42
parent4b857cc933117f0737242660d514f3429ca162e9 (diff)
When faking the glxpcib(4) BARs, do not mask the low 12 bits, but only as
many bits as necessary to match the alignment requirements. This prevents all the I/O BARs to end up using the same address.
-rw-r--r--sys/arch/loongson/dev/glx.c14
1 files changed, 6 insertions, 8 deletions
diff --git a/sys/arch/loongson/dev/glx.c b/sys/arch/loongson/dev/glx.c
index 215153d0bd4..40b73b18758 100644
--- a/sys/arch/loongson/dev/glx.c
+++ b/sys/arch/loongson/dev/glx.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: glx.c,v 1.2 2010/01/27 05:35:02 miod Exp $ */
+/* $OpenBSD: glx.c,v 1.3 2010/02/05 20:44:01 miod Exp $ */
/*
* Copyright (c) 2009 Miodrag Vallat.
@@ -322,12 +322,10 @@ glx_fn0_read(int reg)
else {
data = pcib_bar_values[index];
if (data == 0xffffffff)
- data = PCI_MAPREG_IO_ADDR_MASK &
- ~(pcib_bar_sizes[index] - 1);
- else {
- msr = rdmsr(pcib_bar_msr[index]);
- data = msr & 0xfffff000;
- }
+ data = PCI_MAPREG_IO_ADDR_MASK;
+ else
+ data = (pcireg_t)rdmsr(pcib_bar_msr[index]);
+ data &= ~(pcib_bar_sizes[index] - 1);
if (data != 0)
data |= PCI_MAPREG_TYPE_IO;
}
@@ -389,7 +387,7 @@ glx_fn0_write(int reg, pcireg_t data)
if ((data & PCI_MAPREG_TYPE_MASK) ==
PCI_MAPREG_TYPE_IO) {
data &= PCI_MAPREG_IO_ADDR_MASK;
- data &= 0xfffff000;
+ data &= ~(pcib_bar_sizes[index] - 1);
wrmsr(pcib_bar_msr[index],
(0x0000f000UL << 32) | (1UL << 32) | data);
} else {