diff options
author | Igor Sobrado <sobrado@cvs.openbsd.org> | 2007-05-29 09:54:28 +0000 |
---|---|---|
committer | Igor Sobrado <sobrado@cvs.openbsd.org> | 2007-05-29 09:54:28 +0000 |
commit | a02b0ab1d25f9bc09553560af9423058dc820a74 (patch) | |
tree | efe2654eb2693d51b404318228a63dfe427e48d9 | |
parent | bcb3268578407a26457b1d59dc793c1486c7024f (diff) |
use the right capitalization for `SBus'
ok jmc@
27 files changed, 106 insertions, 106 deletions
diff --git a/sys/arch/sparc/conf/GENERIC b/sys/arch/sparc/conf/GENERIC index 465502156cd..61bc21022b1 100644 --- a/sys/arch/sparc/conf/GENERIC +++ b/sys/arch/sparc/conf/GENERIC @@ -1,4 +1,4 @@ -# $OpenBSD: GENERIC,v 1.89 2006/12/10 16:14:20 miod Exp $ +# $OpenBSD: GENERIC,v 1.90 2007/05/29 09:54:03 sobrado Exp $ # # For further information on compiling OpenBSD kernels, see the config(8) # man page. @@ -244,7 +244,7 @@ wsdisplay* at bwtwo? cgtwo0 at vmes0 addr 0xff400000 level 4 vect 0xa8 wsdisplay* at cgtwo? -# Sun "cgthree" Sbus color framebuffer. +# Sun "cgthree" SBus color framebuffer. cgthree* at sbus? wsdisplay* at cgthree? diff --git a/sys/arch/sparc/conf/RAMDISK b/sys/arch/sparc/conf/RAMDISK index 0be8564d799..274f14f24b3 100644 --- a/sys/arch/sparc/conf/RAMDISK +++ b/sys/arch/sparc/conf/RAMDISK @@ -1,4 +1,4 @@ -# $OpenBSD: RAMDISK,v 1.61 2007/05/01 15:22:23 deraadt Exp $ +# $OpenBSD: RAMDISK,v 1.62 2007/05/29 09:54:03 sobrado Exp $ # $NetBSD: GENERIC,v 1.28.2.1 1996/07/02 23:55:22 jtc Exp $ # Machine architecture; required by config(8) @@ -248,7 +248,7 @@ wsdisplay* at bwtwo? cgtwo0 at vmes0 addr 0xff400000 level 4 vect 0xa8 wsdisplay* at cgtwo? -# Sun "cgthree" Sbus color framebuffer. +# Sun "cgthree" SBus color framebuffer. cgthree* at sbus? wsdisplay* at cgthree? diff --git a/sys/arch/sparc/conf/SUN4C b/sys/arch/sparc/conf/SUN4C index 258dd1a4ee3..71472d24be1 100644 --- a/sys/arch/sparc/conf/SUN4C +++ b/sys/arch/sparc/conf/SUN4C @@ -1,4 +1,4 @@ -# $OpenBSD: SUN4C,v 1.56 2006/12/09 20:06:46 miod Exp $ +# $OpenBSD: SUN4C,v 1.57 2007/05/29 09:54:03 sobrado Exp $ # $NetBSD: GENERIC,v 1.48 1997/08/23 19:19:01 mjacob Exp $ # Machine architecture; required by config(8) @@ -113,7 +113,7 @@ bwtwo0 at sbus0 # sun4c on-board bwtwo* at sbus? # sun4c and sun4m wsdisplay* at bwtwo? -# Sun "cgthree" Sbus color framebuffer. +# Sun "cgthree" SBus color framebuffer. cgthree* at sbus? wsdisplay* at cgthree? diff --git a/sys/arch/sparc/conf/SUN4M b/sys/arch/sparc/conf/SUN4M index 70fe7dafef8..28a6ea0038c 100644 --- a/sys/arch/sparc/conf/SUN4M +++ b/sys/arch/sparc/conf/SUN4M @@ -1,4 +1,4 @@ -# $OpenBSD: SUN4M,v 1.72 2006/12/09 20:06:46 miod Exp $ +# $OpenBSD: SUN4M,v 1.73 2007/05/29 09:54:03 sobrado Exp $ # $NetBSD: GENERIC,v 1.28.2.1 1996/07/02 23:55:22 jtc Exp $ # Machine architecture; required by config(8) @@ -144,7 +144,7 @@ be* at qec? bwtwo* at sbus? # sun4c and sun4m wsdisplay* at bwtwo? -# Sun "cgthree" Sbus color framebuffer. +# Sun "cgthree" SBus color framebuffer. cgthree* at sbus? wsdisplay* at cgthree? diff --git a/sys/arch/sparc/conf/files.sparc b/sys/arch/sparc/conf/files.sparc index bc63fdfa95f..00110dace96 100644 --- a/sys/arch/sparc/conf/files.sparc +++ b/sys/arch/sparc/conf/files.sparc @@ -1,4 +1,4 @@ -# $OpenBSD: files.sparc,v 1.77 2007/02/03 20:08:50 miod Exp $ +# $OpenBSD: files.sparc,v 1.78 2007/05/29 09:54:03 sobrado Exp $ # $NetBSD: files.sparc,v 1.44 1997/08/31 21:29:16 pk Exp $ # @(#)files.sparc 8.1 (Berkeley) 7/19/93 @@ -264,7 +264,7 @@ file arch/sparc/dev/si.c si | sw #attach en at sbus with en_sbus #file arch/sparc/dev/if_en_sbus.c en_sbus -# Qlogic ISP 10x0 (Sbus) family +# Qlogic ISP 10x0 (SBus) family # device declaration in sys/conf/files attach isp at sbus with isp_sbus file arch/sparc/dev/isp_sbus.c isp_sbus diff --git a/sys/arch/sparc/dev/btreg.h b/sys/arch/sparc/dev/btreg.h index 395e23747f1..e96a233396d 100644 --- a/sys/arch/sparc/dev/btreg.h +++ b/sys/arch/sparc/dev/btreg.h @@ -1,4 +1,4 @@ -/* $OpenBSD: btreg.h,v 1.4 2003/06/02 23:27:53 millert Exp $ */ +/* $OpenBSD: btreg.h,v 1.5 2007/05/29 09:54:05 sobrado Exp $ */ /* $NetBSD: btreg.h,v 1.4 1996/02/27 22:09:21 thorpej Exp $ */ /* @@ -105,7 +105,7 @@ struct bt_regs { /* - * Sbus framebuffer control look like this (usually at offset 0x400000). + * SBus framebuffer control look like this (usually at offset 0x400000). */ struct fbcontrol { struct bt_regs fbc_dac; diff --git a/sys/arch/sparc/dev/dma.c b/sys/arch/sparc/dev/dma.c index b39a1b4f6cf..e3bb248bd41 100644 --- a/sys/arch/sparc/dev/dma.c +++ b/sys/arch/sparc/dev/dma.c @@ -1,4 +1,4 @@ -/* $OpenBSD: dma.c,v 1.23 2007/04/10 17:47:54 miod Exp $ */ +/* $OpenBSD: dma.c,v 1.24 2007/05/29 09:54:07 sobrado Exp $ */ /* $NetBSD: dma.c,v 1.46 1997/08/27 11:24:16 bouyer Exp $ */ /* @@ -347,7 +347,7 @@ dma_reset(sc, isledma) csr |= D_RESET; /* reset DMA */ DMACSR(sc) = csr; - DELAY(200); /* > 10 Sbus clocks(?) */ + DELAY(200); /* > 10 SBus clocks(?) */ /*DMAWAIT1(sc); why was this here? */ DMACSR(sc) &= ~D_RESET; /* de-assert reset line */ diff --git a/sys/arch/sparc/dev/obio.c b/sys/arch/sparc/dev/obio.c index 745c07258ea..26295b24e15 100644 --- a/sys/arch/sparc/dev/obio.c +++ b/sys/arch/sparc/dev/obio.c @@ -1,4 +1,4 @@ -/* $OpenBSD: obio.c,v 1.16 2004/09/29 07:35:11 miod Exp $ */ +/* $OpenBSD: obio.c,v 1.17 2007/05/29 09:54:11 sobrado Exp $ */ /* $NetBSD: obio.c,v 1.37 1997/07/29 09:58:11 fair Exp $ */ /* @@ -218,7 +218,7 @@ obioattach(parent, self, args) return; /* - * There is only one obio bus (it is in fact one of the Sbus slots) + * There is only one obio bus (it is in fact one of the SBus slots) * How about VME? */ if (self->dv_unit > 0) { diff --git a/sys/arch/sparc/dev/sbus.c b/sys/arch/sparc/dev/sbus.c index c61107d8cdb..0357403db49 100644 --- a/sys/arch/sparc/dev/sbus.c +++ b/sys/arch/sparc/dev/sbus.c @@ -1,4 +1,4 @@ -/* $OpenBSD: sbus.c,v 1.15 2006/06/02 20:00:54 miod Exp $ */ +/* $OpenBSD: sbus.c,v 1.16 2007/05/29 09:54:13 sobrado Exp $ */ /* $NetBSD: sbus.c,v 1.17 1997/06/01 22:10:39 pk Exp $ */ /* @@ -42,7 +42,7 @@ */ /* - * Sbus stuff. + * SBus stuff. */ #include <sys/param.h> @@ -129,7 +129,7 @@ sbus_match(parent, vcf, aux) } /* - * Attach an Sbus. + * Attach an SBus. */ void sbus_attach(parent, self, aux) @@ -146,7 +146,7 @@ sbus_attach(parent, self, aux) int rlen; /* - * XXX there is only one Sbus, for now -- do not know how to + * XXX there is only one SBus, for now -- do not know how to * address children on others */ if (sc->sc_dev.dv_unit > 0 && ca->ca_bustype != BUS_XBOX) { @@ -218,7 +218,7 @@ sbus_translate(dev, ca) register int i; if (sc->sc_nrange == 0) { - /* Old-style Sbus configuration */ + /* Old-style SBus configuration */ base = (int)ca->ca_ra.ra_paddr; if (SBUS_ABS(base)) { ca->ca_slot = SBUS_ABS_TO_SLOT(base); diff --git a/sys/arch/sparc/dev/sbusreg.h b/sys/arch/sparc/dev/sbusreg.h index 3a6cef35a4e..f6449311a5e 100644 --- a/sys/arch/sparc/dev/sbusreg.h +++ b/sys/arch/sparc/dev/sbusreg.h @@ -1,4 +1,4 @@ -/* $OpenBSD: sbusreg.h,v 1.4 2003/06/02 23:27:54 millert Exp $ */ +/* $OpenBSD: sbusreg.h,v 1.5 2007/05/29 09:54:15 sobrado Exp $ */ /* $NetBSD: sbusreg.h,v 1.3 1997/09/14 19:17:25 pk Exp $ */ /* @@ -44,10 +44,10 @@ /* * Sun-4c S-bus definitions. (Should be made generic!) * - * Sbus slot 0 is not a separate slot; it talks to the onboard I/O devices. - * It is, however, addressed just like any `real' Sbus. + * SBus slot 0 is not a separate slot; it talks to the onboard I/O devices. + * It is, however, addressed just like any `real' SBus. * - * Sbus device addresses are obtained from the FORTH PROMs. They come + * SBus device addresses are obtained from the FORTH PROMs. They come * in `absolute' and `relative' address flavors, so we have to handle both. * Relative addresses do *not* include the slot number. */ @@ -65,5 +65,5 @@ struct sbusreg { #define NSBUSCFG 20 /* Actual number dependent on machine model */ - u_int32_t sbus_sbuscfg[NSBUSCFG]; /* Sbus configuration control */ + u_int32_t sbus_sbuscfg[NSBUSCFG]; /* SBus configuration control */ }; diff --git a/sys/arch/sparc/dev/sbusvar.h b/sys/arch/sparc/dev/sbusvar.h index 0cd1af28626..2c8b8a6cc9f 100644 --- a/sys/arch/sparc/dev/sbusvar.h +++ b/sys/arch/sparc/dev/sbusvar.h @@ -1,4 +1,4 @@ -/* $OpenBSD: sbusvar.h,v 1.8 2006/06/02 20:00:54 miod Exp $ */ +/* $OpenBSD: sbusvar.h,v 1.9 2007/05/29 09:54:17 sobrado Exp $ */ /* $NetBSD: sbusvar.h,v 1.4 1996/04/22 02:35:05 abrown Exp $ */ /* @@ -46,15 +46,15 @@ */ /* - * Sbus driver attach arguments. + * SBus driver attach arguments. */ struct sbus_attach_args { struct romaux sa_ra; /* name, node, addr, etc */ - int sa_slot; /* Sbus slot number */ + int sa_slot; /* SBus slot number */ int sa_offset; /* offset within slot */ }; -/* variables per Sbus */ +/* variables per SBus */ struct sbus_softc { struct device sc_dev; /* base device */ int sc_clockfreq; /* clock frequency (in Hz) */ diff --git a/sys/arch/sparc/dev/stp_sbus.c b/sys/arch/sparc/dev/stp_sbus.c index 427f6712fb1..b8ebeb87eda 100644 --- a/sys/arch/sparc/dev/stp_sbus.c +++ b/sys/arch/sparc/dev/stp_sbus.c @@ -1,4 +1,4 @@ -/* $OpenBSD: stp_sbus.c,v 1.5 2006/06/02 20:00:54 miod Exp $ */ +/* $OpenBSD: stp_sbus.c,v 1.6 2007/05/29 09:54:19 sobrado Exp $ */ /* $NetBSD: stp4020.c,v 1.23 2002/06/01 23:51:03 lukem Exp $ */ /*- @@ -120,7 +120,7 @@ stpattach(parent, self, aux) } if (ca->ca_ra.ra_nintr != 2) { - printf(": expect 2 interrupt Sbus levels; got %d\n", + printf(": expect 2 interrupt SBus levels; got %d\n", ca->ca_ra.ra_nintr); return; } diff --git a/sys/arch/sparc/include/pte.h b/sys/arch/sparc/include/pte.h index 41c1f23c9f4..112da7a5e47 100644 --- a/sys/arch/sparc/include/pte.h +++ b/sys/arch/sparc/include/pte.h @@ -1,4 +1,4 @@ -/* $OpenBSD: pte.h,v 1.5 1999/09/07 08:30:52 art Exp $ */ +/* $OpenBSD: pte.h,v 1.6 2007/05/29 09:54:21 sobrado Exp $ */ /* $NetBSD: pte.h,v 1.19 1997/08/05 11:00:10 pk Exp $ */ /* @@ -269,7 +269,7 @@ extern int mmu_has_hole; #define PG_TYPE 0x0c000000 /* both type bits */ #define PG_OBMEM 0x00000000 /* on board memory */ -#define PG_OBIO 0x04000000 /* on board I/O (incl. Sbus on 4c) */ +#define PG_OBIO 0x04000000 /* on board I/O (incl. SBus on 4c) */ #define PG_VME16 0x08000000 /* 16-bit-data VME space */ #define PG_VME32 0x0c000000 /* 32-bit-data VME space */ #if defined(SUN4M) diff --git a/sys/arch/sparc/sparc/autoconf.c b/sys/arch/sparc/sparc/autoconf.c index 2495f0fd0d6..a2bbcc4f915 100644 --- a/sys/arch/sparc/sparc/autoconf.c +++ b/sys/arch/sparc/sparc/autoconf.c @@ -1,4 +1,4 @@ -/* $OpenBSD: autoconf.c,v 1.78 2007/05/04 19:30:55 deraadt Exp $ */ +/* $OpenBSD: autoconf.c,v 1.79 2007/05/29 09:53:54 sobrado Exp $ */ /* $NetBSD: autoconf.c,v 1.73 1997/07/29 09:41:53 fair Exp $ */ /* @@ -1002,7 +1002,7 @@ romprop(rp, cp, node) for (n = 0; n < len; n++) { intr = interrupts[n]; /* - * Non-Sbus devices (such as the cgfourteen, + * Non-SBus devices (such as the cgfourteen, * which attaches on obio) do not need their * interrupt level translated. */ diff --git a/sys/arch/sparc/sparc/intr.c b/sys/arch/sparc/sparc/intr.c index d5ace6ea10a..0906c999d96 100644 --- a/sys/arch/sparc/sparc/intr.c +++ b/sys/arch/sparc/sparc/intr.c @@ -1,4 +1,4 @@ -/* $OpenBSD: intr.c,v 1.29 2007/05/01 15:21:43 deraadt Exp $ */ +/* $OpenBSD: intr.c,v 1.30 2007/05/29 09:53:57 sobrado Exp $ */ /* $NetBSD: intr.c,v 1.20 1997/07/29 09:42:03 fair Exp $ */ /* @@ -106,7 +106,7 @@ union sir sir; int netisr; /* - * Level 1 software interrupt (could also be Sbus level 1 interrupt). + * Level 1 software interrupt (could also be SBus level 1 interrupt). * Three possible reasons: * ROM console input needed * Network software interrupt @@ -227,15 +227,15 @@ intr_init() */ struct intrhand *intrhand[15] = { NULL, /* 0 = error */ - &level01, /* 1 = software level 1 + Sbus */ - NULL, /* 2 = Sbus level 2 (4m: Sbus L1) */ - NULL, /* 3 = SCSI + DMA + Sbus level 3 (4m: L2,lpt)*/ + &level01, /* 1 = software level 1 + SBus */ + NULL, /* 2 = SBus level 2 (4m: SBus L1) */ + NULL, /* 3 = SCSI + DMA + SBus level 3 (4m: L2,lpt)*/ NULL, /* 4 = software level 4 (tty softint) (scsi) */ - NULL, /* 5 = Ethernet + Sbus level 4 (4m: Sbus L3) */ + NULL, /* 5 = Ethernet + SBus level 4 (4m: SBus L3) */ NULL, /* 6 = software level 6 (not used) (4m: enet)*/ - NULL, /* 7 = video + Sbus level 5 */ - NULL, /* 8 = Sbus level 6 */ - NULL, /* 9 = Sbus level 7 */ + NULL, /* 7 = video + SBus level 5 */ + NULL, /* 8 = SBus level 6 */ + NULL, /* 9 = SBus level 7 */ &level10, /* 10 = counter 0 = clock */ NULL, /* 11 = floppy */ NULL, /* 12 = zs hardware interrupt */ diff --git a/sys/arch/sparc/sparc/iommu.c b/sys/arch/sparc/sparc/iommu.c index 5ac357db671..79bfee1250e 100644 --- a/sys/arch/sparc/sparc/iommu.c +++ b/sys/arch/sparc/sparc/iommu.c @@ -1,4 +1,4 @@ -/* $OpenBSD: iommu.c,v 1.19 2005/03/29 11:33:18 miod Exp $ */ +/* $OpenBSD: iommu.c,v 1.20 2007/05/29 09:53:59 sobrado Exp $ */ /* $NetBSD: iommu.c,v 1.13 1997/07/29 09:42:04 fair Exp $ */ /* @@ -272,7 +272,7 @@ iommu_attach(parent, self, aux) oca.ca_ra.ra_bp = NULL; /* - * Loop through ROM children (expect Sbus among them). + * Loop through ROM children (expect SBus among them). */ for (node = firstchild(node); node; node = nextsibling(node)) { name = getpropstring(node, "name"); diff --git a/sys/arch/sparc64/dev/iommu.c b/sys/arch/sparc64/dev/iommu.c index 46ffe82e534..d38ac30c0f3 100644 --- a/sys/arch/sparc64/dev/iommu.c +++ b/sys/arch/sparc64/dev/iommu.c @@ -1,4 +1,4 @@ -/* $OpenBSD: iommu.c,v 1.46 2007/04/04 20:09:37 kettenis Exp $ */ +/* $OpenBSD: iommu.c,v 1.47 2007/05/29 09:53:59 sobrado Exp $ */ /* $NetBSD: iommu.c,v 1.47 2002/02/08 20:03:45 eeh Exp $ */ /* @@ -117,7 +117,7 @@ iommu_strbuf_flush(struct strbuf_ctl *sb, vaddr_t va) } /* - * initialise the UltraSPARC IOMMU (SBUS or PCI): + * initialise the UltraSPARC IOMMU (SBus or PCI): * - allocate and setup the iotsb. * - enable the IOMMU * - initialise the streaming buffers (if they exist) @@ -135,7 +135,7 @@ iommu_init(char *name, struct iommu_state *is, int tsbsize, u_int32_t iovabase) /* * Setup the iommu. * - * The sun4u iommu is part of the SBUS or PCI controller so we will + * The sun4u iommu is part of the SBus or PCI controller so we will * deal with it here.. * * For sysio and psycho/psycho+ the IOMMU address space always ends at @@ -560,7 +560,7 @@ iommu_strbuf_flush_done(struct iommu_map_state *ims) } /* - * IOMMU DVMA operations, common to SBUS and PCI. + * IOMMU DVMA operations, common to SBus and PCI. */ #define BUS_DMA_FIND_PARENT(t, fn) \ diff --git a/sys/arch/sparc64/dev/iommureg.h b/sys/arch/sparc64/dev/iommureg.h index e5c5ec86109..53cc1de104a 100644 --- a/sys/arch/sparc64/dev/iommureg.h +++ b/sys/arch/sparc64/dev/iommureg.h @@ -1,4 +1,4 @@ -/* $OpenBSD: iommureg.h,v 1.14 2007/01/26 16:53:28 tsi Exp $ */ +/* $OpenBSD: iommureg.h,v 1.15 2007/05/29 09:53:59 sobrado Exp $ */ /* $NetBSD: iommureg.h,v 1.6 2001/07/20 00:07:13 eeh Exp $ */ /* @@ -145,7 +145,7 @@ struct iommu_strbuf { #define INTMAP_IGN_SHIFT 6 #define INTMAP_INO 0x00000003fLL /* Interrupt number */ #define INTMAP_INR (INTMAP_IGN|INTMAP_INO) -#define INTMAP_SBUSSLOT 0x000000018LL /* SBUS slot # */ +#define INTMAP_SBUSSLOT 0x000000018LL /* SBus slot # */ #define INTMAP_PCIBUS 0x000000010LL /* PCI bus number (A or B) */ #define INTMAP_PCISLOT 0x00000000cLL /* PCI slot # */ #define INTMAP_PCIINT 0x000000003LL /* PCI interrupt #A,#B,#C,#D */ diff --git a/sys/arch/sparc64/dev/iommuvar.h b/sys/arch/sparc64/dev/iommuvar.h index d64d35b8c32..40151a65ffb 100644 --- a/sys/arch/sparc64/dev/iommuvar.h +++ b/sys/arch/sparc64/dev/iommuvar.h @@ -1,4 +1,4 @@ -/* $OpenBSD: iommuvar.h,v 1.9 2003/06/11 03:16:12 henric Exp $ */ +/* $OpenBSD: iommuvar.h,v 1.10 2007/05/29 09:53:59 sobrado Exp $ */ /* $NetBSD: iommuvar.h,v 1.9 2001/10/07 20:30:41 eeh Exp $ */ /* @@ -111,7 +111,7 @@ struct iommu_state { bus_space_handle_t is_iommu; /* IOMMU registers */ }; -/* interfaces for PCI/SBUS code */ +/* interfaces for PCI/SBus code */ void iommu_init(char *, struct iommu_state *, int, u_int32_t); void iommu_reset(struct iommu_state *); paddr_t iommu_extract(struct iommu_state *, vaddr_t); diff --git a/sys/arch/sparc64/dev/sbus.c b/sys/arch/sparc64/dev/sbus.c index 33eedf40d71..8a77debba3b 100644 --- a/sys/arch/sparc64/dev/sbus.c +++ b/sys/arch/sparc64/dev/sbus.c @@ -1,4 +1,4 @@ -/* $OpenBSD: sbus.c,v 1.26 2006/06/28 20:09:15 deraadt Exp $ */ +/* $OpenBSD: sbus.c,v 1.27 2007/05/29 09:54:13 sobrado Exp $ */ /* $NetBSD: sbus.c,v 1.46 2001/10/07 20:30:41 eeh Exp $ */ /*- @@ -102,7 +102,7 @@ /* - * Sbus stuff. + * SBus stuff. */ #include <sys/param.h> @@ -147,7 +147,7 @@ int _sbus_bus_map(bus_space_tag_t, bus_space_tag_t, int, /*flags*/ bus_space_handle_t *); void *sbus_intr_establish(bus_space_tag_t, bus_space_tag_t, - int, /*Sbus interrupt level*/ + int, /*SBus interrupt level*/ int, /*`device class' priority*/ int, /*flags*/ int (*)(void *), /*handler*/ @@ -182,17 +182,17 @@ int sbus_dmamap_create(bus_dma_tag_t, bus_dma_tag_t, bus_size_t, int, bus_size_t, bus_size_t, int, bus_dmamap_t *); /* - * Child devices receive the Sbus interrupt level in their attach + * Child devices receive the SBus interrupt level in their attach * arguments. We translate these to CPU IPLs using the following * tables. Note: obio bus interrupt levels are identical to the * processor IPL. * - * The second set of tables is used when the Sbus interrupt level + * The second set of tables is used when the SBus interrupt level * cannot be had from the PROM as an `interrupt' property. We then * fall back on the `intr' property which contains the CPU IPL. */ -/* Translate Sbus interrupt level to processor IPL */ +/* Translate SBus interrupt level to processor IPL */ static int intr_sbus2ipl_4u[] = { 0, 2, 3, 5, 7, 9, 11, 13 }; @@ -200,7 +200,7 @@ static int intr_sbus2ipl_4u[] = { /* * This value is or'ed into the attach args' interrupt level cookie * if the interrupt level comes from an `intr' property, i.e. it is - * not an Sbus interrupt level. + * not an SBus interrupt level. */ #define SBUS_INTR_COMPAT 0x80000000 @@ -372,7 +372,7 @@ sbus_mb_attach(struct device *parent, struct device *self, void *aux) *(ih->ih_map) |= INTMAP_V; /* - * Note: the stupid SBUS IOMMU ignores the high bits of an address, so a + * Note: the stupid SBus IOMMU ignores the high bits of an address, so a * NULL DMA pointer will be translated by the first page of the IOTSB. * To avoid bugs we'll alloc and ignore the first entry in the IOTSB. */ @@ -392,7 +392,7 @@ sbus_mb_attach(struct device *parent, struct device *self, void *aux) } /* - * Attach an Sbus (main part). + * Attach an SBus (main part). */ void sbus_attach_common(struct sbus_softc *sc, int node, int indirect) @@ -577,7 +577,7 @@ sbus_overtemp(void *arg) } /* - * Get interrupt attributes for an Sbus device. + * Get interrupt attributes for an SBus device. */ int sbus_get_intr(struct sbus_softc *sc, int node, struct sbus_intr **ipp, int *np, @@ -588,7 +588,7 @@ sbus_get_intr(struct sbus_softc *sc, int node, struct sbus_intr **ipp, int *np, char buf[32]; /* - * The `interrupts' property contains the Sbus interrupt level. + * The `interrupts' property contains the SBus interrupt level. */ ipl = NULL; if (getprop(node, "interrupts", sizeof(int), np, (void **)&ipl) == 0) { @@ -620,7 +620,7 @@ sbus_get_intr(struct sbus_softc *sc, int node, struct sbus_intr **ipp, int *np, } /* - * Sbus card devices need the slot number encoded into + * SBus card devices need the slot number encoded into * the vector as this is generally not done. */ if ((ipl[0] & INTMAP_OBIO) == 0) @@ -647,7 +647,7 @@ sbus_get_intr(struct sbus_softc *sc, int node, struct sbus_intr **ipp, int *np, /* - * Install an interrupt handler for an Sbus device. + * Install an interrupt handler for an SBus device. */ void * sbus_intr_establish(bus_space_tag_t t, bus_space_tag_t t0, int pri, int level, @@ -684,7 +684,7 @@ sbus_intr_establish(bus_space_tag_t t, bus_space_tag_t t0, int pri, int level, ("\nsbus: intr[%ld]%lx: %lx\nHunting for IRQ...\n", (long)ipl, (long)vec, (u_long)intrlev[vec])); if ((vec & INTMAP_OBIO) == 0) { - /* We're in an SBUS slot */ + /* We're in an SBus slot */ /* Register the map and clear intr registers */ bus_space_handle_t maph; int slot = INTSLOT(pri); @@ -695,7 +695,7 @@ sbus_intr_establish(bus_space_tag_t t, bus_space_tag_t t0, int pri, int level, if (sbus_debug & SDB_INTR) { int64_t intrmap = *map; - printf("SBUS %lx IRQ as %llx in slot %d\n", + printf("SBus %lx IRQ as %llx in slot %d\n", (long)vec, (long long)intrmap, slot); printf("\tmap addr %p clr addr %p\n", map, clr); diff --git a/sys/arch/sparc64/dev/sbusreg.h b/sys/arch/sparc64/dev/sbusreg.h index 6938eba123f..e1209fb72ff 100644 --- a/sys/arch/sparc64/dev/sbusreg.h +++ b/sys/arch/sparc64/dev/sbusreg.h @@ -1,4 +1,4 @@ -/* $OpenBSD: sbusreg.h,v 1.2 2001/08/18 21:30:00 jason Exp $ */ +/* $OpenBSD: sbusreg.h,v 1.3 2007/05/29 09:54:15 sobrado Exp $ */ /* $NetBSD: sbusreg.h,v 1.7 1999/06/07 05:28:03 eeh Exp $ */ /* @@ -26,7 +26,7 @@ /* - * Sbus device addresses are obtained from the FORTH PROMs. They come + * SBus device addresses are obtained from the FORTH PROMs. They come * in `absolute' and `relative' address flavors, so we have to handle both. * Relative addresses do *not* include the slot number. */ @@ -37,19 +37,19 @@ #define SBUS_ABS_TO_OFFSET(a) (((a) - SBUS_BASE) & 0x1ffffff) /* - * Sun4u S-bus definitions. Here's where we deal w/the machine + * Sun4u SBus definitions. Here's where we deal w/the machine * dependencies of sysio. * * SYSIO implements or is the interface to several things: * - * o The SBUS interface itself + * o The SBus interface itself * o The IOMMU * o The DVMA units * o The interrupt controller * o The counter/timers * * Since it has registers to control lots of different things - * as well as several on-board SBUS devices and external SBUS + * as well as several on-board SBus devices and external SBus * slots scattered throughout its address space, it's a pain. * * One good point, however, is that all registers are 64-bit. @@ -80,14 +80,14 @@ struct sysioreg { u_int64_t pad2[990]; struct sbusreg { - u_int64_t sbus_cr; /* SBUS Control Register */ /* 1fe.0000.2000 */ + u_int64_t sbus_cr; /* SBus Control Register */ /* 1fe.0000.2000 */ u_int64_t reserved; /* 1fe.0000.2008 */ - u_int64_t sbus_afsr; /* SBUS AFSR */ /* 1fe.0000.2010 */ - u_int64_t sbus_afar; /* SBUS AFAR */ /* 1fe.0000.2018 */ - u_int64_t sbus_config0; /* SBUS Slot 0 config register */ /* 1fe.0000.2020 */ - u_int64_t sbus_config1; /* SBUS Slot 1 config register */ /* 1fe.0000.2028 */ - u_int64_t sbus_config2; /* SBUS Slot 2 config register */ /* 1fe.0000.2030 */ - u_int64_t sbus_config3; /* SBUS Slot 3 config register */ /* 1fe.0000.2038 */ + u_int64_t sbus_afsr; /* SBus AFSR */ /* 1fe.0000.2010 */ + u_int64_t sbus_afar; /* SBus AFAR */ /* 1fe.0000.2018 */ + u_int64_t sbus_config0; /* SBus Slot 0 config register */ /* 1fe.0000.2020 */ + u_int64_t sbus_config1; /* SBus Slot 1 config register */ /* 1fe.0000.2028 */ + u_int64_t sbus_config2; /* SBus Slot 2 config register */ /* 1fe.0000.2030 */ + u_int64_t sbus_config3; /* SBus Slot 3 config register */ /* 1fe.0000.2038 */ u_int64_t sbus_config13; /* Slot 13 config register <audio> */ /* 1fe.0000.2040 */ u_int64_t sbus_config14; /* Slot 14 config register <macio> */ /* 1fe.0000.2048 */ u_int64_t sbus_config15; /* Slot 15 config register <slavio> */ /* 1fe.0000.2050 */ @@ -103,10 +103,10 @@ struct sysioreg { u_int64_t pad5[125]; - u_int64_t sbus_slot0_int; /* SBUS slot 0 interrupt map reg */ /* 1fe.0000.2c00 */ - u_int64_t sbus_slot1_int; /* SBUS slot 1 interrupt map reg */ /* 1fe.0000.2c08 */ - u_int64_t sbus_slot2_int; /* SBUS slot 2 interrupt map reg */ /* 1fe.0000.2c10 */ - u_int64_t sbus_slot3_int; /* SBUS slot 3 interrupt map reg */ /* 1fe.0000.2c18 */ + u_int64_t sbus_slot0_int; /* SBus slot 0 interrupt map reg */ /* 1fe.0000.2c00 */ + u_int64_t sbus_slot1_int; /* SBus slot 1 interrupt map reg */ /* 1fe.0000.2c08 */ + u_int64_t sbus_slot2_int; /* SBus slot 2 interrupt map reg */ /* 1fe.0000.2c10 */ + u_int64_t sbus_slot3_int; /* SBus slot 3 interrupt map reg */ /* 1fe.0000.2c18 */ u_int64_t intr_retry; /* interrupt retry timer reg */ /* 1fe.0000.2c20 */ u_int64_t pad6[123]; @@ -127,7 +127,7 @@ struct sysioreg { u_int64_t timer1_int_map; /* timer 1 interrupt map reg */ /* 1fe.0000.3068 */ u_int64_t ue_int_map; /* UE interrupt map reg */ /* 1fe.0000.3070 */ u_int64_t ce_int_map; /* CE interrupt map reg */ /* 1fe.0000.3078 */ - u_int64_t sbus_async_int_map; /* SBUS error interrupt map reg */ /* 1fe.0000.3080 */ + u_int64_t sbus_async_int_map; /* SBus error interrupt map reg */ /* 1fe.0000.3080 */ u_int64_t pwrmgt_int_map; /* power mgmt wake interrupt map reg */ /* 1fe.0000.3088 */ u_int64_t upagr_int_map; /* UPA graphics interrupt map reg */ /* 1fe.0000.3090 */ u_int64_t reserved_int_map; /* reserved interrupt map reg */ /* 1fe.0000.3098 */ @@ -135,10 +135,10 @@ struct sysioreg { u_int64_t pad8[108]; /* Note: clear interrupt 0 registers are not really used */ - u_int64_t sbus0_clr_int[8]; /* SBUS slot 0 clear int regs 0..7 */ /* 1fe.0000.3400-3438 */ - u_int64_t sbus1_clr_int[8]; /* SBUS slot 1 clear int regs 0..7 */ /* 1fe.0000.3440-3478 */ - u_int64_t sbus2_clr_int[8]; /* SBUS slot 2 clear int regs 0..7 */ /* 1fe.0000.3480-34b8 */ - u_int64_t sbus3_clr_int[8]; /* SBUS slot 3 clear int regs 0..7 */ /* 1fe.0000.34c0-34f8 */ + u_int64_t sbus0_clr_int[8]; /* SBus slot 0 clear int regs 0..7 */ /* 1fe.0000.3400-3438 */ + u_int64_t sbus1_clr_int[8]; /* SBus slot 1 clear int regs 0..7 */ /* 1fe.0000.3440-3478 */ + u_int64_t sbus2_clr_int[8]; /* SBus slot 2 clear int regs 0..7 */ /* 1fe.0000.3480-34b8 */ + u_int64_t sbus3_clr_int[8]; /* SBus slot 3 clear int regs 0..7 */ /* 1fe.0000.34c0-34f8 */ u_int64_t pad9[96]; @@ -158,7 +158,7 @@ struct sysioreg { u_int64_t timer1_clr_int; /* timer 1 clear int reg */ /* 1fe.0000.3868 */ u_int64_t ue_clr_int; /* UE clear int reg */ /* 1fe.0000.3870 */ u_int64_t ce_clr_int; /* CE clear int reg */ /* 1fe.0000.3878 */ - u_int64_t sbus_clr_async_int; /* SBUS error clr interrupt reg */ /* 1fe.0000.3880 */ + u_int64_t sbus_clr_async_int; /* SBus error clr interrupt reg */ /* 1fe.0000.3880 */ u_int64_t pwrmgt_clr_int; /* power mgmt wake clr interrupt reg */ /* 1fe.0000.3888 */ u_int64_t pad11[110]; @@ -170,7 +170,7 @@ struct sysioreg { u_int64_t pad12[252]; - u_int64_t sys_svadiag; /* SBUS virtual addr diag reg */ /* 1fe.0000.4400 */ + u_int64_t sys_svadiag; /* SBus virtual addr diag reg */ /* 1fe.0000.4400 */ u_int64_t pad13[31]; @@ -180,7 +180,7 @@ struct sysioreg { u_int64_t pad14[32]; - u_int64_t sbus_int_diag; /* SBUS int state diag reg */ /* 1fe.0000.4800 */ + u_int64_t sbus_int_diag; /* SBus int state diag reg */ /* 1fe.0000.4800 */ u_int64_t obio_int_diag; /* OBIO and misc int state diag reg */ /* 1fe.0000.4808 */ u_int64_t pad15[254]; diff --git a/sys/arch/sparc64/dev/sbusvar.h b/sys/arch/sparc64/dev/sbusvar.h index 95f432842c5..03538581501 100644 --- a/sys/arch/sparc64/dev/sbusvar.h +++ b/sys/arch/sparc64/dev/sbusvar.h @@ -1,4 +1,4 @@ -/* $OpenBSD: sbusvar.h,v 1.8 2006/06/02 20:00:56 miod Exp $ */ +/* $OpenBSD: sbusvar.h,v 1.9 2007/05/29 09:54:17 sobrado Exp $ */ /* $NetBSD: sbusvar.h,v 1.7 1999/06/05 05:30:43 mrg Exp $ */ /*- @@ -93,7 +93,7 @@ * fake name ("mainbus"). */ -/* variables per Sbus */ +/* variables per SBus */ struct sbus_softc { struct device sc_dev; /* base device */ bus_space_tag_t sc_bustag; diff --git a/sys/arch/sparc64/dev/stp_sbus.c b/sys/arch/sparc64/dev/stp_sbus.c index 19bf867c76f..224834a9bc4 100644 --- a/sys/arch/sparc64/dev/stp_sbus.c +++ b/sys/arch/sparc64/dev/stp_sbus.c @@ -1,4 +1,4 @@ -/* $OpenBSD: stp_sbus.c,v 1.7 2006/06/02 20:00:56 miod Exp $ */ +/* $OpenBSD: stp_sbus.c,v 1.8 2007/05/29 09:54:19 sobrado Exp $ */ /* $NetBSD: stp4020.c,v 1.23 2002/06/01 23:51:03 lukem Exp $ */ /*- @@ -114,7 +114,7 @@ stpattach(parent, self, aux) } if (sa->sa_nintr != 2) { - printf(": expect 2 interrupt Sbus levels; got %d\n", + printf(": expect 2 interrupt SBus levels; got %d\n", sa->sa_nintr); return; } diff --git a/sys/arch/sparc64/include/autoconf.h b/sys/arch/sparc64/include/autoconf.h index 0c5d2e0e7fe..04175f4b5ca 100644 --- a/sys/arch/sparc64/include/autoconf.h +++ b/sys/arch/sparc64/include/autoconf.h @@ -1,4 +1,4 @@ -/* $OpenBSD: autoconf.h,v 1.14 2007/05/04 03:44:44 deraadt Exp $ */ +/* $OpenBSD: autoconf.h,v 1.15 2007/05/29 09:54:27 sobrado Exp $ */ /* $NetBSD: autoconf.h,v 1.10 2001/07/24 19:32:11 eeh Exp $ */ /*- @@ -92,7 +92,7 @@ struct intrmap { extern struct intrmap intrmap[]; /* The "mainbus" on ultra desktops is actually the UPA bus. We need to - * separate this from peripheral buses like SBUS and PCI because each bus may + * separate this from peripheral buses like SBus and PCI because each bus may * have different ways of encoding properties, such as "reg" and "interrupts". */ diff --git a/sys/arch/sparc64/include/bus.h b/sys/arch/sparc64/include/bus.h index adabf7fa9e5..ac7a66aaa49 100644 --- a/sys/arch/sparc64/include/bus.h +++ b/sys/arch/sparc64/include/bus.h @@ -1,4 +1,4 @@ -/* $OpenBSD: bus.h,v 1.21 2007/04/10 18:02:48 miod Exp $ */ +/* $OpenBSD: bus.h,v 1.22 2007/05/29 09:54:25 sobrado Exp $ */ /* $NetBSD: bus.h,v 1.31 2001/09/21 15:30:41 wiz Exp $ */ /*- @@ -125,7 +125,7 @@ extern int bus_space_debug; /* - * UPA and SBUS spaces are non-cached and big endian + * UPA and SBus spaces are non-cached and big endian * (except for RAM and PROM) * * PCI spaces are non-cached and little endian diff --git a/sys/arch/sparc64/sparc64/intr.c b/sys/arch/sparc64/sparc64/intr.c index 861699210bb..07b15268e87 100644 --- a/sys/arch/sparc64/sparc64/intr.c +++ b/sys/arch/sparc64/sparc64/intr.c @@ -1,4 +1,4 @@ -/* $OpenBSD: intr.c,v 1.24 2007/03/16 09:28:38 art Exp $ */ +/* $OpenBSD: intr.c,v 1.25 2007/05/29 09:53:57 sobrado Exp $ */ /* $NetBSD: intr.c,v 1.39 2001/07/19 23:38:11 eeh Exp $ */ /* @@ -119,7 +119,7 @@ strayintr(fp, vectored) } /* - * Level 1 software interrupt (could also be Sbus level 1 interrupt). + * Level 1 software interrupt (could also be SBus level 1 interrupt). * Three possible reasons: * Network software interrupt * Soft clock interrupt diff --git a/sys/arch/sparc64/sparc64/timerreg.h b/sys/arch/sparc64/sparc64/timerreg.h index f6fe7c80fd3..acaf896f104 100644 --- a/sys/arch/sparc64/sparc64/timerreg.h +++ b/sys/arch/sparc64/sparc64/timerreg.h @@ -1,4 +1,4 @@ -/* $OpenBSD: timerreg.h,v 1.4 2005/06/28 22:30:46 deraadt Exp $ */ +/* $OpenBSD: timerreg.h,v 1.5 2007/05/29 09:54:23 sobrado Exp $ */ /* $NetBSD: timerreg.h,v 1.3 1999/06/05 05:10:01 mrg Exp $ */ /* @@ -58,7 +58,7 @@ * to use offsets from the 3 addresses the ROM provides us. * - The counters are 29 bits wide with 1us accuracy. * - You can make them do funky things with the limit register - * - They have standard 64-bit SBUS control registers. + * - They have standard 64-bit SBus control registers. * * There is a problem on the Ultra5 and Ultra10. As the PCI controller * doesn't include the timer, there are no `counter-timer' nodes here |