Writing a 1 to the MEF bit of the ERRSTS0 register of the 82443LX host bridge

when it is already cleared  will trigger an NMI if the corresponding bit ini
the ERRCMD register is enabled.  So instead of unconditionally writing 1 into
some of the bits, simply read the register and write back the value that we
just read.  This will clear any status bits that were set (since they are R/WC)
and leave all other bits alone.

Tested by Karlis Mikelsons.

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