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| author | Jonathan Gray <jsg@cvs.openbsd.org> | 2024-08-17 01:55:04 +0000 |
|---|---|---|
| committer | Jonathan Gray <jsg@cvs.openbsd.org> | 2024-08-17 01:55:04 +0000 |
| commit | 3c777c4841a44b7afecb6a14b10dca420dc71919 (patch) | |
| tree | 001f0499ba7521fbfb3db73fad09f8961c4eabc1 /distrib/powerpc64 | |
| parent | 1f84e9d0e797015ff0c6d16e1f5c019cbcea63f3 (diff) | |
skip Controller Save State (CSS) and Controller Restore State (CRS)
on AMD 17h/1xh xHCI
avoids problem with resume after CRS was introduced in xhci.c rev 1.133
uhub0: device problem, disabling port 2
uhub1: device problem, disabling port 1
reported by brynet@ and reproduced on t495, ok kettenis@
Diffstat (limited to 'distrib/powerpc64')
0 files changed, 0 insertions, 0 deletions