Import LLVM 6.0.1 release including clang, lld and lldb.

"where is the kaboom?" deraadt@

2 files changed, 139 insertions, 153 deletions

diff --git a/gnu/llvm/tools/lldb/include/lldb/Utility/ArchSpec.h b/gnu/llvm/tools/lldb/include/lldb/Utility/ArchSpec.h
index e84cbbbe5ef..50f69606e3d 100644
--- a/gnu/llvm/tools/lldb/include/lldb/Utility/ArchSpec.h
+++ b/gnu/llvm/tools/lldb/include/lldb/Utility/ArchSpec.h
@@ -10,27 +10,26 @@
 #ifndef LLDB_UTILITY_ARCHSPEC_H
 #define LLDB_UTILITY_ARCHSPEC_H
 
-#include "lldb/Utility/CompletionRequest.h"
 #include "lldb/Utility/ConstString.h"
 #include "lldb/lldb-enumerations.h"
 #include "lldb/lldb-forward.h"
 #include "lldb/lldb-private-enumerations.h"
-#include "llvm/ADT/StringRef.h"
+#include "llvm/ADT/StringRef.h" // for StringRef
 #include "llvm/ADT/Triple.h"
-#include <cstddef>
-#include <cstdint>
-#include <string>
+#include <cstddef> // for size_t
+#include <cstdint> // for uint32_t
+#include <string>  // for string
 
 namespace lldb_private {
 
 //----------------------------------------------------------------------
-/// @class ArchSpec ArchSpec.h "lldb/Utility/ArchSpec.h" An architecture
-/// specification class.
+/// @class ArchSpec ArchSpec.h "lldb/Utility/ArchSpec.h"
+/// @brief An architecture specification class.
 ///
 /// A class designed to be created from a cpu type and subtype, a
-/// string representation, or an llvm::Triple.  Keeping all of the conversions
-/// of strings to architecture enumeration values confined to this class
-/// allows new architecture support to be added easily.
+/// string representation, or an llvm::Triple.  Keeping all of the
+/// conversions of strings to architecture enumeration values confined
+/// to this class allows new architecture support to be added easily.
 //----------------------------------------------------------------------
 class ArchSpec {
 public:
@@ -246,15 +245,16 @@ public:
   //------------------------------------------------------------------
   /// Default constructor.
   ///
-  /// Default constructor that initializes the object with invalid cpu type
-  /// and subtype values.
+  /// Default constructor that initializes the object with invalid
+  /// cpu type and subtype values.
   //------------------------------------------------------------------
   ArchSpec();
 
   //------------------------------------------------------------------
   /// Constructor over triple.
   ///
-  /// Constructs an ArchSpec with properties consistent with the given Triple.
+  /// Constructs an ArchSpec with properties consistent with the given
+  /// Triple.
   //------------------------------------------------------------------
   explicit ArchSpec(const llvm::Triple &triple);
   explicit ArchSpec(const char *triple_cstr);
@@ -262,8 +262,8 @@ public:
   //------------------------------------------------------------------
   /// Constructor over architecture name.
   ///
-  /// Constructs an ArchSpec with properties consistent with the given object
-  /// type and architecture name.
+  /// Constructs an ArchSpec with properties consistent with the given
+  /// object type and architecture name.
   //------------------------------------------------------------------
   explicit ArchSpec(ArchitectureType arch_type, uint32_t cpu_type,
                     uint32_t cpu_subtype);
@@ -284,18 +284,16 @@ public:
 
   //---------------------------------------------------------------------------
   /// Returns true if the OS, vendor and environment fields of the triple are
-  /// unset. The triple is expected to be normalized
-  /// (llvm::Triple::normalize).
+  /// unset. The triple is expected to be normalized (llvm::Triple::normalize).
   //---------------------------------------------------------------------------
   static bool ContainsOnlyArch(const llvm::Triple &normalized_triple);
 
-  static void ListSupportedArchNames(StringList &list);
-  static size_t AutoComplete(CompletionRequest &request);
+  static size_t AutoComplete(llvm::StringRef name, StringList &matches);
 
   //------------------------------------------------------------------
   /// Returns a static string representing the current architecture.
   ///
-  /// @return A static string corresponding to the current
+  /// @return A static string correcponding to the current
   ///         architecture.
   //------------------------------------------------------------------
   const char *GetArchitectureName() const;
@@ -308,8 +306,8 @@ public:
   bool IsMIPS() const;
 
   //------------------------------------------------------------------
-  /// Returns a string representing current architecture as a target CPU for
-  /// tools like compiler, disassembler etc.
+  /// Returns a string representing current architecture as a target CPU
+  /// for tools like compiler, disassembler etc.
   ///
   /// @return A string representing target CPU for the current
   ///         architecture.
@@ -331,7 +329,8 @@ public:
   void Clear();
 
   //------------------------------------------------------------------
-  /// Returns the size in bytes of an address of the current architecture.
+  /// Returns the size in bytes of an address of the current
+  /// architecture.
   ///
   /// @return The byte size of an address of the current architecture.
   //------------------------------------------------------------------
@@ -357,8 +356,9 @@ public:
   //------------------------------------------------------------------
   /// Set the distribution id of the architecture.
   ///
-  /// This will be something like "ubuntu", "fedora", etc. on Linux. This
-  /// should be the same value returned by HostInfo::GetDistributionId ().
+  /// This will be something like "ubuntu", "fedora", etc. on Linux.
+  /// This should be the same value returned by
+  /// HostInfo::GetDistributionId ().
   ///------------------------------------------------------------------
   void SetDistributionId(const char *distribution_id);
 
@@ -371,7 +371,6 @@ public:
   bool IsValid() const {
     return m_core >= eCore_arm_generic && m_core < kNumCores;
   }
-  explicit operator bool() const { return IsValid(); }
 
   bool TripleVendorWasSpecified() const {
     return !m_triple.getVendorName().empty();
@@ -396,12 +395,13 @@ public:
   //------------------------------------------------------------------
   /// Merges fields from another ArchSpec into this ArchSpec.
   ///
-  /// This will use the supplied ArchSpec to fill in any fields of the triple
-  /// in this ArchSpec which were unspecified.  This can be used to refine a
-  /// generic ArchSpec with a more specific one. For example, if this
-  /// ArchSpec's triple is something like i386-unknown-unknown-unknown, and we
-  /// have a triple which is x64-pc-windows-msvc, then merging that triple
-  /// into this one will result in the triple i386-pc-windows-msvc.
+  /// This will use the supplied ArchSpec to fill in any fields of
+  /// the triple in this ArchSpec which were unspecified.  This can
+  /// be used to refine a generic ArchSpec with a more specific one.
+  /// For example, if this ArchSpec's triple is something like
+  /// i386-unknown-unknown-unknown, and we have a triple which is
+  /// x64-pc-windows-msvc, then merging that triple into this one
+  /// will result in the triple i386-pc-windows-msvc.
   ///
   //------------------------------------------------------------------
   void MergeFrom(const ArchSpec &other);
@@ -421,16 +421,16 @@ public:
   ///
   /// @return True if the object, and CPU were successfully set.
   ///
-  /// As a side effect, the vendor value is usually set to unknown. The
-  /// exceptions are
+  /// As a side effect, the vendor value is usually set to unknown.
+  /// The exections are
   ///   aarch64-apple-ios
   ///   arm-apple-ios
   ///   thumb-apple-ios
   ///   x86-apple-
   ///   x86_64-apple-
   ///
-  /// As a side effect, the os value is usually set to unknown The exceptions
-  /// are
+  /// As a side effect, the os value is usually set to unknown
+  /// The exceptions are
   ///   *-*-aix
   ///   aarch64-apple-ios
   ///   arm-apple-ios
@@ -456,10 +456,10 @@ public:
   //------------------------------------------------------------------
   /// Sets this ArchSpec's byte order.
   ///
-  /// In the common case there is no need to call this method as the byte
-  /// order can almost always be determined by the architecture. However, many
-  /// CPU's are bi-endian (ARM, Alpha, PowerPC, etc) and the default/assumed
-  /// byte order may be incorrect.
+  /// In the common case there is no need to call this method as the
+  /// byte order can almost always be determined by the architecture.
+  /// However, many CPU's are bi-endian (ARM, Alpha, PowerPC, etc)
+  /// and the default/assumed byte order may be incorrect.
   //------------------------------------------------------------------
   void SetByteOrder(lldb::ByteOrder byte_order) { m_byte_order = byte_order; }
 
@@ -476,28 +476,28 @@ public:
   //------------------------------------------------------------------
   /// Architecture data byte width accessor
   ///
-  /// @return the size in 8-bit (host) bytes of a minimum addressable unit
-  /// from the Architecture's data bus
+  /// @return the size in 8-bit (host) bytes of a minimum addressable
+  /// unit from the Architecture's data bus
   //------------------------------------------------------------------
   uint32_t GetDataByteSize() const;
 
   //------------------------------------------------------------------
   /// Architecture code byte width accessor
   ///
-  /// @return the size in 8-bit (host) bytes of a minimum addressable unit
-  /// from the Architecture's code bus
+  /// @return the size in 8-bit (host) bytes of a minimum addressable
+  /// unit from the Architecture's code bus
   //------------------------------------------------------------------
   uint32_t GetCodeByteSize() const;
 
   //------------------------------------------------------------------
-  /// Architecture triple accessor.
+  /// Architecture tripple accessor.
   ///
   /// @return A triple describing this ArchSpec.
   //------------------------------------------------------------------
   llvm::Triple &GetTriple() { return m_triple; }
 
   //------------------------------------------------------------------
-  /// Architecture triple accessor.
+  /// Architecture tripple accessor.
   ///
   /// @return A triple describing this ArchSpec.
   //------------------------------------------------------------------
@@ -506,14 +506,14 @@ public:
   void DumpTriple(Stream &s) const;
 
   //------------------------------------------------------------------
-  /// Architecture triple setter.
+  /// Architecture tripple setter.
   ///
-  /// Configures this ArchSpec according to the given triple.  If the triple
-  /// has unknown components in all of the vendor, OS, and the optional
-  /// environment field (i.e. "i386-unknown-unknown") then default values are
-  /// taken from the host.  Architecture and environment components are used
-  /// to further resolve the CPU type and subtype, endian characteristics,
-  /// etc.
+  /// Configures this ArchSpec according to the given triple.  If the
+  /// triple has unknown components in all of the vendor, OS, and
+  /// the optional environment field (i.e. "i386-unknown-unknown")
+  /// then default values are taken from the host.  Architecture and
+  /// environment components are used to further resolve the CPU type
+  /// and subtype, endian characteristics, etc.
   ///
   /// @return A triple describing this ArchSpec.
   //------------------------------------------------------------------
@@ -530,8 +530,8 @@ public:
   lldb::ByteOrder GetDefaultEndian() const;
 
   //------------------------------------------------------------------
-  /// Returns true if 'char' is a signed type by default in the architecture
-  /// false otherwise
+  /// Returns true if 'char' is a signed type by defualt in the
+  /// architecture false otherwise
   ///
   /// @return True if 'char' is a signed type by default on the
   ///         architecture and false otherwise.
@@ -539,18 +539,18 @@ public:
   bool CharIsSignedByDefault() const;
 
   //------------------------------------------------------------------
-  /// Compare an ArchSpec to another ArchSpec, requiring an exact cpu type
-  /// match between them. e.g. armv7s is not an exact match with armv7 - this
-  /// would return false
+  /// Compare an ArchSpec to another ArchSpec, requiring an exact cpu
+  /// type match between them.
+  /// e.g. armv7s is not an exact match with armv7 - this would return false
   ///
   /// @return true if the two ArchSpecs match.
   //------------------------------------------------------------------
   bool IsExactMatch(const ArchSpec &rhs) const;
 
   //------------------------------------------------------------------
-  /// Compare an ArchSpec to another ArchSpec, requiring a compatible cpu type
-  /// match between them. e.g. armv7s is compatible with armv7 - this method
-  /// would return true
+  /// Compare an ArchSpec to another ArchSpec, requiring a compatible
+  /// cpu type match between them.
+  /// e.g. armv7s is compatible with armv7 - this method would return true
   ///
   /// @return true if the two ArchSpecs are compatible
   //------------------------------------------------------------------
@@ -566,12 +566,12 @@ public:
   //------------------------------------------------------------------
   /// Detect whether this architecture uses thumb code exclusively
   ///
-  /// Some embedded ARM chips (e.g. the ARM Cortex M0-7 line) can only execute
-  /// the Thumb instructions, never Arm.  We should normally pick up
-  /// arm/thumbness from their the processor status bits (cpsr/xpsr) or hints
-  /// on each function - but when doing bare-boards low level debugging
-  /// (especially common with these embedded processors), we may not have
-  /// those things easily accessible.
+  /// Some embedded ARM chips (e.g. the ARM Cortex M0-7 line) can
+  /// only execute the Thumb instructions, never Arm.  We should normally
+  /// pick up arm/thumbness from their the processor status bits (cpsr/xpsr)
+  /// or hints on each function - but when doing bare-boards low level
+  /// debugging (especially common with these embedded processors), we may
+  /// not have those things easily accessible.
   ///
   /// @return true if this is an arm ArchSpec which can only execute Thumb
   ///         instructions
@@ -592,30 +592,31 @@ protected:
   Core m_core = kCore_invalid;
   lldb::ByteOrder m_byte_order = lldb::eByteOrderInvalid;
 
-  // Additional arch flags which we cannot get from triple and core For MIPS
-  // these are application specific extensions like micromips, mips16 etc.
+  // Additional arch flags which we cannot get from triple and core
+  // For MIPS these are application specific extensions like
+  // micromips, mips16 etc.
   uint32_t m_flags = 0;
 
   ConstString m_distribution_id;
 
-  // Called when m_def or m_entry are changed.  Fills in all remaining members
-  // with default values.
+  // Called when m_def or m_entry are changed.  Fills in all remaining
+  // members with default values.
   void CoreUpdated(bool update_triple);
 };
 
 //------------------------------------------------------------------
-/// @fn bool operator< (const ArchSpec& lhs, const ArchSpec& rhs) Less than
-/// operator.
+/// @fn bool operator< (const ArchSpec& lhs, const ArchSpec& rhs)
+/// @brief Less than operator.
 ///
-/// Tests two ArchSpec objects to see if \a lhs is less than \a rhs.
+/// Tests two ArchSpec objects to see if \a lhs is less than \a
+/// rhs.
 ///
-/// @param[in] lhs The Left Hand Side ArchSpec object to compare. @param[in]
-/// rhs The Left Hand Side ArchSpec object to compare.
+/// @param[in] lhs The Left Hand Side ArchSpec object to compare.
+/// @param[in] rhs The Left Hand Side ArchSpec object to compare.
 ///
 /// @return true if \a lhs is less than \a rhs
 //------------------------------------------------------------------
 bool operator<(const ArchSpec &lhs, const ArchSpec &rhs);
-bool operator==(const ArchSpec &lhs, const ArchSpec &rhs);
 
 bool ParseMachCPUDashSubtypeTriple(llvm::StringRef triple_str, ArchSpec &arch);
 
diff --git a/gnu/llvm/tools/lldb/source/Utility/ArchSpec.cpp b/gnu/llvm/tools/lldb/source/Utility/ArchSpec.cpp
index 752fb182d79..a10fe78260b 100644
--- a/gnu/llvm/tools/lldb/source/Utility/ArchSpec.cpp
+++ b/gnu/llvm/tools/lldb/source/Utility/ArchSpec.cpp
@@ -9,17 +9,16 @@
 
 #include "lldb/Utility/ArchSpec.h"
 
-#include "lldb/Utility/Log.h"
 #include "lldb/Utility/NameMatches.h"
-#include "lldb/Utility/Stream.h"
+#include "lldb/Utility/Stream.h" // for Stream
 #include "lldb/Utility/StringList.h"
-#include "lldb/lldb-defines.h"
+#include "lldb/lldb-defines.h" // for LLDB_INVALID_C...
 #include "llvm/ADT/STLExtras.h"
-#include "llvm/ADT/Twine.h"
+#include "llvm/ADT/Twine.h" // for Twine
 #include "llvm/BinaryFormat/COFF.h"
 #include "llvm/BinaryFormat/ELF.h"
-#include "llvm/BinaryFormat/MachO.h"
-#include "llvm/Support/Compiler.h"
+#include "llvm/BinaryFormat/MachO.h" // for CPUType::CPU_T...
+#include "llvm/Support/Compiler.h"   // for LLVM_FALLTHROUGH
 #include "llvm/Support/Host.h"
 
 using namespace lldb;
@@ -224,8 +223,8 @@ static const CoreDefinition g_core_definitions[] = {
      "kalimba5"}};
 
 // Ensure that we have an entry in the g_core_definitions for each core. If you
-// comment out an entry above, you will need to comment out the corresponding
-// ArchSpec::Core enumeration.
+// comment out an entry above,
+// you will need to comment out the corresponding ArchSpec::Core enumeration.
 static_assert(sizeof(g_core_definitions) / sizeof(CoreDefinition) ==
                   ArchSpec::kNumCores,
               "make sure we have one core definition for each core");
@@ -245,24 +244,17 @@ struct ArchDefinition {
   const char *name;
 };
 
-void ArchSpec::ListSupportedArchNames(StringList &list) {
-  for (uint32_t i = 0; i < llvm::array_lengthof(g_core_definitions); ++i)
-    list.AppendString(g_core_definitions[i].name);
-}
-
-size_t ArchSpec::AutoComplete(CompletionRequest &request) {
-  if (!request.GetCursorArgumentPrefix().empty()) {
+size_t ArchSpec::AutoComplete(llvm::StringRef name, StringList &matches) {
+  if (!name.empty()) {
     for (uint32_t i = 0; i < llvm::array_lengthof(g_core_definitions); ++i) {
-      if (NameMatches(g_core_definitions[i].name, NameMatch::StartsWith,
-                      request.GetCursorArgumentPrefix()))
-        request.AddCompletion(g_core_definitions[i].name);
+      if (NameMatches(g_core_definitions[i].name, NameMatch::StartsWith, name))
+        matches.AppendString(g_core_definitions[i].name);
     }
   } else {
-    StringList matches;
-    ListSupportedArchNames(matches);
-    request.AddCompletions(matches);
+    for (uint32_t i = 0; i < llvm::array_lengthof(g_core_definitions); ++i)
+      matches.AppendString(g_core_definitions[i].name);
   }
-  return request.GetNumberOfMatches();
+  return matches.GetSize();
 }
 
 #define CPU_ANY (UINT32_MAX)
@@ -610,8 +602,10 @@ const char *ArchSpec::GetArchitectureName() const {
 
 bool ArchSpec::IsMIPS() const {
   const llvm::Triple::ArchType machine = GetMachine();
-  return machine == llvm::Triple::mips || machine == llvm::Triple::mipsel ||
-         machine == llvm::Triple::mips64 || machine == llvm::Triple::mips64el;
+  if (machine == llvm::Triple::mips || machine == llvm::Triple::mipsel ||
+      machine == llvm::Triple::mips64 || machine == llvm::Triple::mips64el)
+    return true;
+  return false;
 }
 
 std::string ArchSpec::GetTargetABI() const {
@@ -813,7 +807,6 @@ bool ArchSpec::CharIsSignedByDefault() const {
   case llvm::Triple::ppc64le:
   case llvm::Triple::systemz:
   case llvm::Triple::xcore:
-  case llvm::Triple::arc:
     return false;
   }
 }
@@ -897,12 +890,7 @@ void ArchSpec::MergeFrom(const ArchSpec &other) {
     GetTriple().setOS(other.GetTriple().getOS());
   if (GetTriple().getArch() == llvm::Triple::UnknownArch) {
     GetTriple().setArch(other.GetTriple().getArch());
-
-    // MachO unknown64 isn't really invalid as the debugger can still obtain
-    // information from the binary, e.g. line tables. As such, we don't update
-    // the core here.
-    if (other.GetCore() != eCore_uknownMach64)
-      UpdateCore();
+    UpdateCore();
   }
   if (GetTriple().getEnvironment() == llvm::Triple::UnknownEnvironment &&
       !TripleVendorWasSpecified()) {
@@ -910,8 +898,9 @@ void ArchSpec::MergeFrom(const ArchSpec &other) {
       GetTriple().setEnvironment(other.GetTriple().getEnvironment());
   }
   // If this and other are both arm ArchSpecs and this ArchSpec is a generic
-  // "some kind of arm" spec but the other ArchSpec is a specific arm core,
-  // adopt the specific arm core.
+  // "some kind of arm"
+  // spec but the other ArchSpec is a specific arm core, adopt the specific arm
+  // core.
   if (GetTriple().getArch() == llvm::Triple::arm &&
       other.GetTriple().getArch() == llvm::Triple::arm &&
       IsCompatibleMatch(other) && GetCore() == ArchSpec::eCore_arm_generic &&
@@ -937,21 +926,24 @@ bool ArchSpec::SetArchitecture(ArchitectureType arch_type, uint32_t cpu,
       if (core_def) {
         m_core = core_def->core;
         update_triple = false;
-        // Always use the architecture name because it might be more
-        // descriptive than the architecture enum ("armv7" ->
-        // llvm::Triple::arm).
+        // Always use the architecture name because it might be more descriptive
+        // than the architecture enum ("armv7" -> llvm::Triple::arm).
         m_triple.setArchName(llvm::StringRef(core_def->name));
         if (arch_type == eArchTypeMachO) {
           m_triple.setVendor(llvm::Triple::Apple);
 
           // Don't set the OS.  It could be simulator, macosx, ios, watchos,
-          // tvos, bridgeos.  We could get close with the cpu type - but we 
-          // can't get it right all of the time.  Better to leave this unset 
-          // so other sections of code will set it when they have more 
-          // information. NB: don't call m_triple.setOS (llvm::Triple::UnknownOS).  
-          // That sets the OSName to "unknown" and the 
-          // ArchSpec::TripleVendorWasSpecified() method says that any OSName 
-          // setting means it was specified.
+          // tvos.  We could
+          // get close with the cpu type - but we can't get it right all of the
+          // time.  Better
+          // to leave this unset so other sections of code will set it when they
+          // have more
+          // information.
+          // NB: don't call m_triple.setOS (llvm::Triple::UnknownOS).  That sets
+          // the OSName to
+          // "unknown" and the ArchSpec::TripleVendorWasSpecified() method says
+          // that any
+          // OSName setting means it was specified.
         } else if (arch_type == eArchTypeELF) {
           switch (os) {
           case llvm::ELF::ELFOSABI_AIX:
@@ -980,15 +972,10 @@ bool ArchSpec::SetArchitecture(ArchitectureType arch_type, uint32_t cpu,
           m_triple.setVendor(llvm::Triple::UnknownVendor);
           m_triple.setOS(llvm::Triple::UnknownOS);
         }
-        // Fall back onto setting the machine type if the arch by name
-        // failed...
+        // Fall back onto setting the machine type if the arch by name failed...
         if (m_triple.getArch() == llvm::Triple::UnknownArch)
           m_triple.setArch(core_def->machine);
       }
-    } else {
-      Log *log(lldb_private::GetLogIfAnyCategoriesSet(LIBLLDB_LOG_TARGET | LIBLLDB_LOG_PROCESS | LIBLLDB_LOG_PLATFORM));
-      if (log)
-        log->Printf("Unable to find a core definition for cpu 0x%" PRIx32 " sub %" PRId32, cpu, sub);
     }
   }
   CoreUpdated(update_triple);
@@ -1017,7 +1004,7 @@ bool ArchSpec::IsCompatibleMatch(const ArchSpec &rhs) const {
   return IsEqualTo(rhs, false);
 }
 
-static bool IsCompatibleEnvironment(llvm::Triple::EnvironmentType lhs,
+static bool isCompatibleEnvironment(llvm::Triple::EnvironmentType lhs,
                                     llvm::Triple::EnvironmentType rhs) {
   if (lhs == rhs)
     return true;
@@ -1028,9 +1015,10 @@ static bool IsCompatibleEnvironment(llvm::Triple::EnvironmentType lhs,
     return true;
 
   // If one of the environment is Android and the other one is EABI then they
-  // are considered to be compatible. This is required as a workaround for
-  // shared libraries compiled for Android without the NOTE section indicating
-  // that they are using the Android ABI.
+  // are considered to
+  // be compatible. This is required as a workaround for shared libraries
+  // compiled for Android
+  // without the NOTE section indicating that they are using the Android ABI.
   if ((lhs == llvm::Triple::Android && rhs == llvm::Triple::EABI) ||
       (rhs == llvm::Triple::Android && lhs == llvm::Triple::EABI) ||
       (lhs == llvm::Triple::GNUEABI && rhs == llvm::Triple::EABI) ||
@@ -1062,8 +1050,8 @@ bool ArchSpec::IsEqualTo(const ArchSpec &rhs, bool exact_match) const {
     if (lhs_triple_vendor != rhs_triple_vendor) {
       const bool rhs_vendor_specified = rhs.TripleVendorWasSpecified();
       const bool lhs_vendor_specified = TripleVendorWasSpecified();
-      // Both architectures had the vendor specified, so if they aren't equal
-      // then we return false
+      // Both architectures had the vendor specified, so if they aren't
+      // equal then we return false
       if (rhs_vendor_specified && lhs_vendor_specified)
         return false;
 
@@ -1078,8 +1066,8 @@ bool ArchSpec::IsEqualTo(const ArchSpec &rhs, bool exact_match) const {
     if (lhs_triple_os != rhs_triple_os) {
       const bool rhs_os_specified = rhs.TripleOSWasSpecified();
       const bool lhs_os_specified = TripleOSWasSpecified();
-      // Both architectures had the OS specified, so if they aren't equal then
-      // we return false
+      // Both architectures had the OS specified, so if they aren't
+      // equal then we return false
       if (rhs_os_specified && lhs_os_specified)
         return false;
 
@@ -1094,7 +1082,9 @@ bool ArchSpec::IsEqualTo(const ArchSpec &rhs, bool exact_match) const {
     const llvm::Triple::EnvironmentType rhs_triple_env =
         rhs_triple.getEnvironment();
 
-    return IsCompatibleEnvironment(lhs_triple_env, rhs_triple_env);
+    if (!isCompatibleEnvironment(lhs_triple_env, rhs_triple_env))
+      return false;
+    return true;
   }
   return false;
 }
@@ -1104,9 +1094,9 @@ void ArchSpec::UpdateCore() {
   const CoreDefinition *core_def = FindCoreDefinition(arch_name);
   if (core_def) {
     m_core = core_def->core;
-    // Set the byte order to the default byte order for an architecture. This
-    // can be modified if needed for cases when cores handle both big and
-    // little endian
+    // Set the byte order to the default byte order for an architecture.
+    // This can be modified if needed for cases when cores handle both
+    // big and little endian
     m_byte_order = core_def->default_byte_order;
   } else {
     Clear();
@@ -1203,8 +1193,9 @@ static bool cores_match(const ArchSpec::Core core1, const ArchSpec::Core core2,
     break;
 
   // v. https://en.wikipedia.org/wiki/ARM_Cortex-M#Silicon_customization
-  // Cortex-M0 - ARMv6-M - armv6m Cortex-M3 - ARMv7-M - armv7m Cortex-M4 -
-  // ARMv7E-M - armv7em
+  // Cortex-M0 - ARMv6-M - armv6m
+  // Cortex-M3 - ARMv7-M - armv7m
+  // Cortex-M4 - ARMv7E-M - armv7em
   case ArchSpec::eCore_arm_armv7em:
     if (!enforce_exact_match) {
       if (core2 == ArchSpec::eCore_arm_generic)
@@ -1220,8 +1211,9 @@ static bool cores_match(const ArchSpec::Core core1, const ArchSpec::Core core2,
     break;
 
   // v. https://en.wikipedia.org/wiki/ARM_Cortex-M#Silicon_customization
-  // Cortex-M0 - ARMv6-M - armv6m Cortex-M3 - ARMv7-M - armv7m Cortex-M4 -
-  // ARMv7E-M - armv7em
+  // Cortex-M0 - ARMv6-M - armv6m
+  // Cortex-M3 - ARMv7-M - armv7m
+  // Cortex-M4 - ARMv7E-M - armv7em
   case ArchSpec::eCore_arm_armv7m:
     if (!enforce_exact_match) {
       if (core2 == ArchSpec::eCore_arm_generic)
@@ -1419,11 +1411,6 @@ bool lldb_private::operator<(const ArchSpec &lhs, const ArchSpec &rhs) {
   return lhs_core < rhs_core;
 }
 
-
-bool lldb_private::operator==(const ArchSpec &lhs, const ArchSpec &rhs) {
-  return lhs.GetCore() == rhs.GetCore();
-}
-
 bool ArchSpec::IsFullySpecifiedTriple() const {
   const auto &user_specified_triple = GetTriple();
 
@@ -1469,15 +1456,13 @@ bool ArchSpec::IsAlwaysThumbInstructions() const {
     // Cortex-M0 through Cortex-M7 are ARM processor cores which can only
     // execute thumb instructions.  We map the cores to arch names like this:
     //
-    // Cortex-M0, Cortex-M0+, Cortex-M1:  armv6m Cortex-M3: armv7m Cortex-M4,
-    // Cortex-M7: armv7em
+    // Cortex-M0, Cortex-M0+, Cortex-M1:  armv6m
+    // Cortex-M3: armv7m
+    // Cortex-M4, Cortex-M7: armv7em
 
     if (GetCore() == ArchSpec::Core::eCore_arm_armv7m ||
         GetCore() == ArchSpec::Core::eCore_arm_armv7em ||
-        GetCore() == ArchSpec::Core::eCore_arm_armv6m ||
-        GetCore() == ArchSpec::Core::eCore_thumbv7m ||
-        GetCore() == ArchSpec::Core::eCore_thumbv7em ||
-        GetCore() == ArchSpec::Core::eCore_thumbv6m) {
+        GetCore() == ArchSpec::Core::eCore_arm_armv6m) {
       return true;
     }
   }