Import of binutils-2.8.1 from Cygnus/FSF

8 files changed, 1295 insertions, 78 deletions

diff --git a/gnu/usr.bin/binutils/include/callback.h b/gnu/usr.bin/binutils/include/callback.h
new file mode 100644
index 00000000000..b2a7fe247d9
--- /dev/null
+++ b/gnu/usr.bin/binutils/include/callback.h
@@ -0,0 +1,99 @@
+/* Remote target system call callback support.
+   Copyright 1997 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
+
+#ifndef CALLBACK_H
+#define CALLBACK_H
+
+#ifndef va_start
+#include <ansidecl.h>
+#ifdef ANSI_PROTOTYPES
+#include <stdarg.h>
+#else
+#include <varargs.h>
+#endif
+#endif
+
+typedef struct host_callback_struct host_callback;
+
+#define MAX_CALLBACK_FDS 10
+
+struct host_callback_struct 
+{
+  int (*close) PARAMS ((host_callback *,int));
+  int (*get_errno) PARAMS ((host_callback *));
+  int (*isatty) PARAMS ((host_callback *, int));
+  int (*lseek) PARAMS ((host_callback *, int, long , int));
+  int (*open) PARAMS ((host_callback *, const char*, int mode));
+  int (*read) PARAMS ((host_callback *,int,  char *, int));
+  int (*read_stdin) PARAMS (( host_callback *, char *, int));
+  int (*rename) PARAMS ((host_callback *, const char *, const char *));
+  int (*system) PARAMS ((host_callback *, const char *));
+  long (*time) PARAMS ((host_callback *, long *));
+  int (*unlink) PARAMS ((host_callback *, const char *));
+  int (*write) PARAMS ((host_callback *,int, const char *, int));
+  int (*write_stdout) PARAMS ((host_callback *, const char *, int));
+  void (*flush_stdout) PARAMS ((host_callback *));
+  int (*write_stderr) PARAMS ((host_callback *, const char *, int));
+  void (*flush_stderr) PARAMS ((host_callback *));
+
+  /* Used when the target has gone away, so we can close open
+     handles and free memory etc etc.  */
+  int (*shutdown) PARAMS ((host_callback *));
+  int (*init)     PARAMS ((host_callback *));
+
+  /* depreciated, use vprintf_filtered - Talk to the user on a console.  */
+  void (*printf_filtered) PARAMS ((host_callback *, const char *, ...));
+
+  /* Talk to the user on a console.
+     The `void *' is actually `va_list *'.  */
+  void (*vprintf_filtered) PARAMS ((host_callback *, const char *, va_list));
+
+  /* Same as vprintf_filtered but to stderr.  */
+  void (*evprintf_filtered) PARAMS ((host_callback *, const char *, va_list));
+
+  /* Print an error message and "exit".
+     In the case of gdb "exiting" means doing a longjmp back to the main
+     command loop.  */
+  void (*error) PARAMS ((host_callback *, const char *, ...));
+
+  int last_errno;		/* host format */
+
+  int fdmap[MAX_CALLBACK_FDS];
+  char fdopen[MAX_CALLBACK_FDS];
+  char alwaysopen[MAX_CALLBACK_FDS];
+};
+
+extern host_callback default_callback;
+
+/* Mapping of host/target values.  */
+/* ??? For debugging purposes, one might want to add a string of the
+   name of the symbol.  */
+
+typedef struct {
+  int host_val;
+  int target_val;
+} target_defs_map;
+
+extern target_defs_map errno_map[];
+extern target_defs_map open_map[];
+
+extern int host_to_target_errno PARAMS ((int));
+extern int target_to_host_open PARAMS ((int));
+
+#endif
diff --git a/gnu/usr.bin/binutils/include/elf/alpha.h b/gnu/usr.bin/binutils/include/elf/alpha.h
index 04ce3691412..8e12dd9aa32 100644
--- a/gnu/usr.bin/binutils/include/elf/alpha.h
+++ b/gnu/usr.bin/binutils/include/elf/alpha.h
@@ -64,10 +64,14 @@ typedef struct
 #define R_ALPHA_SREL16		9	/* PC relative 16 bit */
 #define R_ALPHA_SREL32		10	/* PC relative 32 bit */
 #define R_ALPHA_SREL64		11	/* PC relative 64 bit */
+
+/* Inherited these from ECOFF, but they are not particularly useful
+   and are depreciated.  And not implemented in the BFD, btw.  */
 #define R_ALPHA_OP_PUSH		12	/* OP stack push */
 #define R_ALPHA_OP_STORE	13	/* OP stack pop and store */
 #define R_ALPHA_OP_PSUB		14	/* OP stack subtract */
 #define R_ALPHA_OP_PRSHIFT	15	/* OP stack right shift */
+
 #define R_ALPHA_GPVALUE		16
 #define R_ALPHA_GPRELHIGH	17
 #define R_ALPHA_GPRELLOW	18
@@ -76,6 +80,8 @@ typedef struct
 #define R_ALPHA_IMMED_SCN_HI32	21
 #define R_ALPHA_IMMED_BR_HI32	22
 #define R_ALPHA_IMMED_LO32	23
+
+/* These relocations are specific to shared libraries.  */
 #define R_ALPHA_COPY		24	/* Copy symbol at runtime */
 #define R_ALPHA_GLOB_DAT	25	/* Create GOT entry */
 #define R_ALPHA_JMP_SLOT	26	/* Create PLT entry */
diff --git a/gnu/usr.bin/binutils/include/elf/dwarf2.h b/gnu/usr.bin/binutils/include/elf/dwarf2.h
index 085ab797575..f2b2510f152 100644
--- a/gnu/usr.bin/binutils/include/elf/dwarf2.h
+++ b/gnu/usr.bin/binutils/include/elf/dwarf2.h
@@ -201,6 +201,10 @@ enum dwarf_attribute
     DW_AT_MIPS_loop_unroll_factor = 0x2005,
     DW_AT_MIPS_software_pipeline_depth = 0x2006,
     DW_AT_MIPS_linkage_name = 0x2007,
+    DW_AT_MIPS_stride = 0x2008,
+    DW_AT_MIPS_abstract_name = 0x2009,
+    DW_AT_MIPS_clone_origin = 0x200a,
+    DW_AT_MIPS_has_inlines = 0x200b,
     /* GNU extensions.  */
     DW_AT_sf_names = 0x2101,
     DW_AT_src_info = 0x2102,
@@ -507,82 +511,6 @@ enum dwarf_call_frame_info
 #define DW_CFA_low_user   0x1c
 #define DW_CFA_high_user  0x3f
 
-/* SGI/MIPS call frame register usage information */
-enum dwarf_call_reg_usage
-  {
-    DW_FRAME_CFA_COL = 0,
-    DW_FRAME_REG1 = 1,
-    DW_FRAME_REG2 = 2,
-    DW_FRAME_REG3 = 3,
-    DW_FRAME_REG4 = 4,
-    DW_FRAME_REG5 = 5,
-    DW_FRAME_REG6 = 6,
-    DW_FRAME_REG7 = 7,
-    DW_FRAME_REG8 = 8,
-    DW_FRAME_REG9 = 9,
-    DW_FRAME_REG10 = 10,
-    DW_FRAME_REG11 = 11,
-    DW_FRAME_REG12 = 12,
-    DW_FRAME_REG13 = 13,
-    DW_FRAME_REG14 = 14,
-    DW_FRAME_REG15 = 15,
-    DW_FRAME_REG16 = 16,
-    DW_FRAME_REG17 = 17,
-    DW_FRAME_REG18 = 18,
-    DW_FRAME_REG19 = 19,
-    DW_FRAME_REG20 = 20,
-    DW_FRAME_REG21 = 21,
-    DW_FRAME_REG22 = 22,
-    DW_FRAME_REG23 = 23,
-    DW_FRAME_REG24 = 24,
-    DW_FRAME_REG25 = 25,
-    DW_FRAME_REG26 = 26,
-    DW_FRAME_REG27 = 27,
-    DW_FRAME_REG28 = 28,
-    DW_FRAME_REG29 = 29,
-    DW_FRAME_REG30 = 30,
-    DW_FRAME_REG31 = 31,
-    DW_FRAME_FREG0 = 32,
-    DW_FRAME_FREG1 = 33,
-    DW_FRAME_FREG2 = 34,
-    DW_FRAME_FREG3 = 35,
-    DW_FRAME_FREG4 = 36,
-    DW_FRAME_FREG5 = 37,
-    DW_FRAME_FREG6 = 38,
-    DW_FRAME_FREG7 = 39,
-    DW_FRAME_FREG8 = 40,
-    DW_FRAME_FREG9 = 41,
-    DW_FRAME_FREG10 = 42,
-    DW_FRAME_FREG11 = 43,
-    DW_FRAME_FREG12 = 44,
-    DW_FRAME_FREG13 = 45,
-    DW_FRAME_FREG14 = 46,
-    DW_FRAME_FREG15 = 47,
-    DW_FRAME_FREG16 = 48,
-    DW_FRAME_FREG17 = 49,
-    DW_FRAME_FREG18 = 50,
-    DW_FRAME_FREG19 = 51,
-    DW_FRAME_FREG20 = 52,
-    DW_FRAME_FREG21 = 53,
-    DW_FRAME_FREG22 = 54,
-    DW_FRAME_FREG23 = 55,
-    DW_FRAME_FREG24 = 56,
-    DW_FRAME_FREG25 = 57,
-    DW_FRAME_FREG26 = 58,
-    DW_FRAME_FREG27 = 59,
-    DW_FRAME_FREG28 = 60,
-    DW_FRAME_FREG29 = 61,
-    DW_FRAME_FREG30 = 62,
-    DW_FRAME_FREG31 = 63,
-    DW_FRAME_RA_COL = 64,
-    DW_FRAME_STATIC_LINK = 65
-  };
-
-/* This is the number of columns in the Frame Table. */
-#define DW_FRAME_LAST_REG_NUM   66
-
-
-
 #define DW_CHILDREN_no		     0x00
 #define DW_CHILDREN_yes		     0x01
 
@@ -609,7 +537,7 @@ enum dwarf_source_language
 #define DW_LANG_lo_user 0x8000	/* implementation-defined range start */
 #define DW_LANG_hi_user 0xffff	/* implementation-defined range start */
 
-/* Names and codes for GNU "macinfo" extension.  */
+/* Names and codes for macro information.  */
 
 enum dwarf_macinfo_record_type
   {
@@ -617,7 +545,7 @@ enum dwarf_macinfo_record_type
     DW_MACINFO_undef = 2,
     DW_MACINFO_start_file = 3,
     DW_MACINFO_end_file = 4,
-    DW_MACINFO_vend_ext = 255
+    DW_MACINFO_vendor_ext = 255
   };
 
 #endif /* _ELF_DWARF2_H */
diff --git a/gnu/usr.bin/binutils/include/elf/m32r.h b/gnu/usr.bin/binutils/include/elf/m32r.h
new file mode 100644
index 00000000000..92d9d75c68f
--- /dev/null
+++ b/gnu/usr.bin/binutils/include/elf/m32r.h
@@ -0,0 +1,54 @@
+/* M32R ELF support for BFD.
+   Copyright (C) 1996, 1997 Free Software Foundation, Inc.
+
+This file is part of BFD, the Binary File Descriptor library.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software Foundation, Inc.,
+59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
+
+#ifndef _ELF_M32R_H
+#define _ELF_M32R_H
+
+enum reloc_type
+{
+  R_M32R_NONE = 0,
+  R_M32R_16,
+  R_M32R_32,
+  R_M32R_24,
+  R_M32R_10_PCREL,
+  R_M32R_18_PCREL,
+  R_M32R_26_PCREL,
+  R_M32R_HI16_ULO,
+  R_M32R_HI16_SLO,
+  R_M32R_LO16,
+  R_M32R_SDA16,
+  R_M32R_max
+};
+
+/* Processor specific section indices.  These sections do not actually
+   exist.  Symbols with a st_shndx field corresponding to one of these
+   values have a special meaning.  */
+
+/* Small common symbol.  */
+#define SHN_M32R_SCOMMON	0xff00
+
+/* Processor specific section flags.  */
+
+/* This section contains sufficient relocs to be relaxed.
+   When relaxing, even relocs of branch instructions the assembler could
+   complete must be present because relaxing may cause the branch target to
+   move.  */
+#define SHF_M32R_CAN_RELAX	0x10000000
+
+#endif
diff --git a/gnu/usr.bin/binutils/include/objalloc.h b/gnu/usr.bin/binutils/include/objalloc.h
new file mode 100644
index 00000000000..24f87f8749d
--- /dev/null
+++ b/gnu/usr.bin/binutils/include/objalloc.h
@@ -0,0 +1,115 @@
+/* objalloc.h -- routines to allocate memory for objects
+   Copyright 1997 Free Software Foundation, Inc.
+   Written by Ian Lance Taylor, Cygnus Solutions.
+
+This program is free software; you can redistribute it and/or modify it
+under the terms of the GNU General Public License as published by the
+Free Software Foundation; either version 2, or (at your option) any
+later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.  */
+
+#ifndef OBJALLOC_H
+#define OBJALLOC_H
+
+#include "ansidecl.h"
+
+/* These routines allocate space for an object.  The assumption is
+   that the object will want to allocate space as it goes along, but
+   will never want to free any particular block.  There is a function
+   to free a block, which also frees all more recently allocated
+   blocks.  There is also a function to free all the allocated space.
+
+   This is essentially a specialization of obstacks.  The main
+   difference is that a block may not be allocated a bit at a time.
+   Another difference is that these routines are always built on top
+   of malloc, and always pass an malloc failure back to the caller,
+   unlike more recent versions of obstacks.  */
+
+/* This is what an objalloc structure looks like.  Callers should not
+   refer to these fields, nor should they allocate these structure
+   themselves.  Instead, they should only create them via
+   objalloc_init, and only access them via the functions and macros
+   listed below.  The structure is only defined here so that we can
+   access it via macros.  */
+
+struct objalloc
+{
+  char *current_ptr;
+  unsigned int current_space;
+  PTR chunks;
+};
+
+/* Work out the required alignment.  */
+
+struct objalloc_align { char x; double d; };
+
+#if defined (__STDC__) && __STDC__
+#ifndef offsetof
+#include <stddef.h>
+#endif
+#define OBJALLOC_ALIGN \
+  ((ptrdiff_t) ((char *) &((struct objalloc_align *) 0)->d - (char *) 0))
+#else
+#define OBJALLOC_ALIGN \
+  ((long) ((char *) &((struct objalloc_align *) 0)->d - (char *) 0))
+#endif
+
+/* Create an objalloc structure.  Returns NULL if malloc fails.  */
+
+extern struct objalloc *objalloc_create PARAMS ((void));
+
+/* Allocate space from an objalloc structure.  Returns NULL if malloc
+   fails.  */
+
+extern PTR _objalloc_alloc PARAMS ((struct objalloc *, unsigned long));
+
+/* The macro version of objalloc_alloc.  We only define this if using
+   gcc, because otherwise we would have to evaluate the arguments
+   multiple times, or use a temporary field as obstack.h does.  */
+
+#if defined (__GNUC__) && defined (__STDC__) && __STDC__
+
+/* NextStep 2.0 cc is really gcc 1.93 but it defines __GNUC__ = 2 and
+   does not implement __extension__.  But that compiler doesn't define
+   __GNUC_MINOR__.  */
+#if __GNUC__ < 2 || (__NeXT__ && !__GNUC_MINOR__)
+#define __extension__
+#endif
+
+#define objalloc_alloc(o, l)						\
+  __extension__								\
+  ({ struct objalloc *__o = (o);					\
+     unsigned long __len = (l);						\
+     if (__len == 0)							\
+       __len = 1;							\
+     __len = (__len + OBJALLOC_ALIGN - 1) &~ (OBJALLOC_ALIGN - 1);	\
+     (__len <= __o->current_space					\
+      ? (__o->current_ptr += __len,					\
+	 __o->current_space -= __len,					\
+	 (PTR) (__o->current_ptr - __len))				\
+      : _objalloc_alloc (__o, __len)); })
+
+#else /* ! __GNUC__ */
+
+#define objalloc_alloc(o, l) _objalloc_alloc ((o), (l))
+
+#endif /* ! __GNUC__ */
+
+/* Free an entire objalloc structure.  */
+
+extern void objalloc_free PARAMS ((struct objalloc *));
+
+/* Free a block allocated by objalloc_alloc.  This also frees all more
+   recently allocated blocks.  */
+
+extern void objalloc_free_block PARAMS ((struct objalloc *, PTR));
+
+#endif /* OBJALLOC_H */
diff --git a/gnu/usr.bin/binutils/include/opcode/cgen.h b/gnu/usr.bin/binutils/include/opcode/cgen.h
new file mode 100644
index 00000000000..cda3373fd33
--- /dev/null
+++ b/gnu/usr.bin/binutils/include/opcode/cgen.h
@@ -0,0 +1,686 @@
+/* Header file for targets using CGEN: Cpu tools GENerator.
+
+Copyright (C) 1996, 1997 Free Software Foundation, Inc.
+
+This file is part of GDB, the GNU debugger, and the GNU Binutils.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
+
+#ifndef CGEN_H
+#define CGEN_H
+
+#ifndef CGEN_CAT3
+#if defined(__STDC__) || defined(ALMOST_STDC)
+#define CGEN_XCAT3(a,b,c) a ## b ## c
+#define CGEN_CAT3(a,b,c) CGEN_XCAT3 (a, b, c)
+#else
+#define CGEN_CAT3(a,b,c) a/**/b/**/c
+#endif
+#endif
+
+/* Prepend the cpu name, defined in cpu-opc.h, and _cgen_ to symbol S.
+   The lack of spaces in the arg list is important for non-stdc systems.
+   This file is included by <cpu>-opc.h.
+   It can be included independently of cpu-opc.h, in which case the cpu
+   dependent portions will be declared as "unknown_cgen_foo".  */
+
+#ifndef CGEN_SYM
+#define CGEN_SYM(s) CGEN_CAT3 (unknown,_cgen_,s)
+#endif
+
+/* This file contains the static (unchanging) pieces and as much other stuff
+   as we can reasonably put here.  It's generally cleaner to put stuff here
+   rather than having it machine generated if possible.  */
+
+/* The assembler syntax is made up of expressions (duh...).
+   At the lowest level the values are mnemonics, register names, numbers, etc.
+   Above that are subexpressions, if any (an example might be the
+   "effective address" in m68k cpus).  At the second highest level are the
+   insns themselves.  Above that are pseudo-insns, synthetic insns, and macros,
+   if any.
+*/
+
+/* Lots of cpu's have a fixed insn size, or one which rarely changes,
+   and it's generally easier to handle these by treating the insn as an
+   integer type, rather than an array of characters.  So we allow targets
+   to control this.  */
+
+#ifdef CGEN_INT_INSN
+typedef unsigned int cgen_insn_t;
+#else
+typedef char *cgen_insn_t;
+#endif
+
+#ifdef __GNUC__
+#define CGEN_INLINE inline
+#else
+#define CGEN_INLINE
+#endif
+
+/* Perhaps we should just use bfd.h, but it's not clear
+   one would want to require that yet.  */
+enum cgen_endian {
+  CGEN_ENDIAN_UNKNOWN,
+  CGEN_ENDIAN_LITTLE,
+  CGEN_ENDIAN_BIG
+};
+
+/* Attributes.
+   Attributes are used to describe various random things.  */
+
+/* Struct to record attribute information.  */
+typedef struct {
+  unsigned int num_nonbools;
+  unsigned int bool;
+  unsigned int nonbool[1];
+} CGEN_ATTR;
+
+/* Define a structure member for attributes with N non-boolean entries.
+   The attributes are sorted so that the non-boolean ones come first.
+   num_nonbools: count of nonboolean attributes
+   bool: values of boolean attributes
+   nonbool: values of non-boolean attributes
+   There is a maximum of 32 attributes total.  */
+#define CGEN_ATTR_TYPE(n) \
+const struct { unsigned int num_nonbools; \
+	       unsigned int bool; \
+	       unsigned int nonbool[(n) ? (n) : 1]; }
+
+/* Given an attribute number, return its mask.  */
+#define CGEN_ATTR_MASK(attr) (1 << (attr))
+
+/* Return value of attribute ATTR in ATTR_TABLE for OBJ.
+   OBJ is a pointer to the entity that has the attributes.
+   It's not used at present but is reserved for future purposes.  */
+#define CGEN_ATTR_VALUE(obj, attr_table, attr) \
+((unsigned int) (attr) < (attr_table)->num_nonbools \
+ ? ((attr_table)->nonbool[attr]) \
+ : (((attr_table)->bool & (1 << (attr))) != 0))
+
+/* Parse result (also extraction result).
+
+   The result of parsing an insn is stored here.
+   To generate the actual insn, this is passed to the insert handler.
+   When printing an insn, the result of extraction is stored here.
+   To print the insn, this is passed to the print handler.
+
+   It is machine generated so we don't define it here,
+   but we do need a forward decl for the handler fns.
+
+   There is one member for each possible field in the insn.
+   The type depends on the field.
+   Also recorded here is the computed length of the insn for architectures
+   where it varies.
+*/
+
+struct cgen_fields;
+
+/* Total length of the insn, as recorded in the `fields' struct.  */
+/* ??? The field insert handler has lots of opportunities for optimization
+   if it ever gets inlined.  On architectures where insns all have the same
+   size, may wish to detect that and make this macro a constant - to allow
+   further optimizations.  */
+#define CGEN_FIELDS_BITSIZE(fields) ((fields)->length)
+
+/* Associated with each insn or expression is a set of "handlers" for
+   performing operations like parsing, printing, etc.  */
+
+/* Forward decl.  */
+typedef struct cgen_insn CGEN_INSN;
+
+/* Parse handler.
+   The first argument is a pointer to a struct describing the insn being
+   parsed.
+   The second argument is a pointer to a pointer to the text being parsed.
+   The third argument is a pointer to a cgen_fields struct
+   in which the results are placed.
+   If the expression is successfully parsed, the pointer to the text is
+   updated.  If not it is left alone.
+   The result is NULL if success or an error message.  */
+typedef const char * (cgen_parse_fn) PARAMS ((const struct cgen_insn *,
+					      const char **,
+					      struct cgen_fields *));
+
+/* Print handler.
+   The first argument is a pointer to the disassembly info.
+   Eg: disassemble_info.  It's defined as `PTR' so this file can be included
+   without dis-asm.h.
+   The second argument is a pointer to a struct describing the insn being
+   printed.
+   The third argument is a pointer to a cgen_fields struct.
+   The fourth argument is the pc value of the insn.
+   The fifth argument is the length of the insn, in bytes.  */
+/* Don't require bfd.h unnecessarily.  */
+#ifdef BFD_VERSION
+typedef void (cgen_print_fn) PARAMS ((PTR, const struct cgen_insn *,
+				      struct cgen_fields *, bfd_vma, int));
+#else
+typedef void (cgen_print_fn) ();
+#endif
+
+/* Insert handler.
+   The first argument is a pointer to a struct describing the insn being
+   parsed.
+   The second argument is a pointer to a cgen_fields struct
+   from which the values are fetched.
+   The third argument is a pointer to a buffer in which to place the insn.  */
+typedef void (cgen_insert_fn) PARAMS ((const struct cgen_insn *,
+				       struct cgen_fields *, cgen_insn_t *));
+
+/* Extract handler.
+   The first argument is a pointer to a struct describing the insn being
+   parsed.
+   The second argument is a pointer to a struct controlling extraction
+   (only used for variable length insns).
+   The third argument is the first CGEN_BASE_INSN_SIZE bytes.
+   The fourth argument is a pointer to a cgen_fields struct
+   in which the results are placed.
+   The result is the length of the insn or zero if not recognized.  */
+typedef int (cgen_extract_fn) PARAMS ((const struct cgen_insn *,
+				       void *, cgen_insn_t,
+				       struct cgen_fields *));
+
+/* The `parse' and `insert' fields are indices into these tables.
+   The elements are pointer to specialized handler functions.
+   Element 0 is special, it means use the default handler.  */
+extern cgen_parse_fn * CGEN_SYM (parse_handlers) [];
+#define CGEN_PARSE_FN(x) (CGEN_SYM (parse_handlers)[(x)->base.parse])
+extern cgen_insert_fn * CGEN_SYM (insert_handlers) [];
+#define CGEN_INSERT_FN(x) (CGEN_SYM (insert_handlers)[(x)->base.insert])
+
+/* Likewise for the `extract' and `print' fields.  */
+extern cgen_extract_fn * CGEN_SYM (extract_handlers) [];
+#define CGEN_EXTRACT_FN(x) (CGEN_SYM (extract_handlers)[(x)->base.extract])
+extern cgen_print_fn * CGEN_SYM (print_handlers) [];
+#define CGEN_PRINT_FN(x) (CGEN_SYM (print_handlers)[(x)->base.print])
+
+/* Base class of parser/printer.
+   (Don't read too much into the use of the phrase "base class").
+
+   Instructions and expressions all share this data in common.
+   It's a collection of the common elements needed to parse and print
+   each of them.  */
+
+#ifndef CGEN_MAX_INSN_ATTRS
+#define CGEN_MAX_INSN_ATTRS 1
+#endif
+
+struct cgen_base {
+  /* Indices into the handler tables.
+     We could use pointers here instead, but in the case of the insn table,
+     90% of them would be identical and that's a lot of redundant data.
+     0 means use the default (what the default is is up to the code).  */
+  unsigned char parse, insert, extract, print;
+
+  /* Attributes.  */
+  CGEN_ATTR_TYPE (CGEN_MAX_INSN_ATTRS) attrs;
+};
+
+/* Syntax table.
+
+   Each insn and subexpression has one of these.
+
+   The syntax "string" consists of characters (n > 0 && n < 128), and operand
+   values (n >= 128), and is terminated by 0.  Operand values are 128 + index
+   into the operand table.  The operand table doesn't exist in C, per se, as
+   the data is recorded in the parse/insert/extract/print switch statements.
+
+   ??? Whether we want to use yacc instead is unclear, but we do make an
+   effort to not make doing that difficult.  At least that's the intent.
+*/
+
+struct cgen_syntax {
+  /* Original syntax string, for debugging purposes.  */
+  char *orig;
+
+  /* Name of entry (that distinguishes it from all other entries).
+     This is used, for example, in simulator profiling results.  */
+  char *name;
+
+#if 0 /* not needed yet */
+  /* Format of this insn.
+     This doesn't closely follow the notion of instruction formats for more
+     complex instruction sets.  This is the value computed at runtime.  */
+  enum cgen_fmt_type fmt;
+#endif
+
+  /* Mnemonic (or name if expression).  */
+  char *mnemonic;
+
+  /* Syntax string.  */
+  /* FIXME: If each insn's mnemonic is constant, do we want to record just
+     the arguments here?  */
+#ifndef CGEN_MAX_SYNTAX_BYTES
+#define CGEN_MAX_SYNTAX_BYTES 16
+#endif
+  unsigned char syntax[CGEN_MAX_SYNTAX_BYTES];
+
+#define CGEN_SYNTAX_CHAR_P(c) ((c) < 128)
+#define CGEN_SYNTAX_CHAR(c) (c)
+#define CGEN_SYNTAX_FIELD(c) ((c) - 128)
+
+  /* recognize insn if (op & mask) == value
+     For architectures with variable length insns, this is just a preliminary
+     test.  */
+  /* FIXME: Might want a selectable type (rather than always
+     unsigned long).  */
+  unsigned long mask, value;
+
+  /* length, in bits
+     This is the size that `mask' and `value' have been calculated to.
+     Normally it is CGEN_BASE_INSN_BITSIZE.  On vliw architectures where
+     the base insn size may be larger than the size of an insn, this field is
+     less than CGEN_BASE_INSN_BITSIZE.
+     On architectures like the 386 and m68k the real size of the insn may
+     be computed while parsing.  */
+  /* FIXME: wip, of course */
+  int length;
+};
+
+/* Operand values (keywords, integers, symbols, etc.)  */
+
+/* Types of assembler elements.  */
+
+enum cgen_asm_type {
+  CGEN_ASM_KEYWORD, CGEN_ASM_MAX
+};
+
+/* List of hardware elements.  */
+
+typedef struct cgen_hw_entry {
+  struct cgen_hw_entry *next;
+  char *name;
+  enum cgen_asm_type asm_type;
+  PTR asm_data;
+} CGEN_HW_ENTRY;
+
+extern CGEN_HW_ENTRY *CGEN_SYM (hw_list);
+
+CGEN_HW_ENTRY *cgen_hw_lookup PARAMS ((const char *));
+
+#ifndef CGEN_MAX_KEYWORD_ATTRS
+#define CGEN_MAX_KEYWORD_ATTRS 1
+#endif
+
+/* This struct is used to describe things like register names, etc.  */
+
+typedef struct cgen_keyword_entry {
+  /* Name (as in register name).  */
+  char *name;
+
+  /* Value (as in register number).
+     The value cannot be -1 as that is used to indicate "not found".
+     IDEA: Have "FUNCTION" attribute? [function is called to fetch value].  */
+  int value;
+
+  /* Attributes.  */
+  /* FIXME: Not used yet.  */
+  CGEN_ATTR_TYPE (CGEN_MAX_KEYWORD_ATTRS) attrs;
+
+  /* Next name hash table entry.  */
+  struct cgen_keyword_entry *next_name;
+  /* Next value hash table entry.  */
+  struct cgen_keyword_entry *next_value;
+} CGEN_KEYWORD_ENTRY;
+
+/* Top level struct for describing a set of related keywords
+   (e.g. register names).
+
+   This struct supports runtime entry of new values, and hashed lookups.  */
+
+typedef struct cgen_keyword {
+  /* Pointer to initial [compiled in] values.  */
+  struct cgen_keyword_entry *init_entries;
+  /* Number of entries in `init_entries'.  */
+  unsigned int num_init_entries;
+  /* Hash table used for name lookup.  */
+  struct cgen_keyword_entry **name_hash_table;
+  /* Hash table used for value lookup.  */
+  struct cgen_keyword_entry **value_hash_table;
+  /* Number of entries in the hash_tables.  */
+  unsigned int hash_table_size;
+} CGEN_KEYWORD;
+
+/* Structure used for searching.  */
+
+typedef struct cgen_keyword_search {
+  /* Table being searched.  */
+  const struct cgen_keyword *table;
+  /* Specification of what is being searched for.  */
+  const char *spec;
+  /* Current index in hash table.  */
+  unsigned int current_hash;
+  /* Current element in current hash chain.  */
+  struct cgen_keyword_entry *current_entry;
+} CGEN_KEYWORD_SEARCH;
+
+/* Lookup a keyword from its name.  */
+const struct cgen_keyword_entry * cgen_keyword_lookup_name
+  PARAMS ((struct cgen_keyword *, const char *));
+/* Lookup a keyword from its value.  */
+const struct cgen_keyword_entry * cgen_keyword_lookup_value
+  PARAMS ((struct cgen_keyword *, int));
+/* Add a keyword.  */
+void cgen_keyword_add PARAMS ((struct cgen_keyword *,
+			       struct cgen_keyword_entry *));
+/* Keyword searching.
+   This can be used to retrieve every keyword, or a subset.  */
+struct cgen_keyword_search cgen_keyword_search_init
+  PARAMS ((struct cgen_keyword *, const char *));
+const struct cgen_keyword_entry *cgen_keyword_search_next
+  PARAMS ((struct cgen_keyword_search *));
+
+/* Operand value support routines.  */
+/* FIXME: some of the long's here will need to be bfd_vma or some such.  */
+
+const char * cgen_parse_keyword PARAMS ((const char **,
+					 struct cgen_keyword *,
+					 long *));
+const char * cgen_parse_signed_integer PARAMS ((const char **, int,
+						long, long, long *));
+const char * cgen_parse_unsigned_integer PARAMS ((const char **, int,
+						  unsigned long, unsigned long,
+						  unsigned long *));
+const char * cgen_parse_address PARAMS ((const char **, int,
+					 int, long *));
+const char * cgen_validate_signed_integer PARAMS ((long, long, long));
+const char * cgen_validate_unsigned_integer PARAMS ((unsigned long,
+						     unsigned long,
+						     unsigned long));
+
+/* This struct defines each entry in the operand table.  */
+
+#ifndef CGEN_MAX_OPERAND_ATTRS
+#define CGEN_MAX_OPERAND_ATTRS 1
+#endif
+
+typedef struct cgen_operand {
+  /* For debugging.  */
+  char *name;
+
+  /* Bit position (msb of first byte = bit 0).
+     May be unused for a modifier.  */
+  unsigned char start;
+
+  /* The number of bits in the operand.
+     May be unused for a modifier.  */
+  unsigned char length;
+
+  /* Attributes.  */
+  CGEN_ATTR_TYPE (CGEN_MAX_OPERAND_ATTRS) attrs;
+#define CGEN_OPERAND_ATTRS(operand) (&(operand)->attrs)
+
+#if 0 /* ??? Interesting idea but relocs tend to get too complicated for
+	 simple table lookups to work.  */
+  /* Ideally this would be the internal (external?) reloc type.  */
+  int reloc_type;
+#endif
+} CGEN_OPERAND;
+
+/* Return value of attribute ATTR in OPERAND.  */
+#define CGEN_OPERAND_ATTR(operand, attr) \
+CGEN_ATTR_VALUE (operand, CGEN_OPERAND_ATTRS (operand), attr)
+
+/* The operand table is currently a very static entity.  */
+extern const CGEN_OPERAND CGEN_SYM (operand_table)[];
+
+enum cgen_operand_type;
+
+#define CGEN_OPERAND_INDEX(operand) ((int) ((operand) - CGEN_SYM (operand_table)))
+/* FIXME: Rename, cpu-opc.h defines this as the typedef of the enum.  */
+#define CGEN_OPERAND_TYPE(operand) ((enum cgen_operand_type) CGEN_OPERAND_INDEX (operand))
+#define CGEN_OPERAND_ENTRY(n) (& CGEN_SYM (operand_table) [n])
+
+/* This struct defines each entry in the instruction table.  */
+
+struct cgen_insn {
+  struct cgen_base base;
+/* Given a pointer to a cgen_insn struct, return a pointer to `base'.  */
+#define CGEN_INSN_BASE(insn) (&(insn)->base)
+#define CGEN_INSN_ATTRS(insn) (&(insn)->base.attrs)
+
+  struct cgen_syntax syntax;
+#define CGEN_INSN_SYNTAX(insn) (&(insn)->syntax)
+#define CGEN_INSN_FMT(insn) ((insn)->syntax.fmt)
+#define CGEN_INSN_BITSIZE(insn) ((insn)->syntax.length)
+};
+
+/* Return value of attribute ATTR in INSN.  */
+#define CGEN_INSN_ATTR(insn, attr) \
+CGEN_ATTR_VALUE (insn, CGEN_INSN_ATTRS (insn), attr)
+
+/* Instruction lists.
+   This is used for adding new entries and for creating the hash lists.  */
+
+typedef struct cgen_insn_list {
+  struct cgen_insn_list *next;
+  const struct cgen_insn *insn;
+} CGEN_INSN_LIST;
+
+/* The table of instructions.  */
+
+typedef struct cgen_insn_table {
+  /* Pointer to initial [compiled in] entries.  */
+  const struct cgen_insn *init_entries;
+  /* Number of entries in `init_entries', including trailing NULL entry.  */
+  unsigned int num_init_entries;
+  /* Values added at runtime.  */
+  struct cgen_insn_list *new_entries;
+  /* Assembler hash function.  */
+  unsigned int (*asm_hash) PARAMS ((const char *));
+  /* Number of entries in assembler hash table.  */
+  unsigned int asm_hash_table_size;
+  /* Disassembler hash function.  */
+  unsigned int (*dis_hash) PARAMS ((const char *, unsigned long));
+  /* Number of entries in disassembler hash table.  */
+  unsigned int dis_hash_table_size;
+} CGEN_INSN_TABLE;
+
+/* ??? This is currently used by the simulator.
+   We want this to be fast and the simulator currently doesn't handle
+   runtime added instructions so this is ok.  An alternative would be to
+   store the index in the table.  */
+extern const CGEN_INSN CGEN_SYM (insn_table_entries)[];
+#define CGEN_INSN_INDEX(insn) ((int) ((insn) - CGEN_SYM (insn_table_entries)))
+#define CGEN_INSN_ENTRY(n) (& CGEN_SYM (insn_table_entries) [n])
+
+/* Return number of instructions.  This includes any added at runtime.  */
+
+int cgen_insn_count PARAMS (());
+
+/* The assembler insn table is hashed based on some function of the mnemonic
+   (the actually hashing done is up to the target, but we provide a few
+   examples like the first letter or a function of the entire mnemonic).
+   The index of each entry is the index of the corresponding table entry.
+   The value of each entry is the index of the next entry, with a 0
+   terminating (thus the first entry is reserved).  */
+
+#ifndef CGEN_ASM_HASH
+#ifdef CGEN_MNEMONIC_OPERANDS
+#define CGEN_ASM_HASH_SIZE 127
+#define CGEN_ASM_HASH(string) (*(unsigned char *) (string) % CGEN_ASM_HASH_SIZE)
+#else
+#define CGEN_ASM_HASH_SIZE 128
+#define CGEN_ASM_HASH(string) (*(unsigned char *) (string) % CGEN_ASM_HASH_SIZE) /*FIXME*/
+#endif
+#endif
+
+unsigned int CGEN_SYM (asm_hash_insn) PARAMS ((const char *));
+CGEN_INSN_LIST * cgen_asm_lookup_insn PARAMS ((const char *));
+#define CGEN_ASM_LOOKUP_INSN(insn) cgen_asm_lookup_insn (insn)
+#define CGEN_ASM_NEXT_INSN(insn) ((insn)->next)
+
+/* The disassembler insn table is hashed based on some function of machine
+   instruction (the actually hashing done is up to the target).  */
+
+/* It doesn't make much sense to provide a default here,
+   but while this is under development we do.
+   BUFFER is a pointer to the bytes of the insn.
+   INSN is the first CGEN_BASE_INSN_SIZE bytes as an int in host order.  */
+#ifndef CGEN_DIS_HASH
+#define CGEN_DIS_HASH_SIZE 256
+#define CGEN_DIS_HASH(buffer, insn) (*(unsigned char *) (buffer))
+#endif
+
+unsigned int CGEN_SYM (dis_hash_insn) PARAMS ((const char *, unsigned long));
+CGEN_INSN_LIST * cgen_dis_lookup_insn PARAMS ((const char *, unsigned long));
+#define CGEN_DIS_LOOKUP_INSN(buf, insn) cgen_dis_lookup_insn (buf, insn)
+#define CGEN_DIS_NEXT_INSN(insn) ((insn)->next)
+
+/* Top level structures and functions.  */
+
+typedef struct cgen_opcode_data {
+  CGEN_HW_ENTRY *hw_list;
+  /*CGEN_OPERAND_TABLE *operand_table; - FIXME:wip */
+  CGEN_INSN_TABLE *insn_table;
+} CGEN_OPCODE_DATA;
+
+/* Each CPU has one of these.  */
+extern CGEN_OPCODE_DATA CGEN_SYM (opcode_data);
+
+/* Global state access macros.
+   Some of these are tucked away and accessed with cover fns.
+   Simpler things like the current machine and endian are not.  */
+
+extern int cgen_current_machine;
+#define CGEN_CURRENT_MACHINE cgen_current_machine
+
+extern enum cgen_endian cgen_current_endian;
+#define CGEN_CURRENT_ENDIAN cgen_current_endian
+
+/* Prototypes of major functions.  */
+
+/* Set the current cpu (+ mach number, endian, etc.).  *?
+void cgen_set_cpu PARAMS ((CGEN_OPCODE_DATA *, int, enum cgen_endian));
+
+/* Initialize the assembler, disassembler.  */
+void cgen_asm_init PARAMS ((void));
+void cgen_dis_init PARAMS ((void));
+
+/* `init_tables' must be called before `xxx_supported'.  */
+void CGEN_SYM (init_tables) PARAMS ((int));
+void CGEN_SYM (init_asm) PARAMS ((int, enum cgen_endian));
+void CGEN_SYM (init_dis) PARAMS ((int, enum cgen_endian));
+void CGEN_SYM (init_parse) PARAMS ((void));
+void CGEN_SYM (init_print) PARAMS ((void));
+void CGEN_SYM (init_insert) PARAMS ((void));
+void CGEN_SYM (init_extract) PARAMS ((void));
+const struct cgen_insn *
+CGEN_SYM (assemble_insn) PARAMS ((const char *, struct cgen_fields *,
+				  cgen_insn_t *, char **));
+int CGEN_SYM (insn_supported) PARAMS ((const struct cgen_syntax *));
+#if 0 /* old */
+int CGEN_SYM (opval_supported) PARAMS ((const struct cgen_opval *));
+#endif
+
+extern const struct cgen_keyword  CGEN_SYM (operand_mach);
+int CGEN_SYM (get_mach) PARAMS ((const char *));
+
+CGEN_INLINE void
+CGEN_SYM (put_operand) PARAMS ((int, const long *,
+				struct cgen_fields *));
+CGEN_INLINE long
+CGEN_SYM (get_operand) PARAMS ((int, const struct cgen_fields *));
+
+CGEN_INLINE const char *
+CGEN_SYM (parse_operand) PARAMS ((int, const char **, struct cgen_fields *));
+
+CGEN_INLINE const char *
+CGEN_SYM (validate_operand) PARAMS ((int, const struct cgen_fields *));
+
+/* Default insn parser, printer.  */
+extern cgen_parse_fn CGEN_SYM (parse_insn);
+extern cgen_insert_fn CGEN_SYM (insert_insn);
+extern cgen_extract_fn CGEN_SYM (extract_insn);
+extern cgen_print_fn CGEN_SYM (print_insn);
+
+/* Read in a cpu description file.  */
+const char * cgen_read_cpu_file PARAMS ((const char *));
+
+/* Assembler interface.
+
+   The interface to the assembler is intended to be clean in the sense that
+   libopcodes.a is a standalone entity and could be used with any assembler.
+   Not that one would necessarily want to do that but rather that it helps
+   keep a clean interface.  The interface will obviously be slanted towards
+   GAS, but at least it's a start.
+
+   Parsing is controlled by the assembler which calls
+   CGEN_SYM (assemble_insn).  If it can parse and build the entire insn
+   it doesn't call back to the assembler.  If it needs/wants to call back
+   to the assembler, (*cgen_parse_operand_fn) is called which can either
+
+   - return a number to be inserted in the insn
+   - return a "register" value to be inserted
+     (the register might not be a register per pe)
+   - queue the argument and return a marker saying the expression has been
+     queued (eg: a fix-up)
+   - return an error message indicating the expression wasn't recognizable
+
+   The result is an error message or NULL for success.
+   The parsed value is stored in the bfd_vma *.  */
+
+/* Values for indicating what the caller wants.  */
+enum cgen_parse_operand_type {
+  CGEN_PARSE_OPERAND_INIT, CGEN_PARSE_OPERAND_INTEGER,
+  CGEN_PARSE_OPERAND_ADDRESS
+};
+
+/* Values for indicating what was parsed.
+   ??? Not too useful at present but in time.  */
+enum cgen_parse_operand_result {
+  CGEN_PARSE_OPERAND_RESULT_NUMBER, CGEN_PARSE_OPERAND_RESULT_REGISTER,
+  CGEN_PARSE_OPERAND_RESULT_QUEUED, CGEN_PARSE_OPERAND_RESULT_ERROR
+};
+
+/* Don't require bfd.h unnecessarily.  */
+#ifdef BFD_VERSION
+extern const char * (*cgen_parse_operand_fn)
+     PARAMS ((enum cgen_parse_operand_type, const char **, int, int,
+	      enum cgen_parse_operand_result *, bfd_vma *));
+#endif
+
+/* Called before trying to match a table entry with the insn.  */
+void cgen_init_parse_operand PARAMS ((void));
+
+/* Called from <cpu>-asm.c to initialize operand parsing.  */
+
+/* These are GAS specific.  They're not here as part of the interface,
+   but rather that we need to put them somewhere.  */
+
+/* Call this from md_assemble to initialize the assembler callback.  */
+void cgen_asm_init_parse PARAMS ((void));
+
+/* Don't require bfd.h unnecessarily.  */
+#ifdef BFD_VERSION
+/* The result is an error message or NULL for success.
+   The parsed value is stored in the bfd_vma *.  */
+const char *cgen_parse_operand PARAMS ((enum cgen_parse_operand_type,
+					const char **, int, int,
+					enum cgen_parse_operand_result *,
+					bfd_vma *));
+#endif
+
+/* Add a register to the assembler's hash table.
+   This makes lets GAS parse registers for us.
+   ??? This isn't currently used, but it could be in the future.  */
+void cgen_asm_record_register PARAMS ((char *, int));
+
+/* After CGEN_SYM (assemble_insn) is done, this is called to
+   output the insn and record any fixups.  */
+void cgen_asm_finish_insn PARAMS ((const struct cgen_insn *, cgen_insn_t *,
+				   unsigned int));
+
+#endif /* CGEN_H */
diff --git a/gnu/usr.bin/binutils/include/opcode/d10v.h b/gnu/usr.bin/binutils/include/opcode/d10v.h
new file mode 100644
index 00000000000..33d1af40c84
--- /dev/null
+++ b/gnu/usr.bin/binutils/include/opcode/d10v.h
@@ -0,0 +1,185 @@
+/* d10v.h -- Header file for D10V opcode table
+   Copyright 1996 Free Software Foundation, Inc.
+   Written by Martin Hunt (hunt@cygnus.com), Cygnus Support
+
+This file is part of GDB, GAS, and the GNU binutils.
+
+GDB, GAS, and the GNU binutils are free software; you can redistribute
+them and/or modify them under the terms of the GNU General Public
+License as published by the Free Software Foundation; either version
+1, or (at your option) any later version.
+
+GDB, GAS, and the GNU binutils are distributed in the hope that they
+will be useful, but WITHOUT ANY WARRANTY; without even the implied
+warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See
+the GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this file; see the file COPYING.  If not, write to the Free
+Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
+
+#ifndef D10V_H
+#define D10V_H
+
+/* Format Specifier */
+#define FM00	0
+#define FM01	0x40000000
+#define FM10	0x80000000
+#define FM11	0xC0000000
+
+#define NOP 0x5e00
+#define OPCODE_DIVS	0x14002800
+
+/* The opcode table is an array of struct d10v_opcode.  */
+
+struct d10v_opcode
+{
+  /* The opcode name.  */
+  const char *name;
+
+  /* the opcode format */
+  int format;
+
+  /* These numbers were picked so we can do if( i & SHORT_OPCODE) */
+#define SHORT_OPCODE 1
+#define LONG_OPCODE  8
+#define SHORT_2	     1		/* short with 2 operands */
+#define SHORT_B	     3		/* short with 8-bit branch */
+#define LONG_B	     8		/* long with 16-bit branch */
+#define LONG_L       10		/* long with 3 operands */
+#define LONG_R       12		/* reserved */
+
+  /* just a placeholder for variable-length instructions */
+  /* for example, "bra" will be a fake for "bra.s" and bra.l" */
+  /* which will immediately follow in the opcode table.  */
+#define OPCODE_FAKE  32
+
+  /* the number of cycles */
+  int cycles;
+
+  /* the execution unit(s) used */
+  int unit;
+#define EITHER	0
+#define IU	1
+#define MU	2
+#define BOTH	3
+
+  /* execution type; parallel or sequential */
+  /* this field is used to decide if two instructions */
+  /* can be executed in parallel */
+  int exec_type;
+#define PARONLY 1	/* parallel only */
+#define SEQ	2	/* must be sequential */
+#define PAR	4	/* may be parallel */
+#define BRANCH_LINK 8	/* subroutine call.  must be aligned */
+#define RMEM     16	/* reads memory */
+#define WMEM     32	/* writes memory */
+#define RF0      64	/* reads f0 */
+#define WF0     128	/* modifies f0 */
+#define WCAR    256	/* write Carry */
+#define BRANCH  512	/* branch, no link */
+
+  /* the opcode */
+  long opcode;
+
+  /* mask.  if( (i & mask) == opcode ) then match */
+  long mask;
+
+  /* An array of operand codes.  Each code is an index into the
+     operand table.  They appear in the order which the operands must
+     appear in assembly code, and are terminated by a zero.  */
+  unsigned char operands[6];
+};
+
+/* The table itself is sorted by major opcode number, and is otherwise
+   in the order in which the disassembler should consider
+   instructions.  */
+extern const struct d10v_opcode d10v_opcodes[];
+extern const int d10v_num_opcodes;
+
+/* The operands table is an array of struct d10v_operand.  */
+struct d10v_operand
+{
+  /* The number of bits in the operand.  */
+  int bits;
+
+  /* How far the operand is left shifted in the instruction.  */
+  int shift;
+
+  /* One bit syntax flags.  */
+  int flags;
+};
+
+/* Elements in the table are retrieved by indexing with values from
+   the operands field of the d10v_opcodes table.  */
+
+extern const struct d10v_operand d10v_operands[];
+
+/* Values defined for the flags field of a struct d10v_operand.  */
+
+/* the operand must be an even number */
+#define OPERAND_EVEN	(1)
+
+/* the operand must be an odd number */
+#define OPERAND_ODD	(2)	
+
+/* this is the destination register; it will be modified */
+/* this is used by the optimizer */
+#define OPERAND_DEST	(4)
+
+/* number or symbol */
+#define OPERAND_NUM	(8)
+
+/* address or label */
+#define OPERAND_ADDR	(0x10)
+
+/* register */
+#define OPERAND_REG	(0x20)
+
+/* postincrement +  */
+#define OPERAND_PLUS	(0x40)
+
+/* postdecrement -  */
+#define OPERAND_MINUS	(0x80)
+
+/* @  */
+#define OPERAND_ATSIGN	(0x100)
+
+/* @(  */
+#define OPERAND_ATPAR	(0x200)
+
+/* accumulator */
+#define OPERAND_ACC	(0x400)
+
+/* flag register */
+#define OPERAND_FLAG	(0x800)
+
+/* control register  */
+#define OPERAND_CONTROL	(0x1000)
+
+/* predecrement mode '@-sp'  */
+#define OPERAND_ATMINUS	(0x2000)
+
+/* signed number */
+#define OPERAND_SIGNED	(0x4000)
+
+/* special accumulator shifts need a 4-bit number */
+/* 1 <= x <= 16 */
+#define OPERAND_SHIFT	(0x8000)
+
+/* Structure to hold information about predefined registers.  */
+struct pd_reg
+{
+  char *name;		/* name to recognize */
+  char *pname;		/* name to print for this register */
+  int value;
+};
+
+extern const struct pd_reg d10v_predefined_registers[];
+int d10v_reg_name_cnt();
+
+/* an expressionS only has one register type, so we fake it */
+/* by setting high bits to indicate type */
+#define REGISTER_MASK	0xFF
+
+#endif /* D10V_H */
diff --git a/gnu/usr.bin/binutils/include/remote-sim.h b/gnu/usr.bin/binutils/include/remote-sim.h
new file mode 100644
index 00000000000..77685d5eef3
--- /dev/null
+++ b/gnu/usr.bin/binutils/include/remote-sim.h
@@ -0,0 +1,144 @@
+/* This file defines the interface between the simulator and gdb.
+   Copyright (C) 1993, 1994, 1996, 1997 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
+
+#if !defined (REMOTE_SIM_H)
+#define REMOTE_SIM_H 1
+
+/* This file is used when building stand-alone simulators, so isolate this
+   file from gdb.  */
+
+/* Pick up CORE_ADDR_TYPE if defined (from gdb), otherwise use same value as
+   gdb does (unsigned int - from defs.h).  */
+
+#ifndef CORE_ADDR_TYPE
+typedef unsigned int SIM_ADDR;
+#else
+typedef CORE_ADDR_TYPE SIM_ADDR;
+#endif
+
+/* Semi-opaque type used as result of sim_open and passed back to all
+   other routines.  "desc" is short for "descriptor".
+   It is up to each simulator to define `sim_state'.  */
+
+typedef struct sim_state *SIM_DESC;
+
+/* Values for `kind' arg to sim_open.  */
+typedef enum {
+  SIM_OPEN_STANDALONE, /* simulator used standalone (run.c) */
+  SIM_OPEN_DEBUG       /* simulator used by debugger (gdb) */
+} SIM_OPEN_KIND;
+
+/* Return codes from various functions.  */
+typedef enum {
+  SIM_RC_FAIL = 0,
+  SIM_RC_OK = 1
+} SIM_RC;
+
+/* Main simulator entry points.  */
+
+/* Initialize the simulator.  This function is called when the simulator
+   is selected from the gdb command line.
+   KIND specifies how the simulator will be used.  Currently there are only
+   two kinds: standalone and debug.
+   ARGV is passed from the command line and can be used to select whatever
+   run time options the simulator provides.
+   ARGV is the standard NULL terminated array of pointers, with argv[0]
+   being the program name.
+   The result is a descriptor that must be passed back to the other sim_foo
+   functions.  */
+
+SIM_DESC sim_open PARAMS ((SIM_OPEN_KIND kind, char **argv));
+
+/* Terminate usage of the simulator.  This may involve freeing target memory
+   and closing any open files and mmap'd areas.  You cannot assume sim_kill
+   has already been called.
+   QUITTING is non-zero if we cannot hang on errors.  */
+
+void sim_close PARAMS ((SIM_DESC sd, int quitting));
+
+/* Load program PROG into the simulator.
+   Return non-zero if you wish the caller to handle it
+   (it is done this way because most simulators can use gr_load_image,
+   but defining it as a callback seems awkward).  */
+
+int sim_load PARAMS ((SIM_DESC sd, char *prog, int from_tty));
+
+/* Prepare to run the simulated program.
+   START_ADDRESS is, yes, you guessed it, the start address of the program.
+   ARGV and ENV are NULL terminated lists of pointers.
+   Gdb will set the start address via sim_store_register as well, but
+   standalone versions of existing simulators are not set up to cleanly call
+   sim_store_register, so the START_ADDRESS argument is there as a
+   workaround.  */
+
+void sim_create_inferior PARAMS ((SIM_DESC sd, SIM_ADDR start_address,
+				  char **argv, char **env));
+
+/* Kill the running program.
+   This may involve closing any open files and deleting any mmap'd areas.  */
+
+void sim_kill PARAMS ((SIM_DESC sd));
+
+/* Read LENGTH bytes of the simulated program's memory and store in BUF.
+   Result is number of bytes read, or zero if error.  */
+
+int sim_read PARAMS ((SIM_DESC sd, SIM_ADDR mem, unsigned char *buf, int length));
+
+/* Store LENGTH bytes from BUF in the simulated program's memory.
+   Result is number of bytes write, or zero if error.  */
+
+int sim_write PARAMS ((SIM_DESC sd, SIM_ADDR mem, unsigned char *buf, int length));
+
+/* Fetch register REGNO and store the raw value in BUF.  */
+
+void sim_fetch_register PARAMS ((SIM_DESC sd, int regno, unsigned char *buf));
+
+/* Store register REGNO from BUF (in raw format).  */
+
+void sim_store_register PARAMS ((SIM_DESC sd, int regno, unsigned char *buf));
+
+/* Print some interesting information about the simulator.
+   VERBOSE is non-zero for the wordy version.  */
+
+void sim_info PARAMS ((SIM_DESC sd, int verbose));
+
+/* Fetch why the program stopped.
+   SIGRC will contain either the argument to exit() or the signal number.  */
+
+enum sim_stop { sim_exited, sim_stopped, sim_signalled };
+
+void sim_stop_reason PARAMS ((SIM_DESC sd, enum sim_stop *reason, int *sigrc));
+
+/* Run (or resume) the program.  */
+
+void sim_resume PARAMS ((SIM_DESC sd, int step, int siggnal));
+
+/* Passthru for other commands that the simulator might support.
+   If SD is NULL, the command is to be interpreted as refering to
+   the global state, however the simulator defines that.  */
+
+void sim_do_command PARAMS ((SIM_DESC sd, char *cmd));
+
+/* Provide simulator with a standard host_callback_struct.
+   If SD is NULL, the command is to be interpreted as refering to
+   the global state, however the simulator defines that.  */
+
+void sim_set_callbacks PARAMS ((SIM_DESC sd, struct host_callback_struct *));
+
+#endif /* !defined (REMOTE_SIM_H) */