diff options
| author | Miod Vallat <miod@cvs.openbsd.org> | 2004-11-02 20:23:32 +0000 |
|---|---|---|
| committer | Miod Vallat <miod@cvs.openbsd.org> | 2004-11-02 20:23:32 +0000 |
| commit | 21ca5604689b35171671ce1ed04c5faccc82e0cd (patch) | |
| tree | fecccf88d2c1cd815887b6c39d76a22688e234ca /gnu/usr.bin/binutils/opcodes/alpha-opc.c | |
| parent | d4035bbe9de0a0eff2e5cae2ebc0a34f9227901b (diff) | |
Binutils 2.15, with testsuites removed, and without gdb and libiberty.
Diffstat (limited to 'gnu/usr.bin/binutils/opcodes/alpha-opc.c')
| -rw-r--r-- | gnu/usr.bin/binutils/opcodes/alpha-opc.c | 13 |
1 files changed, 3 insertions, 10 deletions
diff --git a/gnu/usr.bin/binutils/opcodes/alpha-opc.c b/gnu/usr.bin/binutils/opcodes/alpha-opc.c index 8dc10e4a55b..53715975721 100644 --- a/gnu/usr.bin/binutils/opcodes/alpha-opc.c +++ b/gnu/usr.bin/binutils/opcodes/alpha-opc.c @@ -1,5 +1,5 @@ /* alpha-opc.c -- Alpha AXP opcode list - Copyright 1996, 1997, 1998, 1999, 2000 Free Software Foundation, Inc. + Copyright 1996, 1997, 1998, 1999, 2000, 2003 Free Software Foundation, Inc. Contributed by Richard Henderson <rth@cygnus.com>, patterned after the PPC opcode handling written by Ian Lance Taylor. @@ -214,7 +214,6 @@ const unsigned alpha_num_operands = sizeof(alpha_operands)/sizeof(*alpha_operand the RA field into the RB field, and the extraction function just checks that the fields are the same. */ -/*ARGSUSED*/ static unsigned insert_rba(insn, value, errmsg) unsigned insn; @@ -238,7 +237,6 @@ extract_rba(insn, invalid) /* The same for the RC field */ -/*ARGSUSED*/ static unsigned insert_rca(insn, value, errmsg) unsigned insn; @@ -262,7 +260,6 @@ extract_rca(insn, invalid) /* Fake arguments in which the registers must be set to ZERO */ -/*ARGSUSED*/ static unsigned insert_za(insn, value, errmsg) unsigned insn; @@ -282,7 +279,6 @@ extract_za(insn, invalid) return 0; } -/*ARGSUSED*/ static unsigned insert_zb(insn, value, errmsg) unsigned insn; @@ -302,7 +298,6 @@ extract_zb(insn, invalid) return 0; } -/*ARGSUSED*/ static unsigned insert_zc(insn, value, errmsg) unsigned insn; @@ -336,7 +331,6 @@ insert_bdisp(insn, value, errmsg) return insn | ((value / 4) & 0x1FFFFF); } -/*ARGSUSED*/ static int extract_bdisp(insn, invalid) unsigned insn; @@ -359,7 +353,6 @@ insert_jhint(insn, value, errmsg) return insn | ((value / 4) & 0x3FFF); } -/*ARGSUSED*/ static int extract_jhint(insn, invalid) unsigned insn; @@ -381,7 +374,6 @@ insert_ev6hwjhint(insn, value, errmsg) return insn | ((value / 4) & 0x1FFF); } -/*ARGSUSED*/ static int extract_ev6hwjhint(insn, invalid) unsigned insn; @@ -1105,7 +1097,8 @@ const struct alpha_opcode alpha_opcodes[] = { { "wmb", MFC(0x18,0x4400), BASE, ARG_NONE }, { "fetch", MFC(0x18,0x8000), BASE, { ZA, PRB } }, { "fetch_m", MFC(0x18,0xA000), BASE, { ZA, PRB } }, - { "rpcc", MFC(0x18,0xC000), BASE, { RA } }, + { "rpcc", MFC(0x18,0xC000), BASE, { RA, ZB } }, + { "rpcc", MFC(0x18,0xC000), BASE, { RA, RB } }, /* ev6 una */ { "rc", MFC(0x18,0xE000), BASE, { RA } }, { "ecb", MFC(0x18,0xE800), BASE, { ZA, PRB } }, /* ev56 una */ { "rs", MFC(0x18,0xF000), BASE, { RA } }, |