GDB 6.1 (excluding .info files)

3 files changed, 942 insertions, 0 deletions

diff --git a/gnu/usr.bin/binutils/gdb/mipsnbsd-nat.c b/gnu/usr.bin/binutils/gdb/mipsnbsd-nat.c
new file mode 100644
index 00000000000..231f6d7687d
--- /dev/null
+++ b/gnu/usr.bin/binutils/gdb/mipsnbsd-nat.c
@@ -0,0 +1,181 @@
+/* Functions specific to running gdb native on a mips running NetBSD
+   Copyright  1997 Free Software Foundation, Inc.
+   Contributed by Jonathan Stone(jonathan@dsg.stanford.edu) at Stanford
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
+
+#include <sys/types.h>
+#include <sys/ptrace.h>
+#include <machine/reg.h>
+#include <machine/pcb.h>
+#include <setjmp.h>
+
+#include "defs.h"
+#include "inferior.h"
+#include "target.h"
+#include "gdbcore.h"
+
+#define JB_ELEMENT_SIZE 4
+
+void
+fetch_inferior_registers (regno)
+     int regno;
+{
+  struct reg inferior_registers;
+  struct fpreg inferior_fp_registers;
+
+  bzero(&inferior_registers, sizeof(inferior_registers));
+  ptrace (PT_GETREGS, inferior_pid,
+	  (PTRACE_ARG3_TYPE) &inferior_registers, 0);
+
+  memcpy (&registers[REGISTER_BYTE (0)], 
+	  &inferior_registers, sizeof(inferior_registers));
+
+  bzero(&inferior_fp_registers, sizeof(inferior_fp_registers));
+  ptrace (PT_GETFPREGS, inferior_pid,
+	  (PTRACE_ARG3_TYPE) &inferior_fp_registers, 0);
+
+  memcpy (&registers[REGISTER_BYTE (FP0_REGNUM)],
+	  &inferior_fp_registers, sizeof(struct fpreg));
+
+  registers_fetched ();
+}
+
+void
+store_inferior_registers (regno)
+     int regno;
+{
+  struct reg inferior_registers;
+  struct fpreg inferior_fp_registers;
+
+  memcpy (&inferior_registers, &registers[REGISTER_BYTE (0)], 
+	  sizeof(inferior_registers));
+
+  ptrace (PT_SETREGS, inferior_pid,
+	  (PTRACE_ARG3_TYPE) &inferior_registers, 0);
+
+  memcpy (&inferior_fp_registers, &registers[REGISTER_BYTE (FP0_REGNUM)],
+	  sizeof(inferior_fp_registers));
+
+  ptrace (PT_SETFPREGS, inferior_pid,
+	  (PTRACE_ARG3_TYPE) &inferior_fp_registers, 0);
+}
+
+
+/* Figure out where the longjmp will land.
+   We expect the first arg to be a pointer to the jmp_buf structure from which
+   we extract the pc (JB_PC) that we will land at.  The pc is copied into PC.
+   This routine returns true on success. */
+
+int
+get_longjmp_target(pc)
+     CORE_ADDR *pc;
+{
+  CORE_ADDR jb_addr;
+  char buf[TARGET_PTR_BIT / TARGET_CHAR_BIT];
+
+  jb_addr = read_register (A0_REGNUM);
+
+  if (target_read_memory (jb_addr + JB_PC * JB_ELEMENT_SIZE, buf,
+			  TARGET_PTR_BIT / TARGET_CHAR_BIT))
+    return 0;
+
+  *pc = extract_address (buf, TARGET_PTR_BIT / TARGET_CHAR_BIT);
+
+  return 1;
+}
+
+
+/* XXX - Add this to machine/regs.h instead? */
+struct md_core {
+	struct reg intreg;
+	struct fpreg freg;
+};
+
+
+/* Extract the register values out of the core file and store
+   them where `read_register' will find them.
+
+   CORE_REG_SECT points to the register values themselves, read into memory.
+   CORE_REG_SIZE is the size of that area.
+   WHICH says which set of registers we are handling (0 = int, 2 = float
+         on machines where they are discontiguous).
+   REG_ADDR is the offset from u.u_ar0 to the register values relative to
+            core_reg_sect.  This is used with old-fashioned core files to
+	    locate the registers in a large upage-plus-stack ".reg" section.
+	    Original upage address X is at location core_reg_sect+x+reg_addr.
+ */
+void
+fetch_core_registers (core_reg_sect, core_reg_size, which, ignore)
+  char *core_reg_sect;
+  unsigned core_reg_size;
+  int which;
+  unsigned int ignore;	/* reg addr, unused in this version */
+{
+  struct md_core *core_reg;
+
+  core_reg = (struct md_core *)core_reg_sect;
+
+  if (which == 0) {
+    /* Integer registers */
+    memcpy(&registers[REGISTER_BYTE (0)],
+	   &core_reg->intreg, sizeof(struct reg));
+  }
+
+  else if (which == 2) {
+    /* Floating point registers */
+    memcpy(&registers[REGISTER_BYTE (FP0_REGNUM)],
+	   &core_reg->freg, sizeof(struct fpreg));
+  }
+}
+
+#ifdef	FETCH_KCORE_REGISTERS
+/* Get registers from a kernel crash dump. 
+   FIXME: NetBSD 1.3 does not produce kernel crashdumps.  */
+void
+fetch_kcore_registers(pcb)
+struct pcb *pcb;
+{
+  int i, *ip, tmp=0;
+  u_long sp;
+
+#if 0
+  supply_register(SP_REGNUM, (char *)&pcb->pcb_sp);
+  supply_register(PC_REGNUM, (char *)&pcb->pcb_pc);
+#endif
+
+  /* The kernel does not use the FPU, so ignore it. */
+  registers_fetched ();
+}
+#endif	/* FETCH_KCORE_REGISTERS */
+
+
+/* Register that we are able to handle core file formats.
+   FIXME: is this really bfd_target_unknown_flavour? */
+
+static struct core_fns netbsd_core_fns =
+{
+  bfd_target_unknown_flavour,
+  fetch_core_registers,
+  NULL
+};
+
+void
+_initialize_mipsbsd_nat ()
+{
+  add_core_fns (&netbsd_core_fns);
+}
diff --git a/gnu/usr.bin/binutils/gdb/ns32knbsd-nat.c b/gnu/usr.bin/binutils/gdb/ns32knbsd-nat.c
new file mode 100644
index 00000000000..c9f75cac87f
--- /dev/null
+++ b/gnu/usr.bin/binutils/gdb/ns32knbsd-nat.c
@@ -0,0 +1,353 @@
+/* Functions specific to running gdb native on an ns32k running NetBSD
+   Copyright 1989, 1992, 1993, 1994, 1996 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
+
+#include <sys/types.h>
+#include <sys/ptrace.h>
+#include <machine/reg.h>
+#include <machine/frame.h>
+#include <machine/pcb.h>
+
+#include "defs.h"
+#include "inferior.h"
+#include "target.h"
+#include "gdbcore.h"
+
+#define RF(dst, src) \
+	memcpy(&registers[REGISTER_BYTE(dst)], &src, sizeof(src))
+
+#define RS(src, dst) \
+	memcpy(&dst, &registers[REGISTER_BYTE(src)], sizeof(dst))
+
+void
+fetch_inferior_registers (regno)
+     int regno;
+{
+  struct reg inferior_registers;
+  struct fpreg inferior_fpregisters;
+
+  ptrace (PT_GETREGS, inferior_pid,
+	  (PTRACE_ARG3_TYPE) &inferior_registers, 0);
+  ptrace (PT_GETFPREGS, inferior_pid,
+	  (PTRACE_ARG3_TYPE) &inferior_fpregisters, 0);
+
+  RF(R0_REGNUM + 0, inferior_registers.r_r0);
+  RF(R0_REGNUM + 1, inferior_registers.r_r1);
+  RF(R0_REGNUM + 2, inferior_registers.r_r2);
+  RF(R0_REGNUM + 3, inferior_registers.r_r3);
+  RF(R0_REGNUM + 4, inferior_registers.r_r4);
+  RF(R0_REGNUM + 5, inferior_registers.r_r5);
+  RF(R0_REGNUM + 6, inferior_registers.r_r6);
+  RF(R0_REGNUM + 7, inferior_registers.r_r7);
+
+  RF(SP_REGNUM	  , inferior_registers.r_sp);
+  RF(FP_REGNUM	  , inferior_registers.r_fp);
+  RF(PC_REGNUM	  , inferior_registers.r_pc);
+  RF(PS_REGNUM	  , inferior_registers.r_psr);
+
+  RF(FPS_REGNUM   , inferior_fpregisters.r_fsr);
+  RF(FP0_REGNUM +0, inferior_fpregisters.r_freg[0]);
+  RF(FP0_REGNUM +2, inferior_fpregisters.r_freg[2]);
+  RF(FP0_REGNUM +4, inferior_fpregisters.r_freg[4]);
+  RF(FP0_REGNUM +6, inferior_fpregisters.r_freg[6]);
+  RF(LP0_REGNUM + 1, inferior_fpregisters.r_freg[1]);
+  RF(LP0_REGNUM + 3, inferior_fpregisters.r_freg[3]);
+  RF(LP0_REGNUM + 5, inferior_fpregisters.r_freg[5]);
+  RF(LP0_REGNUM + 7, inferior_fpregisters.r_freg[7]);
+   registers_fetched ();
+}
+
+void
+store_inferior_registers (regno)
+     int regno;
+{
+  struct reg inferior_registers;
+  struct fpreg inferior_fpregisters;
+
+  RS(R0_REGNUM + 0, inferior_registers.r_r0);
+  RS(R0_REGNUM + 1, inferior_registers.r_r1);
+  RS(R0_REGNUM + 2, inferior_registers.r_r2);
+  RS(R0_REGNUM + 3, inferior_registers.r_r3);
+  RS(R0_REGNUM + 4, inferior_registers.r_r4);
+  RS(R0_REGNUM + 5, inferior_registers.r_r5);
+  RS(R0_REGNUM + 6, inferior_registers.r_r6);
+  RS(R0_REGNUM + 7, inferior_registers.r_r7);
+
+  RS(SP_REGNUM	  , inferior_registers.r_sp);
+  RS(FP_REGNUM	  , inferior_registers.r_fp);
+  RS(PC_REGNUM	  , inferior_registers.r_pc);
+  RS(PS_REGNUM	  , inferior_registers.r_psr);
+
+  RS(FPS_REGNUM   , inferior_fpregisters.r_fsr);
+  RS(FP0_REGNUM +0, inferior_fpregisters.r_freg[0]);
+  RS(FP0_REGNUM +2, inferior_fpregisters.r_freg[2]);
+  RS(FP0_REGNUM +4, inferior_fpregisters.r_freg[4]);
+  RS(FP0_REGNUM +6, inferior_fpregisters.r_freg[6]);
+  RS(LP0_REGNUM + 1, inferior_fpregisters.r_freg[1]);
+  RS(LP0_REGNUM + 3, inferior_fpregisters.r_freg[3]);
+  RS(LP0_REGNUM + 5, inferior_fpregisters.r_freg[5]);
+  RS(LP0_REGNUM + 7, inferior_fpregisters.r_freg[7]);
+
+  ptrace (PT_SETREGS, inferior_pid,
+	  (PTRACE_ARG3_TYPE) &inferior_registers, 0);
+  ptrace (PT_SETFPREGS, inferior_pid,
+	  (PTRACE_ARG3_TYPE) &inferior_fpregisters, 0);
+}
+
+
+/* XXX - Add this to machine/regs.h instead? */
+struct coreregs {
+  struct reg intreg;
+  struct fpreg freg;
+};
+
+/* Get registers from a core file. */
+static void
+fetch_core_registers (core_reg_sect, core_reg_size, which, reg_addr)
+     char *core_reg_sect;
+     unsigned core_reg_size;
+     int which;
+     unsigned int reg_addr;	/* Unused in this version */
+{
+  struct coreregs *core_reg;
+
+  core_reg = (struct coreregs *)core_reg_sect;
+
+  /*
+   * We have *all* registers
+   * in the first core section.
+   * Ignore which.
+   */
+
+  if (core_reg_size < sizeof(*core_reg)) {
+    fprintf_unfiltered (gdb_stderr, "Couldn't read regs from core file\n");
+    return;
+  }
+
+  /* Integer registers */
+  RF(R0_REGNUM + 0, core_reg->intreg.r_r0);
+  RF(R0_REGNUM + 1, core_reg->intreg.r_r1);
+  RF(R0_REGNUM + 2, core_reg->intreg.r_r2);
+  RF(R0_REGNUM + 3, core_reg->intreg.r_r3);
+  RF(R0_REGNUM + 4, core_reg->intreg.r_r4);
+  RF(R0_REGNUM + 5, core_reg->intreg.r_r5);
+  RF(R0_REGNUM + 6, core_reg->intreg.r_r6);
+  RF(R0_REGNUM + 7, core_reg->intreg.r_r7);
+
+  RF(SP_REGNUM	  , core_reg->intreg.r_sp);
+  RF(FP_REGNUM	  , core_reg->intreg.r_fp);
+  RF(PC_REGNUM	  , core_reg->intreg.r_pc);
+  RF(PS_REGNUM	  , core_reg->intreg.r_psr);
+
+  /* Floating point registers */
+  RF(FPS_REGNUM   , core_reg->freg.r_fsr);
+  RF(FP0_REGNUM +0, core_reg->freg.r_freg[0]);
+  RF(FP0_REGNUM +2, core_reg->freg.r_freg[2]);
+  RF(FP0_REGNUM +4, core_reg->freg.r_freg[4]);
+  RF(FP0_REGNUM +6, core_reg->freg.r_freg[6]);
+  RF(LP0_REGNUM + 1, core_reg->freg.r_freg[1]);
+  RF(LP0_REGNUM + 3, core_reg->freg.r_freg[3]);
+  RF(LP0_REGNUM + 5, core_reg->freg.r_freg[5]);
+  RF(LP0_REGNUM + 7, core_reg->freg.r_freg[7]);
+  registers_fetched ();
+}
+
+/* Register that we are able to handle ns32knbsd core file formats.
+   FIXME: is this really bfd_target_unknown_flavour? */
+
+static struct core_fns nat_core_fns =
+{
+  bfd_target_unknown_flavour,
+  fetch_core_registers,
+  NULL
+};
+
+void
+_initialize_ns32knbsd_nat ()
+{
+  add_core_fns (&nat_core_fns);
+}
+
+
+/*
+ * kernel_u_size() is not helpful on NetBSD because
+ * the "u" struct is NOT in the core dump file.
+ */
+
+#ifdef	FETCH_KCORE_REGISTERS
+/*
+ * Get registers from a kernel crash dump or live kernel.
+ * Called by kcore-nbsd.c:get_kcore_registers().
+ */
+void
+fetch_kcore_registers (pcb)
+     struct pcb *pcb;
+{
+  struct switchframe sf;
+  struct reg intreg;
+  int dummy;
+
+  /* Integer registers */
+  if (target_read_memory((CORE_ADDR)pcb->pcb_ksp, (char *)&sf, sizeof sf))
+     error("Cannot read integer registers.");
+
+  /* We use the psr at kernel entry */
+  if (target_read_memory((CORE_ADDR)pcb->pcb_onstack, (char *)&intreg, sizeof intreg))
+     error("Cannot read processor status register.");
+
+  dummy = 0;
+  RF(R0_REGNUM + 0, dummy);
+  RF(R0_REGNUM + 1, dummy);
+  RF(R0_REGNUM + 2, dummy);
+  RF(R0_REGNUM + 3, sf.sf_r3);
+  RF(R0_REGNUM + 4, sf.sf_r4);
+  RF(R0_REGNUM + 5, sf.sf_r5);
+  RF(R0_REGNUM + 6, sf.sf_r6);
+  RF(R0_REGNUM + 7, sf.sf_r7);
+
+  dummy = pcb->pcb_kfp + 8;
+  RF(SP_REGNUM	  , dummy);
+  RF(FP_REGNUM	  , sf.sf_fp);
+  RF(PC_REGNUM	  , sf.sf_pc);
+  RF(PS_REGNUM	  , intreg.r_psr);
+
+  /* Floating point registers */
+  RF(FPS_REGNUM   , pcb->pcb_fsr);
+  RF(FP0_REGNUM +0, pcb->pcb_freg[0]);
+  RF(FP0_REGNUM +2, pcb->pcb_freg[2]);
+  RF(FP0_REGNUM +4, pcb->pcb_freg[4]);
+  RF(FP0_REGNUM +6, pcb->pcb_freg[6]);
+  RF(LP0_REGNUM + 1, pcb->pcb_freg[1]);
+  RF(LP0_REGNUM + 3, pcb->pcb_freg[3]);
+  RF(LP0_REGNUM + 5, pcb->pcb_freg[5]);
+  RF(LP0_REGNUM + 7, pcb->pcb_freg[7]);
+  registers_fetched ();
+}
+#endif	/* FETCH_KCORE_REGISTERS */
+
+void
+clear_regs()
+{
+  double zero = 0.0;
+  int null = 0;
+  
+  /* Integer registers */
+  RF(R0_REGNUM + 0, null);
+  RF(R0_REGNUM + 1, null);
+  RF(R0_REGNUM + 2, null);
+  RF(R0_REGNUM + 3, null);
+  RF(R0_REGNUM + 4, null);
+  RF(R0_REGNUM + 5, null);
+  RF(R0_REGNUM + 6, null);
+  RF(R0_REGNUM + 7, null);
+
+  RF(SP_REGNUM	  , null);
+  RF(FP_REGNUM	  , null);
+  RF(PC_REGNUM	  , null);
+  RF(PS_REGNUM	  , null);
+
+  /* Floating point registers */
+  RF(FPS_REGNUM   , zero);
+  RF(FP0_REGNUM +0, zero);
+  RF(FP0_REGNUM +2, zero);
+  RF(FP0_REGNUM +4, zero);
+  RF(FP0_REGNUM +6, zero);
+  RF(LP0_REGNUM + 0, zero);
+  RF(LP0_REGNUM + 1, zero);
+  RF(LP0_REGNUM + 2, zero);
+  RF(LP0_REGNUM + 3, zero);
+  return;
+}
+
+/* Return number of args passed to a frame.
+   Can return -1, meaning no way to tell. */
+
+int
+frame_num_args(fi)
+struct frame_info *fi;
+{
+	CORE_ADDR	enter_addr;
+	CORE_ADDR	argp;
+	int		inst;
+	int		args;
+	int		i;
+
+	if (read_memory_integer (fi->frame, 4) == 0 && fi->pc < 0x10000) {
+		/* main is always called with three args */
+		return(3);
+	}
+	enter_addr = ns32k_get_enter_addr(fi->pc);
+	if (enter_addr = 0)
+		return(-1);
+	argp = enter_addr == 1 ? SAVED_PC_AFTER_CALL(fi) : FRAME_SAVED_PC(fi);
+	for (i = 0; i < 16; i++) {
+		/*
+		 * After a bsr gcc may emit the following instructions
+		 * to remove the arguments from the stack:
+		 *   cmpqd 0,tos 	- to remove 4 bytes from the stack
+		 *   cmpd tos,tos	- to remove 8 bytes from the stack
+		 *   adjsp[bwd] -n	- to remove n bytes from the stack
+		 * Gcc sometimes delays emitting these instructions and
+		 * may even throw a branch between our feet.
+		 */		 
+		inst = read_memory_integer(argp    , 4);
+		args = read_memory_integer(argp + 2, 4);
+		if ((inst & 0xff) == 0xea) {		/* br */
+			args = ((inst >> 8) & 0xffffff) | (args << 24);
+			if (args & 0x80) {
+				if (args & 0x40) {
+					args = ntohl(args);
+				} else {
+					args = ntohs(args & 0xffff);
+					if (args & 0x2000)
+						args |= 0xc000;
+				}
+			} else {
+				args = args & 0xff;
+				if (args & 0x40)
+					args |= 0x80;
+			}
+			argp += args;
+			continue;
+		}
+		if ((inst & 0xffff) == 0xb81f)		/* cmpqd 0,tos */
+			return(1);
+		else if ((inst & 0xffff) == 0xbdc7)	/* cmpd tos,tos */
+			return(2);
+		else if ((inst & 0xfffc) == 0xa57c) {	/* adjsp[bwd] */
+			switch (inst & 3) {
+			case 0:
+				args = ((args & 0xff) + 0x80);
+				break;
+			case 1:
+				args = ((ntohs(args) & 0xffff) + 0x8000);
+				break;
+			case 3:
+				args = -ntohl(args);
+				break;
+			default:
+				return(-1);
+			}
+			if (args / 4 > 10 || (args & 3) != 0)
+				continue;
+			return(args / 4);
+		}
+		argp += 1;
+	}
+	return(-1);
+}
diff --git a/gnu/usr.bin/binutils/gdb/sparcnbsd-nat.c b/gnu/usr.bin/binutils/gdb/sparcnbsd-nat.c
new file mode 100644
index 00000000000..8c3b48e8edf
--- /dev/null
+++ b/gnu/usr.bin/binutils/gdb/sparcnbsd-nat.c
@@ -0,0 +1,408 @@
+/* Functions specific to running gdb native on a SPARC running NetBSD
+   Copyright 1989, 1992, 1993, 1994, 1996 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
+
+#include <sys/types.h>
+#include <sys/ptrace.h>
+#include <machine/reg.h>
+#include <machine/frame.h>
+#include <machine/pcb.h>
+
+#include "defs.h"
+#include "inferior.h"
+#include "target.h"
+#include "gdbcore.h"
+
+/* We don't store all registers immediately when requested, since they
+   get sent over in large chunks anyway.  Instead, we accumulate most
+   of the changes and send them over once.  "deferred_stores" keeps
+   track of which sets of registers we have locally-changed copies of,
+   so we only need send the groups that have changed.  */
+
+#define	INT_REGS	1
+#define	STACK_REGS	2
+#define	FP_REGS		4
+
+/* Fetch one or more registers from the inferior.  REGNO == -1 to get
+   them all.  We actually fetch more than requested, when convenient,
+   marking them as valid so we won't fetch them again.  */
+
+void
+fetch_inferior_registers (regno)
+     int regno;
+{
+  struct reg inferior_registers;
+  struct fpreg inferior_fp_registers;
+  int save_g0;
+  int i;
+
+  /* We should never be called with deferred stores, because a prerequisite
+     for writing regs is to have fetched them all (PREPARE_TO_STORE), sigh.  */
+  if (deferred_stores) abort();
+
+  DO_DEFERRED_STORES;
+
+  /* Global and Out regs are fetched directly, as well as the control
+     registers.  If we're getting one of the in or local regs,
+     and the stack pointer has not yet been fetched,
+     we have to do that first, since they're found in memory relative
+     to the stack pointer.  */
+  if (regno < O7_REGNUM  /* including -1 */
+      || regno >= Y_REGNUM
+      || (!register_valid[SP_REGNUM] && regno < I7_REGNUM))
+    {
+      if (0 != ptrace (PT_GETREGS, inferior_pid,
+		       (PTRACE_ARG3_TYPE) &inferior_registers, 0))
+	perror("ptrace_getregs");
+
+      /* Copy them (in order shown in reg.h) */
+      memcpy (&registers[REGISTER_BYTE (G0_REGNUM)],
+	      &inferior_registers.r_global[0],
+	      sizeof(inferior_registers.r_global));
+      memcpy (&registers[REGISTER_BYTE (O0_REGNUM)],
+	      &inferior_registers.r_out[0],
+	      sizeof(inferior_registers.r_out));
+      *(int *)&registers[REGISTER_BYTE (PS_REGNUM)] =
+	inferior_registers.r_psr;
+      *(int *)&registers[REGISTER_BYTE (PC_REGNUM)] =
+	inferior_registers.r_pc;
+      *(int *)&registers[REGISTER_BYTE (NPC_REGNUM)] =
+	inferior_registers.r_npc;
+      *(int *)&registers[REGISTER_BYTE (Y_REGNUM)] =
+	inferior_registers.r_y;
+
+      /*
+       * Note that the G0 slot actually carries the
+       * value of the %wim register, and G0 is zero.
+       */
+      *(int *)&registers[REGISTER_BYTE(WIM_REGNUM)] =
+        *(int *)&registers[REGISTER_BYTE(G0_REGNUM)];
+      *(int *)&registers[REGISTER_BYTE(G0_REGNUM)] = 0;
+
+      /* Mark what is valid (not the %i regs). */
+      for (i = G0_REGNUM; i <= O7_REGNUM; i++)
+	register_valid[i] = 1;
+      register_valid[PS_REGNUM] = 1;
+      register_valid[PC_REGNUM] = 1;
+      register_valid[NPC_REGNUM] = 1;
+      register_valid[Y_REGNUM] = 1;
+      register_valid[WIM_REGNUM] = 1;
+
+      /* If we don't set these valid, read_register_bytes() rereads
+	 all the regs every time it is called!  FIXME.  */
+      register_valid[TBR_REGNUM] = 1;	/* Not true yet, FIXME */
+      register_valid[CPS_REGNUM] = 1;	/* Not true yet, FIXME */
+    }
+
+  /* Floating point registers */
+  if (regno == -1 || regno == FPS_REGNUM ||
+      (regno >= FP0_REGNUM && regno <= FP0_REGNUM + 31))
+    {
+      if (0 != ptrace (PT_GETFPREGS, inferior_pid,
+		       (PTRACE_ARG3_TYPE) &inferior_fp_registers,
+		       0))
+	perror("ptrace_getfpregs");
+      memcpy (&registers[REGISTER_BYTE (FP0_REGNUM)],
+	      &inferior_fp_registers.fr_regs[0],
+	      sizeof (inferior_fp_registers.fr_regs));
+      memcpy (&registers[REGISTER_BYTE (FPS_REGNUM)],
+	      &inferior_fp_registers.fr_fsr,
+	      sizeof (inferior_fp_registers.fr_fsr));
+      for (i = FP0_REGNUM; i <= FP0_REGNUM+31; i++)
+	register_valid[i] = 1;
+      register_valid[FPS_REGNUM] = 1;
+    }
+
+  /* These regs are saved on the stack by the kernel.  Only read them
+     all (16 ptrace calls!) if we really need them.  */
+  if (regno == -1)
+    {
+      target_xfer_memory (*(CORE_ADDR*)&registers[REGISTER_BYTE (SP_REGNUM)],
+		          &registers[REGISTER_BYTE (L0_REGNUM)],
+			  16*REGISTER_RAW_SIZE (L0_REGNUM), 0);
+      for (i = L0_REGNUM; i <= I7_REGNUM; i++)
+	register_valid[i] = 1;
+    }
+  else if (regno >= L0_REGNUM && regno <= I7_REGNUM)
+    {
+      CORE_ADDR sp = *(CORE_ADDR*)&registers[REGISTER_BYTE (SP_REGNUM)];
+      i = REGISTER_BYTE (regno);
+      if (register_valid[regno])
+	printf_unfiltered("register %d valid and read\n", regno);
+      target_xfer_memory (sp + i - REGISTER_BYTE (L0_REGNUM),
+			  &registers[i], REGISTER_RAW_SIZE (regno), 0);
+      register_valid[regno] = 1;
+    }
+}
+
+/* Store our register values back into the inferior.
+   If REGNO is -1, do this for all registers.
+   Otherwise, REGNO specifies which register (so we can save time).  */
+
+void
+store_inferior_registers (regno)
+     int regno;
+{
+  struct reg inferior_registers;
+  struct fpreg inferior_fp_registers;
+  int wanna_store = INT_REGS + STACK_REGS + FP_REGS;
+  int save_g0;
+
+  /* First decide which pieces of machine-state we need to modify.  
+     Default for regno == -1 case is all pieces.  */
+  if (regno >= 0)
+    if (FP0_REGNUM <= regno && regno < FP0_REGNUM + 32)
+      {
+	wanna_store = FP_REGS;
+      }
+    else 
+      {
+	if (regno == SP_REGNUM)
+	  wanna_store = INT_REGS + STACK_REGS;
+	else if (regno < L0_REGNUM || regno > I7_REGNUM)
+	  wanna_store = INT_REGS;
+	else if (regno == FPS_REGNUM)
+	  wanna_store = FP_REGS;
+	else
+	  wanna_store = STACK_REGS;
+      }
+
+  /* See if we're forcing the stores to happen now, or deferring. */
+  if (regno == -2)
+    {
+      wanna_store = deferred_stores;
+      deferred_stores = 0;
+    }
+  else
+    {
+      if (wanna_store == STACK_REGS)
+	{
+	  /* Fall through and just store one stack reg.  If we deferred
+	     it, we'd have to store them all, or remember more info.  */
+	}
+      else
+	{
+	  deferred_stores |= wanna_store;
+	  return;
+	}
+    }
+
+  if (wanna_store & STACK_REGS)
+    {
+      CORE_ADDR sp = *(CORE_ADDR *)&registers[REGISTER_BYTE (SP_REGNUM)];
+
+      if (regno < 0 || regno == SP_REGNUM)
+	{
+	  if (!register_valid[L0_REGNUM+5]) abort();
+	  target_xfer_memory (sp, 
+			      &registers[REGISTER_BYTE (L0_REGNUM)],
+			      16*REGISTER_RAW_SIZE (L0_REGNUM), 1);
+	}
+      else
+	{
+	  if (!register_valid[regno]) abort();
+	  target_xfer_memory ((sp + REGISTER_BYTE (regno) -
+			       REGISTER_BYTE (L0_REGNUM)),
+			      &registers[REGISTER_BYTE (regno)],
+			      REGISTER_RAW_SIZE (regno), 1);
+	}
+	
+    }
+
+  if (wanna_store & INT_REGS)
+    {
+      if (!register_valid[G1_REGNUM]) abort();
+
+      /* The G0 slot really holds %wim (leave it alone). */
+      save_g0 = inferior_registers.r_global[0];
+      memcpy (&inferior_registers.r_global[0],
+	      &registers[REGISTER_BYTE (G0_REGNUM)],
+	      sizeof(inferior_registers.r_global));
+      inferior_registers.r_global[0] = save_g0;
+      memcpy (&inferior_registers.r_out[0],
+	      &registers[REGISTER_BYTE (O0_REGNUM)],
+	      sizeof(inferior_registers.r_out));
+
+      inferior_registers.r_psr =
+	*(int *)&registers[REGISTER_BYTE (PS_REGNUM)];
+      inferior_registers.r_pc =
+	*(int *)&registers[REGISTER_BYTE (PC_REGNUM)];
+      inferior_registers.r_npc =
+	*(int *)&registers[REGISTER_BYTE (NPC_REGNUM)];
+      inferior_registers.r_y =
+	*(int *)&registers[REGISTER_BYTE (Y_REGNUM)];
+
+      if (0 != ptrace (PT_SETREGS, inferior_pid,
+		       (PTRACE_ARG3_TYPE) &inferior_registers, 0))
+	perror("ptrace_setregs");
+    }
+
+  if (wanna_store & FP_REGS)
+    {
+      if (!register_valid[FP0_REGNUM+9]) abort();
+      memcpy (&inferior_fp_registers.fr_regs[0],
+	      &registers[REGISTER_BYTE (FP0_REGNUM)],
+	      sizeof(inferior_fp_registers.fr_regs));
+      memcpy (&inferior_fp_registers.fr_fsr, 
+	      &registers[REGISTER_BYTE (FPS_REGNUM)],
+	      sizeof(inferior_fp_registers.fr_fsr));
+      if (0 !=
+	 ptrace (PT_SETFPREGS, inferior_pid,
+		 (PTRACE_ARG3_TYPE) &inferior_fp_registers, 0))
+	 perror("ptrace_setfpregs");
+    }
+}
+
+
+static void
+fetch_core_registers (core_reg_sect, core_reg_size, which, reg_addr)
+     char *core_reg_sect;
+     unsigned core_reg_size;
+     int which;
+     unsigned int reg_addr;	/* Unused in this version */
+{
+  struct md_coredump *core_reg;
+  struct trapframe *tf;
+  struct fpstate *fs;
+
+  core_reg = (struct md_coredump *)core_reg_sect;
+  tf = &core_reg->md_tf;
+  fs = &core_reg->md_fpstate;
+
+  /* We get everything from the .reg section. */
+  if (which != 0)
+    return;
+
+  if (core_reg_size < sizeof(*core_reg)) {
+    fprintf_unfiltered (gdb_stderr, "Couldn't read regs from core file\n");
+    return;
+  }
+
+  /* Integer registers */
+  memcpy(&registers[REGISTER_BYTE (G0_REGNUM)],
+	 &tf->tf_global[0], sizeof(tf->tf_global));
+  memcpy(&registers[REGISTER_BYTE (O0_REGNUM)],
+	 &tf->tf_out[0], sizeof(tf->tf_out));
+  *(int *)&registers[REGISTER_BYTE (PS_REGNUM)]  = tf->tf_psr;
+  *(int *)&registers[REGISTER_BYTE (PC_REGNUM)]  = tf->tf_pc;
+  *(int *)&registers[REGISTER_BYTE (NPC_REGNUM)] = tf->tf_npc;
+  *(int *)&registers[REGISTER_BYTE (Y_REGNUM)]   = tf->tf_y;
+
+  /* Clear out the G0 slot (see reg.h) */
+  *(int *)&registers[REGISTER_BYTE(G0_REGNUM)] = 0;
+
+  /* My best guess at where to get the locals and input
+     registers is exactly where they usually are, right above
+     the stack pointer.  If the core dump was caused by a bus error
+     from blowing away the stack pointer (as is possible) then this
+     won't work, but it's worth the try. */
+  {
+    int sp;
+
+    sp = *(int *)&registers[REGISTER_BYTE (SP_REGNUM)];
+    if (0 != target_read_memory (sp, &registers[REGISTER_BYTE (L0_REGNUM)], 
+				 16 * REGISTER_RAW_SIZE (L0_REGNUM)))
+      {
+	/* fprintf_unfiltered so user can still use gdb */
+	fprintf_unfiltered (gdb_stderr,
+		"Couldn't read input and local registers from core file\n");
+      }
+  }
+
+  /* Floating point registers */
+  memcpy (&registers[REGISTER_BYTE (FP0_REGNUM)],
+	  &fs->fs_regs[0], sizeof (fs->fs_regs));
+  memcpy (&registers[REGISTER_BYTE (FPS_REGNUM)],
+	  &fs->fs_fsr,	sizeof (fs->fs_fsr));
+
+  registers_fetched ();
+}
+
+/* Register that we are able to handle sparcnbsd core file formats.
+   FIXME: is this really bfd_target_unknown_flavour? */
+
+static struct core_fns nat_core_fns =
+{
+  bfd_target_unknown_flavour,
+  fetch_core_registers,
+  NULL
+};
+
+void
+_initialize_sparcnbsd_nat ()
+{
+  add_core_fns (&nat_core_fns);
+}
+
+
+/*
+ * kernel_u_size() is not helpful on NetBSD because
+ * the "u" struct is NOT in the core dump file.
+ */
+
+#ifdef	FETCH_KCORE_REGISTERS
+/*
+ * Get registers from a kernel crash dump or live kernel.
+ * Called by kcore-nbsd.c:get_kcore_registers().
+ */
+void
+fetch_kcore_registers (pcb)
+     struct pcb *pcb;
+{
+  struct rwindow win;
+  int i;
+  u_long sp;
+
+  /* We only do integer registers */
+  sp = pcb->pcb_sp;
+
+  supply_register(SP_REGNUM, (char *)&pcb->pcb_sp);
+  supply_register(PC_REGNUM, (char *)&pcb->pcb_pc);
+  supply_register(O7_REGNUM, (char *)&pcb->pcb_pc);
+  supply_register(PS_REGNUM, (char *)&pcb->pcb_psr);
+  supply_register(WIM_REGNUM, (char *)&pcb->pcb_wim);
+  /*
+   * Read last register window saved on stack.
+   */
+  if (target_read_memory(sp, (char *)&win, sizeof win)) {
+    printf("cannot read register window at sp=%x\n", pcb->pcb_sp);
+    bzero((char *)&win, sizeof win);
+  }
+  for (i = 0; i < sizeof(win.rw_local); ++i)
+    supply_register(i + L0_REGNUM, (char *)&win.rw_local[i]);
+  for (i = 0; i < sizeof(win.rw_in); ++i)
+    supply_register(i + I0_REGNUM, (char *)&win.rw_in[i]);
+  /*
+   * read the globals & outs saved on the stack (for a trap frame).
+   */
+  sp += 92 + 12; /* XXX - MINFRAME + R_Y */
+  for (i = 1; i < 14; ++i) {
+    u_long val;
+    
+    if (target_read_memory(sp + i*4, (char *)&val, sizeof val) == 0)
+      supply_register(i, (char *)&val);
+  }
+#if 0
+  if (kvread(pcb.pcb_cpctxp, &cps) == 0)
+    supply_register(CPS_REGNUM, (char *)&cps);
+#endif
+
+  /* The kernel does not use the FPU, so ignore it. */
+  registers_fetched ();
+}
+#endif	/* FETCH_KCORE_REGISTERS */