Provide IRIX-compatible get_fpc_csr() and set_fpc_csr() for mips, although

we don't provide the silly union to decompose the value. This will allow
userland to flip the ``flush denormalized to zero'' setting, which apparently
is being relied upon by tcl.

Asked by jasper@ a long time ago. Riding upon the upcoming libc major crank.

2 files changed, 46 insertions, 2 deletions

diff --git a/lib/libc/arch/mips64/gen/Makefile.inc b/lib/libc/arch/mips64/gen/Makefile.inc
index d1e0a54c66d..296154bc164 100644
--- a/lib/libc/arch/mips64/gen/Makefile.inc
+++ b/lib/libc/arch/mips64/gen/Makefile.inc
@@ -1,10 +1,10 @@
-#	$OpenBSD: Makefile.inc,v 1.8 2009/09/27 18:20:13 miod Exp $
+#	$OpenBSD: Makefile.inc,v 1.9 2010/09/24 13:54:06 miod Exp $
 
 SRCS+=	_setjmp.S fabs.S infinity.c ldexp.S modf.S nan.c
 SRCS+=	flt_rounds.c fpgetmask.c fpgetround.c fpgetsticky.c fpsetmask.c \
 	fpsetround.c fpsetsticky.c
 SRCS+=	fpclassifyl.c isfinitel.c isinfl.c isnanl.c isnormall.c signbitl.c
 SRCS+=	setjmp.S sigsetjmp.S
-SRCS+=	cacheflush.c
+SRCS+=	cacheflush.c fpc_csr.c
 
 SRCS+=	alloca.c
diff --git a/lib/libc/arch/mips64/gen/fpc_csr.c b/lib/libc/arch/mips64/gen/fpc_csr.c
new file mode 100644
index 00000000000..636554aba41
--- /dev/null
+++ b/lib/libc/arch/mips64/gen/fpc_csr.c
@@ -0,0 +1,44 @@
+/*	$OpenBSD: fpc_csr.c,v 1.1 2010/09/24 13:54:06 miod Exp $	*/
+
+/*
+ * Copyright (c) 2010 Miodrag Vallat.
+ *
+ * Permission to use, copy, modify, and distribute this software for any
+ * purpose with or without fee is hereby granted, provided that the above
+ * copyright notice and this permission notice appear in all copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ */
+
+/*
+ * IRIX-compatible get_fpc_csr() and set_fpc_csr() functions
+ */
+
+#include <sys/types.h>
+#include <machine/fpu.h>
+
+int
+get_fpc_csr()
+{
+	int32_t csr;
+
+	__asm__("cfc1 %0,$31" : "=r" (csr));
+	return csr;
+}
+
+int
+set_fpc_csr(int csr)
+{
+	int32_t oldcsr;
+
+	__asm__("cfc1 %0,$31" : "=r" (oldcsr));
+	__asm__("ctc1 %0,$31" :: "r" (csr));
+
+	return oldcsr;
+}