Provide crypto_cpu_caps_init() for i386.

This is the same CPU capabilities code that is now used for amd64. Like
amd64 we now only populate OPENSSL_ia32cap_P with bits used by perlasm.

Discussed with tb@

3 files changed, 120 insertions, 10 deletions

diff --git a/lib/libcrypto/arch/i386/Makefile.inc b/lib/libcrypto/arch/i386/Makefile.inc
index eeaed44f844..21013047032 100644
--- a/lib/libcrypto/arch/i386/Makefile.inc
+++ b/lib/libcrypto/arch/i386/Makefile.inc
@@ -1,10 +1,12 @@
-# $OpenBSD: Makefile.inc,v 1.25 2024/08/11 13:02:39 jsing Exp $
+# $OpenBSD: Makefile.inc,v 1.26 2024/10/18 14:44:02 jsing Exp $
 
 # i386-specific libcrypto build rules
 
 # all i386 code generators use these
 EXTRA_PL =  ${LCRYPTO_SRC}/perlasm/x86gas.pl ${LCRYPTO_SRC}/perlasm/x86asm.pl
 
+SRCS += crypto_cpu_caps.c
+
 # aes
 CFLAGS+= -DAES_ASM
 SSLASM+= aes aes-586
@@ -41,11 +43,3 @@ ${f}.S: ${LCRYPTO_SRC}/${dir}/asm/${f}.pl ${EXTRA_PL}
 		${LCRYPTO_SRC}/${dir}/asm/${f}.pl \
 		    openbsd-elf ${CFLAGS} 386 ${PICFLAG} > ${.TARGET}
 .endfor
-
-CFLAGS+= -DOPENSSL_CPUID_OBJ
-SRCS+=	x86cpuid.S
-GENERATED+=x86cpuid.S
-
-x86cpuid.S: ${LCRYPTO_SRC}/x86cpuid.pl ${EXTRA_PL}
-	/usr/bin/perl -I${LCRYPTO_SRC}/perlasm ${LCRYPTO_SRC}/x86cpuid.pl \
-		openbsd-elf ${CFLAGS} 386 ${PICFLAG} > ${.TARGET}
diff --git a/lib/libcrypto/arch/i386/crypto_arch.h b/lib/libcrypto/arch/i386/crypto_arch.h
index 8e91c255291..d566d8064a2 100644
--- a/lib/libcrypto/arch/i386/crypto_arch.h
+++ b/lib/libcrypto/arch/i386/crypto_arch.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: crypto_arch.h,v 1.1 2024/08/11 13:02:39 jsing Exp $ */
+/*	$OpenBSD: crypto_arch.h,v 1.2 2024/10/18 14:44:02 jsing Exp $ */
 /*
  * Copyright (c) 2024 Joel Sing <jsing@openbsd.org>
  *
@@ -18,6 +18,8 @@
 #ifndef HEADER_CRYPTO_ARCH_H
 #define HEADER_CRYPTO_ARCH_H
 
+#define HAVE_CRYPTO_CPU_CAPS_INIT
+
 #ifndef OPENSSL_NO_ASM
 
 #define HAVE_AES_CBC_ENCRYPT_INTERNAL
diff --git a/lib/libcrypto/arch/i386/crypto_cpu_caps.c b/lib/libcrypto/arch/i386/crypto_cpu_caps.c
new file mode 100644
index 00000000000..e5b36a15cc1
--- /dev/null
+++ b/lib/libcrypto/arch/i386/crypto_cpu_caps.c
@@ -0,0 +1,114 @@
+/*	$OpenBSD: crypto_cpu_caps.c,v 1.1 2024/10/18 14:44:02 jsing Exp $ */
+/*
+ * Copyright (c) 2024 Joel Sing <jsing@openbsd.org>
+ *
+ * Permission to use, copy, modify, and distribute this software for any
+ * purpose with or without fee is hereby granted, provided that the above
+ * copyright notice and this permission notice appear in all copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ */
+
+#include <stdio.h>
+
+#include <openssl/crypto.h>
+
+#include "x86_arch.h"
+
+/* Legacy architecture specific capabilities, used by perlasm. */
+extern uint64_t OPENSSL_ia32cap_P;
+
+/* Machine independent CPU capabilities. */
+extern uint64_t crypto_cpu_caps;
+
+static inline void
+cpuid(uint32_t eax, uint32_t *out_eax, uint32_t *out_ebx, uint32_t *out_ecx,
+    uint32_t *out_edx)
+{
+	uint32_t ebx = 0, ecx = 0, edx = 0;
+
+#ifndef OPENSSL_NO_ASM
+	__asm__ ("cpuid": "+a"(eax), "+b"(ebx), "+c"(ecx), "+d"(edx));
+#else
+	eax = 0;
+#endif
+
+	if (out_eax != NULL)
+		*out_eax = eax;
+	if (out_ebx != NULL)
+		*out_ebx = ebx;
+	if (out_ebx != NULL)
+		*out_ecx = ecx;
+	if (out_edx != NULL)
+		*out_edx = edx;
+}
+
+static inline void
+xgetbv(uint32_t ecx, uint32_t *out_eax, uint32_t *out_edx)
+{
+	uint32_t eax = 0, edx = 0;
+
+#ifndef OPENSSL_NO_ASM
+	__asm__ ("xgetbv": "+a"(eax), "+c"(ecx), "+d"(edx));
+#endif
+
+	if (out_eax != NULL)
+		*out_eax = eax;
+	if (out_edx != NULL)
+		*out_edx = edx;
+}
+
+void
+crypto_cpu_caps_init(void)
+{
+	uint32_t eax, ebx, ecx, edx;
+	uint64_t caps = 0;
+
+	cpuid(0, &eax, &ebx, &ecx, &edx);
+
+	/* "GenuineIntel" in little endian. */
+	if (ebx == 0x756e6547 && edx == 0x49656e69 && ecx == 0x6c65746e)
+		caps |= CPUCAP_MASK_INTEL;
+
+	if (eax < 1)
+		return;
+
+	cpuid(1, &eax, &ebx, &ecx, &edx);
+
+	if ((edx & IA32CAP_MASK0_FXSR) != 0)
+		caps |= CPUCAP_MASK_FXSR;
+	if ((edx & IA32CAP_MASK0_HT) != 0)
+		caps |= CPUCAP_MASK_HT;
+	if ((edx & IA32CAP_MASK0_MMX) != 0)
+		caps |= CPUCAP_MASK_MMX;
+	if ((edx & IA32CAP_MASK0_SSE) != 0)
+		caps |= CPUCAP_MASK_SSE;
+	if ((edx & IA32CAP_MASK0_SSE2) != 0)
+		caps |= CPUCAP_MASK_SSE2;
+
+	if ((ecx & IA32CAP_MASK1_AESNI) != 0)
+		caps |= CPUCAP_MASK_AESNI;
+	if ((ecx & IA32CAP_MASK1_PCLMUL) != 0)
+		caps |= CPUCAP_MASK_PCLMUL;
+	if ((ecx & IA32CAP_MASK1_SSSE3) != 0)
+		caps |= CPUCAP_MASK_SSSE3;
+
+	/* AVX requires OSXSAVE and XMM/YMM state to be enabled. */
+	if ((ecx & IA32CAP_MASK1_OSXSAVE) != 0) {
+		xgetbv(0, &eax, NULL);
+		if (((eax >> 1) & 3) == 3 && (ecx & IA32CAP_MASK1_AVX) != 0)
+			caps |= CPUCAP_MASK_AVX;
+	}
+
+	/* Set machine independent CPU capabilities. */
+	if ((caps & CPUCAP_MASK_AESNI) != 0)
+		crypto_cpu_caps |= CRYPTO_CPU_CAPS_ACCELERATED_AES;
+
+	OPENSSL_ia32cap_P = caps;
+}