summaryrefslogtreecommitdiff
path: root/libexec
diff options
context:
space:
mode:
authorTheo de Raadt <deraadt@cvs.openbsd.org>2020-03-13 09:31:27 +0000
committerTheo de Raadt <deraadt@cvs.openbsd.org>2020-03-13 09:31:27 +0000
commit3dd873d5712775c0f8f07378b93f5270bf0f4ef6 (patch)
treeedf42e35ea95c1842f599ffebbfefc2096aa2d82 /libexec
parent87f4e84920fae5bab9dcc347f162a069b18ace3b (diff)
Anthony Steinhauser reports that 32-bit arm cpus have the same speculation
problems as 64-bit models. To resolve the syscall speculation, as a first step "nop; nop" was added after all occurances of the syscall ("swi 0") instruction. Then the kernel was changed to jump over the 2 extra instructions. In this final step, those pair of nops are converted into the speculation-blocking sequence ("dsb nsh; isb"). Don't try to build through these multiple steps, use a snapshot instead. Packages matching the new ABI will be out in a while... ok kettenis
Diffstat (limited to 'libexec')
-rw-r--r--libexec/ld.so/arm/SYS.h6
-rw-r--r--libexec/ld.so/arm/rtld_machine.c4
2 files changed, 5 insertions, 5 deletions
diff --git a/libexec/ld.so/arm/SYS.h b/libexec/ld.so/arm/SYS.h
index 2147c2a81c5..1e86515631a 100644
--- a/libexec/ld.so/arm/SYS.h
+++ b/libexec/ld.so/arm/SYS.h
@@ -1,4 +1,4 @@
-/* $OpenBSD: SYS.h,v 1.2 2020/03/11 12:53:21 deraadt Exp $ */
+/* $OpenBSD: SYS.h,v 1.3 2020/03/13 09:31:26 deraadt Exp $ */
/*
* Copyright (c) 2004 Dale Rahn
@@ -32,8 +32,8 @@
#define SYSTRAP(x) \
ldr r12, =SYS_ ## x; \
swi 0; \
- nop; \
- nop
+ dsb nsh; \
+ isb
#define DL_SYSCALL(n) \
.global __CONCAT(_dl_,n) ;\
diff --git a/libexec/ld.so/arm/rtld_machine.c b/libexec/ld.so/arm/rtld_machine.c
index db20e9507ae..6df418b20ea 100644
--- a/libexec/ld.so/arm/rtld_machine.c
+++ b/libexec/ld.so/arm/rtld_machine.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: rtld_machine.c,v 1.40 2020/03/13 06:38:55 deraadt Exp $ */
+/* $OpenBSD: rtld_machine.c,v 1.41 2020/03/13 09:31:26 deraadt Exp $ */
/*
* Copyright (c) 2004 Dale Rahn
@@ -364,7 +364,7 @@ _dl_bind(elf_object_t *object, int relidx)
register long arg3 __asm("r2") = 0xffffffff & cookie;
register long arg4 __asm("r3") = 0xffffffff & (cookie >> 32);
- __asm volatile("swi 0; nop; nop" : "+r" (arg1), "+r" (arg2)
+ __asm volatile("swi 0; dsb nsh; isb" : "+r" (arg1), "+r" (arg2)
: "r" (syscall_num), "r" (arg3), "r" (arg4)
: "cc", "memory");
}