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authorAlexander Yurchenko <grange@cvs.openbsd.org>2004-05-06 19:51:01 +0000
committerAlexander Yurchenko <grange@cvs.openbsd.org>2004-05-06 19:51:01 +0000
commitf406e152ab8e6eac41423243782ad599b1770138 (patch)
treee82d716e80d827787dd1a8d3b26592762fa713fb /share/man/man4/man4.i386/ichpcib.4
parent740998164a53196421e9fdbc91ae3a56e2d89761 (diff)
ichpcib(4) man page; with help from jmc@
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+.\" $OpenBSD: ichpcib.4,v 1.1 2004/05/06 19:51:00 grange Exp $
+.\"
+.\" Copyright (c) 2004 Alexander Yurchenko <grange@openbsd.org>
+.\"
+.\" Permission to use, copy, modify, and distribute this software for any
+.\" purpose with or without fee is hereby granted, provided that the above
+.\" copyright notice and this permission notice appear in all copies.
+.\"
+.\" THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+.\" WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+.\" MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+.\" ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+.\" WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+.\" ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+.\" OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+.\"
+.Dd March 31, 2004
+.Dt ICHPCIB 4
+.Os
+.Sh NAME
+.Nm ichpcib
+.Nd Intel ICHx/ICHx-M LPC bridges
+.Sh SYNOPSIS
+.Cd "ichpcib* at pci? dev ? function ?"
+.Cd "isa* at ichpcib?"
+.Sh DESCRIPTION
+The
+.Nm
+driver supports Intel
+.Tn ICH ,
+.Tn ICH0 ,
+.Tn ICH2 ,
+.Tn ICH2-M ,
+.Tn ICH3-S ,
+.Tn ICH3-M ,
+.Tn ICH4 ,
+.Tn ICH4-M ,
+and
+.Tn ICH-5
+LPC bridges.
+These devices are mostly usual
+.Tn PCI-ISA
+bridges but with some additional power management and monitoring
+capabilities.
+Besides the core
+.Xr pcib 4
+functionality, the
+.Nm
+driver provides support for the Intel SpeedStep technology, available
+for the
+.Tn ICH2-M ,
+.Tn ICH3-M ,
+and
+.Tn ICH4-M
+chipsets.
+It allows the user to control CPU frequency with the
+.Xr sysctl 8
+program.
+.Sh SEE ALSO
+.Xr cpu 4 ,
+.Xr intro 4 ,
+.Xr isa 4 ,
+.Xr pci 4 ,
+.Xr pcib 4 ,
+.Xr sysctl 8
+.Sh HISTORY
+Intel SpeedStep support for the ICHx-M chipsets first appeared in
+.Ox 3.5
+as part of the
+.Xr pcib 4
+driver.
+The
+.Nm
+driver first appeared in
+.Ox 3.6 .
+.Sh AUTHORS
+The
+.Nm
+driver was written by
+.An Alexander Yurchenko Aq grange@openbsd.org .
+.Sh CAVEATS
+On some old machines with the
+.Tn ICH2-M
+chipset, Intel SpeedStep isn't available.