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authorJason McIntyre <jmc@cvs.openbsd.org>2007-04-26 13:27:58 +0000
committerJason McIntyre <jmc@cvs.openbsd.org>2007-04-26 13:27:58 +0000
commit93c5de0884960f25532c07ea090011e8c80ccad6 (patch)
tree0fe4c8f52cafcc269337e09ca18d79189fad01e4 /share/man/man4/man4.i386
parent3012880dbf741710fc13c957c627465c346b6aaf (diff)
tweaks;
Diffstat (limited to 'share/man/man4/man4.i386')
-rw-r--r--share/man/man4/man4.i386/piixpcib.422
1 files changed, 13 insertions, 9 deletions
diff --git a/share/man/man4/man4.i386/piixpcib.4 b/share/man/man4/man4.i386/piixpcib.4
index ca2501605c3..6f2dc18489f 100644
--- a/share/man/man4/man4.i386/piixpcib.4
+++ b/share/man/man4/man4.i386/piixpcib.4
@@ -1,4 +1,4 @@
-.\" $OpenBSD: piixpcib.4,v 1.1 2007/04/26 01:43:14 gwk Exp $
+.\" $OpenBSD: piixpcib.4,v 1.2 2007/04/26 13:27:57 jmc Exp $
.\"
.\" Copyright (c) 2007 Stefan Sperling <stsp@stsp.in-berlin.de>
.\"
@@ -31,7 +31,7 @@ driver supports Intel
and
.Tn 82440MX
PIIX4 ISA bridges.
-
+.Pp
Besides the core
.Xr pcib 4
functionality, the
@@ -46,17 +46,18 @@ The
daemon can be used to automatically control CPU frequency.
SpeedStep provides two CPU power states, low and high.
The driver will switch the CPU into low power state if the
-hw.setperf sysctl is smaller or equal 50, and into high
-power state if hw.setperf is greater 50.
+.Va hw.setperf
+sysctl is less than or equal to 50,
+and into high power state if it is greater than 50.
.Sh SEE ALSO
.Xr cpu 4 ,
+.Xr ichpcib 4 ,
.Xr intro 4 ,
.Xr isa 4 ,
.Xr pci 4 ,
.Xr pcib 4 ,
-.Xr ichpcib 4 ,
-.Xr sysctl 8 ,
-.Xr apmd 8
+.Xr apmd 8 ,
+.Xr sysctl 8
.Sh HISTORY
The
.Nm
@@ -64,10 +65,13 @@ driver first appeared in
.Ox 4.2 .
.Sh BUGS
The driver sometimes fails to update the hw.cpuspeed sysctl correctly
-after switching power state. The reason is that there seems to be
+after switching power state.
+The reason is that there seems to be
no reliable way to determine CPU frequencies corresponding to low
and high power states, so the driver has to rely on the p3_update_cpuspeed
function to dynamically determine CPU speed after switching power state.
This seems to fail occasionally, especially if interrupt load of the system
-is high. Note that this bug is purely cosmetic. Switching power state still
+is high.
+Note that this bug is purely cosmetic.
+Switching power state still
works even if the CPU speed is displayed incorrectly.