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authorMartin Pieuchot <mpi@cvs.openbsd.org>2019-12-06 09:48:03 +0000
committerMartin Pieuchot <mpi@cvs.openbsd.org>2019-12-06 09:48:03 +0000
commit523a5b34f330e6624ac11104149654f28022f7e7 (patch)
tree9d969a7fb529ef3d8557e96084636a6817ccfe4d /share/man/man4
parent8fbd7851a98a4d46db86ee5fc9e9bd80354ed999 (diff)
Retire piixpcib(4).
When PAE came back in 2015 the use of kvm86, required for SpeedStep on such machine, got disabled. So there's no loss of functionality. ok stsp@
Diffstat (limited to 'share/man/man4')
-rw-r--r--share/man/man4/man4.i386/Makefile4
-rw-r--r--share/man/man4/man4.i386/piixpcib.474
2 files changed, 2 insertions, 76 deletions
diff --git a/share/man/man4/man4.i386/Makefile b/share/man/man4/man4.i386/Makefile
index cd166d0a194..3fae7fbbe42 100644
--- a/share/man/man4/man4.i386/Makefile
+++ b/share/man/man4/man4.i386/Makefile
@@ -1,4 +1,4 @@
-# $OpenBSD: Makefile,v 1.77 2019/05/06 03:19:27 mlarkin Exp $
+# $OpenBSD: Makefile,v 1.78 2019/12/06 09:48:02 mpi Exp $
# from: @(#)Makefile 5.1 (Berkeley) 2/12/91
# Id: Makefile,v 1.4 1995/12/14 05:41:38 deraadt Exp $
@@ -6,7 +6,7 @@ MAN= amdpcib.4 amdmsr.4 apm.4 autoconf.4 bios.4 cpu.4 elansc.4 \
esm.4 geodesc.4 glxpcib.4 glxsb.4 gscpcib.4 gscpm.4 gus.4 ie.4 \
ichpcib.4 intro.4 ioapic.4 \
joy.4 le.4 lms.4 mem.4 mms.4 mpbios.4 mtrr.4 npx.4 nvram.4 \
- pas.4 pcibios.4 pctr.4 piixpcib.4 sb.4 \
+ pas.4 pcibios.4 pctr.4 sb.4 \
skgpio.4 tcpcib.4 uha.4 wds.4 wdt.4
MANSUBDIR=i386
diff --git a/share/man/man4/man4.i386/piixpcib.4 b/share/man/man4/man4.i386/piixpcib.4
deleted file mode 100644
index 631f8e6becc..00000000000
--- a/share/man/man4/man4.i386/piixpcib.4
+++ /dev/null
@@ -1,74 +0,0 @@
-.\" $OpenBSD: piixpcib.4,v 1.4 2007/10/08 12:48:21 jmc Exp $
-.\"
-.\" Copyright (c) 2007 Stefan Sperling <stsp@stsp.in-berlin.de>
-.\"
-.\" Permission to use, copy, modify, and distribute this software for any
-.\" purpose with or without fee is hereby granted, provided that the above
-.\" copyright notice and this permission notice appear in all copies.
-.\"
-.\" THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
-.\" WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
-.\" MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
-.\" ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
-.\" WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
-.\" ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
-.\" OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
-.\"
-.Dd $Mdocdate: October 8 2007 $
-.Dt PIIXPCIB 4 i386
-.Os
-.Sh NAME
-.Nm piixpcib
-.Nd Intel PIIX4 ISA bridges
-.Sh SYNOPSIS
-.Cd "piixpcib* at pci?"
-.Cd "isa* at piixpcib?"
-.Sh DESCRIPTION
-The
-.Nm
-driver supports Intel
-.Tn 82371AB
-and
-.Tn 82440MX
-PIIX4 ISA bridges.
-.Pp
-Besides the core functionality, the
-.Nm
-driver provides support for the first generation of Intel's SpeedStep
-technology present in some Pentium III CPUs.
-It allows the user to manually control CPU frequency with the
-.Xr sysctl 8
-program.
-The
-.Xr apmd 8
-daemon can be used to automatically control CPU frequency.
-SpeedStep provides two CPU power states, low and high.
-The driver will switch the CPU into low power state if the
-.Va hw.setperf
-sysctl is less than or equal to 50,
-and into high power state if it is greater than 50.
-.Sh SEE ALSO
-.Xr cpu 4 ,
-.Xr ichpcib 4 ,
-.Xr intro 4 ,
-.Xr isa 4 ,
-.Xr pci 4 ,
-.Xr apmd 8 ,
-.Xr sysctl 8
-.Sh HISTORY
-The
-.Nm
-driver first appeared in
-.Ox 4.2 .
-.Sh BUGS
-The driver sometimes fails to update the hw.cpuspeed sysctl correctly
-after switching power state.
-The reason is that there seems to be
-no reliable way to determine CPU frequencies corresponding to low
-and high power states, so the driver has to rely on the p3_update_cpuspeed
-function to dynamically determine CPU speed after switching power state.
-This seems to fail occasionally, especially if interrupt load of the system
-is high.
-Note that this bug is purely cosmetic.
-Switching power state still
-works even if the CPU speed is displayed incorrectly.