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authorKenjiro Cho <kjc@cvs.openbsd.org>2001-07-12 12:17:39 +0000
committerKenjiro Cho <kjc@cvs.openbsd.org>2001-07-12 12:17:39 +0000
commit08a794b176732cabf9162e0c611cdfb46934a16f (patch)
treefb3c6bd725c53188d1ca7d76181a82711aabebbc /share/man
parent9c3527ca1b8aed7f577f13bb0e7347b8e123da39 (diff)
add ALTQ related options.
Diffstat (limited to 'share/man')
-rw-r--r--share/man/man4/options.466
1 files changed, 65 insertions, 1 deletions
diff --git a/share/man/man4/options.4 b/share/man/man4/options.4
index d64251bf6e8..60b285a00e3 100644
--- a/share/man/man4/options.4
+++ b/share/man/man4/options.4
@@ -1,4 +1,4 @@
-.\" $OpenBSD: options.4,v 1.71 2001/07/06 09:02:54 jjbg Exp $
+.\" $OpenBSD: options.4,v 1.72 2001/07/12 12:17:38 kjc Exp $
.\" $NetBSD: options.4,v 1.21 1997/06/25 03:13:00 thorpej Exp $
.\"
.\" Copyright (c) 1998 Theo de Raadt
@@ -842,6 +842,70 @@ Enables IPComp (IP Payload Compression Protocol) support. See
and RFC 2393 for more details. Option
.Em IPSEC
is required with this option.
+.It Cd option ALTQ
+Enables ALTQ (Alternate Queueing). For simple rate-limiting, use
+.Xr tbrconfig 8
+to set up the interface transmission rate. To use queueing disciplines,
+their options should also be defined. Queueing disciplines are
+managed by
+.Xr altqd 8 .
+.It Cd option ALTQ_CBQ
+Enables ALTQ's CBQ (Class-based Queueing) module. CBQ achieves both
+partitioning and sharing of link bandwidth by hierarchically
+structured classes. Each class has its own queue and is assigned its
+share of bandwidth. A child class can borrow bandwidth from its
+parent class as long as excess bandwidth is available.
+.It Cd option ALTQ_HFSC
+Enables ALTQ's HFSC (Hierarchical Fair Service Curve) module.
+HFSC supports both link-sharing and guaranteed real-time services.
+H-FSC employs a service curve based QoS model, and its unique feature
+is an ability to decouple delay and bandwidth allocation.
+.It Cd option ALTQ_PRIQ
+Enables ALTQ's PRIQ (Priority Queueing) module.
+PRIQ implements a simple priority-based queueing. A higher priority
+class is always served first.
+.It Cd option ALTQ_WFQ
+Enables ALTQ's WFQ (Weighted Fair Queueing) module.
+WFQ implements a weighted-round robin scheduler for a set of queues.
+A weight can be assigned to each queue to give a different proportion
+of the link capacity. A hash function is used to map a flow to one of
+a set of queues.
+.It Cd option ALTQ_FIFOQ
+Enables ALTQ's FIFO queue module.
+FIFOQ is a simple drop-tail FIFO queue.
+.It Cd option ALTQ_RED
+Enables ALTQ's RED (Random Early Detection) module.
+RED is an implicit congestion notification mechanism that exercises
+packet dropping or packet marking stochastically according to the
+average queue length. RED can be viewed as an active buffer
+management mechanism and can be integrated into other queueing
+disciplines.
+.It Cd option ALTQ_RIO
+Enables ALTQ's RIO (RED with In/Oout) module.
+The original RIO has 2 sets of RED parameters; one for in-profile
+packets and the other for out-of-profile packets. At the ingress of
+the network, profile meters tag packets as IN or OUT based on
+contracted profiles for customers. Inside the network, IN packets
+receive preferential treatment by the RIO dropper.
+ALTQ/RIO has 3 drop precedence levels defined for the Assured Forwarding
+PHB of DiffServ (RFC2597).
+.It Cd option ALTQ_BLUE
+Enables ALTQ's Blue module.
+Blue is another active buffer management mechanism.
+.It Cd option ALTQ_FLOWVALVE
+Enables ALTQ's Flowvalve module. Flowvalve is a simple implementation
+of a RED penalty box that identifies and punishes misbehaving flows.
+.It Cd option ALTQ_CDNR
+Enables ALTQ's CDNR (diffserfv traffic conditioner) module.
+Traffic conditioners are components to meter, mark, or drop incoming
+packets according to some rules. As opposed to queueing disciplines,
+traffic conditioners handle incoming packets at an input interface.
+.It Cd option ALTQ_NOPCC
+Disables use of processor cycle counter (e.g., Pentium TSC on i386 and
+PCC on alpha) to measure time in ALTQ. This option should be defined
+for a non-Pentium i386 CPU which does not have TSC, SMP (per-CPU
+counters are not in sync), or power management which affects processor
+cycle counter.
.El
.Ss SCSI Subsystem Options
.Bl -ohang