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| author | Patrick Wildt <patrick@cvs.openbsd.org> | 2018-04-27 06:41:13 +0000 |
|---|---|---|
| committer | Patrick Wildt <patrick@cvs.openbsd.org> | 2018-04-27 06:41:13 +0000 |
| commit | af00735ae3ee6b6c17461958b8f96d5e6010c508 (patch) | |
| tree | 289dcad900b930d41d8141845ba4622a4aedb304 /share/tabset | |
| parent | afc9f5f7c709f32c21a16e9f8448c436e8dcf9c5 (diff) | |
Newer fec(4), like implemented on i.MX8M, have multiple interrupt lines
to the ethernet controller for different types of events. On the i.MX8M
interrupts only seem to happen on the last interrupt, while the i.MX6 that
we support very well only has a single interrupt line. Simply establish
all three lines (if available) in a non-MPSAFE fashion to make ethernet
work on the i.MX8M SoC.
ok kettenis@
Diffstat (limited to 'share/tabset')
0 files changed, 0 insertions, 0 deletions