diff options
author | Mike Belopuhov <mikeb@cvs.openbsd.org> | 2007-12-10 23:12:57 +0000 |
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committer | Mike Belopuhov <mikeb@cvs.openbsd.org> | 2007-12-10 23:12:57 +0000 |
commit | 4c9b6e5b0edb297d58c934494bf2cbc51163e19e (patch) | |
tree | 0a3f7288438a718c6a0e72057f6fc1f1e3e402d1 /sys/altq | |
parent | 484d34458924798509976e608a0a94b036f7b85f (diff) |
Remove an MD code that was obsoleted by the timecounters.
ok kjc
Diffstat (limited to 'sys/altq')
-rw-r--r-- | sys/altq/altq_subr.c | 108 |
1 files changed, 10 insertions, 98 deletions
diff --git a/sys/altq/altq_subr.c b/sys/altq/altq_subr.c index fc9d41382c6..e876d9b07f2 100644 --- a/sys/altq/altq_subr.c +++ b/sys/altq/altq_subr.c @@ -1,4 +1,4 @@ -/* $OpenBSD: altq_subr.c,v 1.22 2007/09/13 20:40:02 chl Exp $ */ +/* $OpenBSD: altq_subr.c,v 1.23 2007/12/10 23:12:56 mikeb Exp $ */ /* $KAME: altq_subr.c,v 1.11 2002/01/11 08:11:49 kjc Exp $ */ /* @@ -56,12 +56,6 @@ #include <net/pfvar.h> #include <altq/altq.h> -/* machine dependent clock related includes */ -#if defined(__i386__) -#include <machine/cpufunc.h> /* for pentium tsc */ -#include <machine/specialreg.h> /* for CPUID_TSC */ -#endif /* __i386__ */ - /* * internal function prototypes */ @@ -332,20 +326,6 @@ tbr_timeout(arg) CALLOUT_RESET(&tbr_callout, 1, tbr_timeout, (void *)0); else tbr_timer = 0; /* don't need tbr_timer anymore */ -#if defined(__alpha__) && !defined(ALTQ_NOPCC) - { - /* - * XXX read out the machine dependent clock once a second - * to detect counter wrap-around. - */ - static u_int cnt; - - if (++cnt >= hz) { - (void)read_machclk(); - cnt = 0; - } - } -#endif /* __alpha__ && !ALTQ_NOPCC */ } /* @@ -722,65 +702,33 @@ write_dsfield(m, pktattr, dsfield) /* if pcc is not available or disabled, emulate 256MHz using microtime() */ #define MACHCLK_SHIFT 8 -int machclk_usepcc; +u_int32_t machclk_tc = 0; u_int32_t machclk_freq = 0; u_int32_t machclk_per_tick = 0; -#ifdef __alpha__ -extern u_int64_t cycles_per_usec; /* alpha cpu clock frequency */ -#endif /* __alpha__ */ - void init_machclk(void) { - machclk_usepcc = 1; - -#if (!defined(__i386__) && !defined(__alpha__)) || defined(ALTQ_NOPCC) - machclk_usepcc = 0; -#endif -#if defined(__FreeBSD__) && defined(SMP) - machclk_usepcc = 0; -#endif -#if defined(__NetBSD__) && defined(MULTIPROCESSOR) - machclk_usepcc = 0; -#endif -#if defined(__OpenBSD__) && defined(__HAVE_TIMECOUNTER) +#if defined(__HAVE_TIMECOUNTER) /* * If we have timecounters, microtime is good enough and we can * avoid problems on machines with variable cycle counter * frequencies. */ - machclk_usepcc = 0; -#endif -#ifdef __i386__ - /* check if TSC is available */ - if (machclk_usepcc == 1 && (cpu_feature & CPUID_TSC) == 0) - machclk_usepcc = 0; + machclk_tc = 1; #endif - if (machclk_usepcc == 0) { + if (machclk_tc == 1) { /* emulate 256MHz using microtime() */ machclk_freq = 1000000 << MACHCLK_SHIFT; machclk_per_tick = machclk_freq / hz; #ifdef ALTQ_DEBUG - printf("altq: emulate %uHz cpu clock\n", machclk_freq); + printf("altq: emulating %uHz cpu clock\n", machclk_freq); #endif return; } /* - * if the clock frequency (of Pentium TSC or Alpha PCC) is - * accessible, just use it. - */ -#if defined(__i386__) && (defined(I586_CPU) || defined(I686_CPU)) - /* XXX - this will break down with variable cpu frequency. */ - machclk_freq = cpuspeed * 1000000; -#endif -#if defined(__alpha__) - machclk_freq = (u_int32_t)(cycles_per_usec * 1000000); -#endif /* __alpha__ */ - - /* * if we don't know the clock frequency, measure it. */ if (machclk_freq == 0) { @@ -808,50 +756,14 @@ init_machclk(void) #endif } -#if defined(__OpenBSD__) && defined(__i386__) -static __inline u_int64_t -rdtsc(void) -{ - u_int64_t rv; - __asm __volatile(".byte 0x0f, 0x31" : "=A" (rv)); - return (rv); -} -#endif /* __OpenBSD__ && __i386__ */ - u_int64_t read_machclk(void) { + struct timeval tv; u_int64_t val; - if (machclk_usepcc) { -#if defined(__i386__) - val = rdtsc(); -#elif defined(__alpha__) - static u_int32_t last_pcc, upper; - u_int32_t pcc; - - /* - * for alpha, make a 64bit counter value out of the 32bit - * alpha processor cycle counter. - * read_machclk must be called within a half of its - * wrap-around cycle (about 5 sec for 400MHz cpu) to properly - * detect a counter wrap-around. - * tbr_timeout calls read_machclk once a second. - */ - pcc = (u_int32_t)alpha_rpcc(); - if (pcc <= last_pcc) - upper++; - last_pcc = pcc; - val = ((u_int64_t)upper << 32) + pcc; -#else - panic("read_machclk"); -#endif - } else { - struct timeval tv; - - microuptime(&tv); - val = (((u_int64_t)(tv.tv_sec) * 1000000 - + tv.tv_usec) << MACHCLK_SHIFT); - } + microuptime(&tv); + val = (((u_int64_t)(tv.tv_sec) * 1000000 + + tv.tv_usec) << MACHCLK_SHIFT); return (val); } |