from netbsd:

machine-independent TurboChannel bus configuration.  These files
deal with stuff like:
        (1) configuring built-in devices,
        (2) looking at TC slots configuring any devices found.
The lists of slots, slot locations, etc. and built-in devices
are provided by machine-dependent code.  Interrupt handling
is also provided by machine-dependent code, but the MD code provides
hooks so that standard names for 'establish' and 'disestablish'
can be used in drivers.

This code requires <machine/tc_machdep.h>, which defines some
portability types specific to the TurboChannel bus code.

1 files changed, 93 insertions, 115 deletions

diff --git a/sys/arch/alpha/tc/espvar.h b/sys/arch/alpha/tc/espvar.h
index b1ef9b9c894..e3073a027dc 100644
--- a/sys/arch/alpha/tc/espvar.h
+++ b/sys/arch/alpha/tc/espvar.h
@@ -1,4 +1,4 @@
-/*	$NetBSD: espvar.h,v 1.2 1995/08/03 00:52:10 cgd Exp $	*/
+/*	$NetBSD: espvar.h,v 1.3 1995/12/20 00:40:26 cgd Exp $	*/
 
 /*
  * Copyright (c) 1994 Peter Galbavy.  All rights reserved.
@@ -29,12 +29,9 @@
  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */
 
-#define ESP_SYNC_REQ_ACK_OFS 	0
-
 #define ESP_DEBUG 0
 
 #define FREQTOCCF(freq)	(((freq + 4) / 5))
-#define	ESP_DEF_TIMEOUT 153
 
 /* esp revisions */
 #define	ESP100		0x01
@@ -42,25 +39,6 @@
 #define	ESP200		0x03
 #define	NCR53C94	0x04
 
-/* Grabbed from Julians SCSI aha-drivers */
-#ifdef	DDB
-int	Debugger();
-#else	DDB
-#define	Debugger() panic("should call debugger here (esp.c)")
-#endif	DDB
-
-typedef caddr_t physaddr;
-
-struct esp_dma_seg {
-	physaddr	addr;
-	long		len;
-};
-
-extern int delaycount;
-#define FUDGE(X)	((X)>>1) 	/* get 1 ms spincount */
-#define MINIFUDGE(X)	((X)>>4) 	/* get (approx) 125us spincount */
-#define NUM_CONCURRENT	7	/* Only one per target for now */
-
 /* 
  * ECB. Holds additional information for each SCSI command Comments: We
  * need a separate scsi command block because we may need to overwrite it
@@ -73,15 +51,19 @@ struct ecb {
 	TAILQ_ENTRY(ecb) chain;
 	struct scsi_xfer *xs;	/* SCSI xfer ctrl block from above */
 	int		flags;	/* Status */
-#define ECB_FREE	0x00
-#define ECB_ACTIVE	0x01
-#define ECB_DONE	0x04
+#define ECB_QNONE	0
+#define ECB_QFREE	1
+#define ECB_QREADY	2
+#define ECB_QNEXUS	3
+#define ECB_QBITS	0x07
 #define ECB_CHKSENSE	0x08
+#define ECB_ABORTED	0x10
+#define ECB_SETQ(e, q)	do (e)->flags = ((e)->flags&~ECB_QBITS)|(q); while(0)
 	struct scsi_generic cmd;  /* SCSI command block */
 	int	 clen;
 	char	*daddr;		/* Saved data pointer */
 	int	 dleft;		/* Residue */
-	int 	 stat;		/* SCSI status byte */
+	u_char 	 stat;		/* SCSI status byte */
 };
 
 /* 
@@ -97,9 +79,12 @@ struct esp_tinfo {
 	int	senses;		/* #request sense commands sent */
 	ushort	lubusy;		/* What local units/subr. are busy? */
 	u_char  flags;
-#define NEED_TO_RESET	0x01	/* Should send a BUS_DEV_RESET */
-#define DO_NEGOTIATE	0x02	/* (Re)Negotiate synchronous options */
-#define TARGET_BUSY	0x04	/* Target is busy, i.e. cmd in progress */
+#define T_NEED_TO_RESET	0x01	/* Should send a BUS_DEV_RESET */
+#define T_NEGOTIATE	0x02	/* (Re)Negotiate synchronous options */
+#define T_BUSY		0x04	/* Target is busy, i.e. cmd in progress */
+#define T_SYNCMODE	0x08	/* sync mode has been negotiated */
+#define T_XXX		0x10	/* Target is XXX */
+#define T_SYNCHNEGO	0x20	/* .. */
 	u_char  period;		/* Period suggestion */
 	u_char  offset;		/* Offset suggestion */
 } tinfo_t;
@@ -107,22 +92,28 @@ struct esp_tinfo {
 /* Register a linenumber (for debugging) */
 #define LOGLINE(p)
 
-#define ESP_SHOWECBS 0x01
-#define ESP_SHOWINTS 0x02
-#define ESP_SHOWCMDS 0x04
-#define ESP_SHOWMISC 0x08
-#define ESP_SHOWTRAC 0x10
-#define ESP_SHOWSTART 0x20
-#define ESP_SHOWPHASE 0x40
-
-#if ESP_DEBUG
-#define ESP_ECBS(str)  do {if (esp_debug & ESP_SHOWECBS) printf str;} while (0)
-#define ESP_MISC(str)  do {if (esp_debug & ESP_SHOWMISC) printf str;} while (0)
-#define ESP_INTS(str)  do {if (esp_debug & ESP_SHOWINTS) printf str;} while (0)
-#define ESP_TRACE(str) do {if (esp_debug & ESP_SHOWTRAC) printf str;} while (0)
-#define ESP_CMDS(str)  do {if (esp_debug & ESP_SHOWCMDS) printf str;} while (0)
-#define ESP_START(str) do {if (esp_debug & ESP_SHOWSTART) printf str;}while (0)
-#define ESP_PHASE(str) do {if (esp_debug & ESP_SHOWPHASE) printf str;}while (0)
+#define ESP_SHOWECBS	0x01
+#define ESP_SHOWINTS	0x02
+#define ESP_SHOWCMDS	0x04
+#define ESP_SHOWMISC	0x08
+#define ESP_SHOWTRAC	0x10
+#define ESP_SHOWSTART	0x20
+#define ESP_SHOWPHASE	0x40
+#define ESP_SHOWDMA	0x80
+#define ESP_SHOWCCMDS	0x100
+#define ESP_SHOWMSGS	0x200
+
+#ifdef ESP_DEBUG
+extern int esp_debug;
+#define ESP_ECBS(str)	do {if (esp_debug & ESP_SHOWECBS) printf str;} while (0)
+#define ESP_MISC(str)	do {if (esp_debug & ESP_SHOWMISC) printf str;} while (0)
+#define ESP_INTS(str)	do {if (esp_debug & ESP_SHOWINTS) printf str;} while (0)
+#define ESP_TRACE(str)	do {if (esp_debug & ESP_SHOWTRAC) printf str;} while (0)
+#define ESP_CMDS(str)	do {if (esp_debug & ESP_SHOWCMDS) printf str;} while (0)
+#define ESP_START(str)	do {if (esp_debug & ESP_SHOWSTART) printf str;}while (0)
+#define ESP_PHASE(str)	do {if (esp_debug & ESP_SHOWPHASE) printf str;}while (0)
+#define ESP_DMA(str)	do {if (esp_debug & ESP_SHOWDMA) printf str;} while (0)
+#define ESP_MSGS(str) 	do {if (esp_debug & ESP_SHOWMSGS) printf str;} while (0)
 #else
 #define ESP_ECBS(str)
 #define ESP_MISC(str)
@@ -131,6 +122,8 @@ struct esp_tinfo {
 #define ESP_CMDS(str)
 #define ESP_START(str)
 #define ESP_PHASE(str)
+#define ESP_DMA(str)
+#define ESP_MSGS(str)
 #endif
 
 #define ESP_MAX_MSG_LEN 8
@@ -144,12 +137,13 @@ struct esp_softc {
 	struct evcnt sc_intrcnt;		/* intr count */
 	struct scsi_link sc_link;		/* scsi lint struct */
 #ifdef SPARC_DRIVER
-	volatile caddr_t sc_reg;		/* the registers */
+	volatile u_char *sc_reg;		/* the registers */
+	struct dma_softc *sc_dma;		/* pointer to my dma */
 #else
-	espreg_t *sc_reg;			/* the registers */
-	struct dma_softc __dma;			/* DMA info lives here. */
+	volatile u_int32_t *sc_reg;		/* the registers */
+	struct tcds_slotconfig *sc_dma;		/* DMA/slot info lives here. */
+	void	*sc_cookie;			/* intr. handling cookie */
 #endif
-	struct dma_softc *sc_dma;		/* pointer to my dma */
 
 	/* register defaults */
 	u_char	sc_cfg1;			/* Config 1 */
@@ -164,11 +158,6 @@ struct esp_softc {
 	u_char	sc_espstep;
 	u_char	sc_espfflags;
 
-#ifdef SPARC_DRIVER
-	/* the current boot path component */
-	struct bootpath *sc_bp;
-#endif
-
 	/* Lists of command blocks */
 	TAILQ_HEAD(ecb_list, ecb) free_list,
 				  ready_list,
@@ -180,7 +169,7 @@ struct esp_softc {
 
 	/* Data about the current nexus (updated for every cmd switch) */
 	caddr_t	sc_dp;				/* Current data pointer */
-	size_t	sc_dleft;			/* Data left to transfer */
+	ssize_t	sc_dleft;			/* Data left to transfer */
 
 	/* Adapter state */
 	int	sc_phase;		/* Copy of what bus phase we are in */
@@ -188,14 +177,15 @@ struct esp_softc {
 	u_char	sc_state;		/* State applicable to the adapter */
 	u_char	sc_flags;
 	u_char	sc_selid;
+	u_char	sc_lastcmd;
 
 	/* Message stuff */
-	char	sc_msgpriq;	/* One or more messages to send (encoded) */
-	char	sc_msgout;	/* What message is on its way out? */
-	char	sc_omess[ESP_MAX_MSG_LEN];
+	u_char	sc_msgpriq;	/* One or more messages to send (encoded) */
+	u_char	sc_msgout;	/* What message is on its way out? */
+	u_char	sc_omess[ESP_MAX_MSG_LEN];
 	caddr_t	sc_omp;	/* Message pointer (for multibyte messages) */
 	size_t	sc_omlen;
-	char	sc_imess[ESP_MAX_MSG_LEN + 1];
+	u_char	sc_imess[ESP_MAX_MSG_LEN + 1];
 	caddr_t	sc_imp;	/* Message pointer (for multibyte messages) */
 	size_t	sc_imlen;
 
@@ -217,13 +207,18 @@ struct esp_softc {
 #define ESP_RESELECTED	0x04	/* Has been reselected */
 #define ESP_HASNEXUS	0x05	/* Actively using the SCSI bus */
 #define ESP_CLEANING	0x06
+#define	ESP_SBR		0x07	/* Expect a SCSI RST because we commanded it */
 
 /* values for sc_flags */
 #define ESP_DROP_MSGI	0x01	/* Discard all msgs (parity err detected) */
 #define ESP_DOINGDMA	0x02	/* The FIFO data path is active! */
 #define ESP_BUSFREE_OK	0x04	/* Bus free phase is OK. */
 #define ESP_SYNCHNEGO	0x08	/* Synch negotiation in progress. */
-#define ESP_BLOCKED	0x10	/* Don't schedule new scsi bus operations */
+/*#define ESP_BLOCKED	0x10	* Don't schedule new scsi bus operations */
+#define ESP_DISCON	0x10	/* Target sent DISCONNECT msg */
+#define ESP_ABORTING	0x20	/* Bailing out */
+#define ESP_ICCS	0x40	/* Expect status phase results */
+#define ESP_WAITI	0x80	/* Waiting for non-DMA data to arrive */
 
 /* values for sc_msgout */
 #define SEND_DEV_RESET		0x01
@@ -234,42 +229,6 @@ struct esp_softc {
 #define SEND_IDENTIFY  		0x20
 #define SEND_SDTR		0x40
 
-/*
- * Generic SCSI messages. For now we reject most of them.
- */
-/* Messages (1 byte) */		     /* I/T M(andatory) or (O)ptional */
-#define MSG_CMDCOMPLETE		0x00 /* M/M */
-#define MSG_EXTENDED		0x01 /* O/O */
-#define MSG_SAVEDATAPOINTER	0x02 /* O/O */
-#define MSG_RESTOREPOINTERS	0x03 /* O/O */
-#define MSG_DISCONNECT		0x04 /* O/O */
-#define MSG_INITIATOR_DET_ERR	0x05 /* M/M */
-#define MSG_ABORT		0x06 /* O/M */
-#define MSG_MESSAGE_REJECT	0x07 /* M/M */
-#define MSG_NOOP		0x08 /* M/M */
-#define MSG_PARITY_ERR		0x09 /* M/M */
-#define MSG_LINK_CMD_COMPLETE	0x0a /* O/O */
-#define MSG_LINK_CMD_COMPLETEF	0x0b /* O/O */
-#define MSG_BUS_DEV_RESET	0x0c /* O/M */
-#define MSG_ABORT_TAG		0x0d /* O/O */
-#define MSG_CLEAR_QUEUE		0x0e /* O/O */
-#define MSG_INIT_RECOVERY	0x0f /* O/O */
-#define MSG_REL_RECOVERY	0x10 /* O/O */
-#define MSG_TERM_IO_PROC	0x11 /* O/O */
-
-/* Messages (2 byte) */
-#define MSG_SIMPLE_Q_TAG	0x20 /* O/O */
-#define MSG_HEAD_OF_Q_TAG	0x21 /* O/O */
-#define MSG_ORDERED_Q_TAG	0x22 /* O/O */
-#define MSG_IGN_WIDE_RESIDUE	0x23 /* O/O */
-
-/* Identify message */
-#define ESP_MSG_IDENTIFY(lun)	(0x80|(lun & 0x7))	/* XXX 0xc0=selection on */
-#define ESP_MSG_ISIDENT(m)	((m) & 0x80)
-
-/* Extended messages (opcode) */
-#define MSG_EXT_SDTR		0x01
-
 /* SCSI Status codes */
 #define ST_GOOD			0x00
 #define ST_CHKCOND		0x02
@@ -303,41 +262,60 @@ struct esp_softc {
 #define INVALID_PHASE		0x101	/* Re/Selection valid, but no REQ yet */
 #define PSEUDO_PHASE		0x100	/* "pseudo" bit */
 
-#if ESP_DEBUG > 1
-#define	ESPCMD(sc, cmd) \
-	printf("cmd:0x%02x ", sc->sc_reg->esp_cmd = cmd); wbflush();
+#if 1
+static inline u_char
+ESP_READ_REG(sc, reg)
+	struct esp_softc *sc;
+	int reg;
+{
+	u_char v;
+
+	v = sc->sc_reg[reg * 2] & 0xff;
+	wbflush();
+	return v;
+}
+#else
+#define	ESP_READ_REG(sc, reg)			\
+	((u_char)((sc)->sc_reg[(reg) * 2] & 0xff))
+#endif
+#define	ESP_WRITE_REG(sc, reg, val)		\
+	do {					\
+		u_char v = (val);		\
+		(sc)->sc_reg[(reg) * 2] = v;	\
+		wbflush();			\
+	} while (0)
+
+#ifdef ESP_DEBUG
+#define	ESPCMD(sc, cmd) do {				\
+	if (esp_debug & ESP_SHOWCCMDS)			\
+		printf("<cmd:0x%x>", (unsigned)cmd);	\
+	sc->sc_lastcmd = cmd;				\
+	ESP_WRITE_REG(sc, ESP_CMD, cmd);		\
+} while (0)
 #else
-#define	ESPCMD(sc, cmd)		sc->sc_reg->esp_cmd = cmd; wbflush();
+#define	ESPCMD(sc, cmd)		ESP_WRITE_REG(sc, ESP_CMD, cmd)
 #endif
 
 #define SAME_ESP(sc, bp, ca) \
 	((bp->val[0] == ca->ca_slot && bp->val[1] == ca->ca_offset) || \
 	 (bp->val[0] == -1 && bp->val[1] == sc->sc_dev.dv_unit))
 
-#define TARGETNAME(ecb) \
-	((struct device *)ecb->xs->sc_link->adapter_softc)->dv_xname
-
 /* DMA macros for ESP */
-#define	DMA_ENINTR(r)		((r->enintr)(r))
 #ifdef SPARC_DRIVER
+#define	DMA_ENINTR(r)		((r->enintr)(r))
 #define	DMA_ISINTR(r)		((r->isintr)(r))
-#else
-#define	DMA_ISINTR(r) \
-	((RR(r->sc_reg->esp_stat) & ESPSTAT_INT) || \
-	tcds_scsi_isintr(r->sc_dma->sc_dev.dv_unit, 0))
-#define	DMA_ISINTR_CLR(r) \
-	((RR(r->sc_reg->esp_stat) & ESPSTAT_INT) || \
-	tcds_scsi_isintr(r->sc_dma->sc_dev.dv_unit, 1))
-#endif
 #define	DMA_RESET(r)		((r->reset)(r))
 #define	DMA_START(a, b, c, d)	((a->start)(a, b, c, d))
 #define	DMA_INTR(r)		((r->intr)(r))
-
-#ifdef SPARC_DRIVER
 #define DMA_DRAIN(sc)	if (sc->sc_rev < DMAREV_2) { \
 				DMACSR(sc) |= D_DRAIN; \
 				DMAWAIT1(sc); \
 			}
 #else
+#define	DMA_ENINTR(r)		tcds_dma_enintr(r)
+#define	DMA_ISINTR(r)		tcds_dma_isintr(r)
+#define	DMA_RESET(r)		tcds_dma_reset(r)
+#define	DMA_START(a, b, c, d)	tcds_dma_start(a, b, c, d)
+#define	DMA_INTR(r)		tcds_dma_intr(r)
 #define	DMA_DRAIN(sc)
 #endif