sync to 0616, retaining local diffs

16 files changed, 1947 insertions, 162 deletions

diff --git a/sys/arch/alpha/tc/cfb.c b/sys/arch/alpha/tc/cfb.c
new file mode 100644
index 00000000000..1de6783756b
--- /dev/null
+++ b/sys/arch/alpha/tc/cfb.c
@@ -0,0 +1,346 @@
+/*	$NetBSD: cfb.c,v 1.1 1996/05/01 23:25:03 cgd Exp $	*/
+
+/*
+ * Copyright (c) 1995, 1996 Carnegie-Mellon University.
+ * All rights reserved.
+ *
+ * Author: Chris G. Demetriou
+ * 
+ * Permission to use, copy, modify and distribute this software and
+ * its documentation is hereby granted, provided that both the copyright
+ * notice and this permission notice appear in all copies of the
+ * software, derivative works or modified versions, and any portions
+ * thereof, and that both notices appear in supporting documentation.
+ * 
+ * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" 
+ * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND 
+ * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
+ * 
+ * Carnegie Mellon requests users of this software to return to
+ *
+ *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
+ *  School of Computer Science
+ *  Carnegie Mellon University
+ *  Pittsburgh PA 15213-3890
+ *
+ * any improvements or extensions that they make and grant Carnegie the
+ * rights to redistribute these changes.
+ */
+
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <sys/kernel.h>
+#include <sys/device.h>
+#include <sys/malloc.h>
+#include <sys/buf.h>
+#include <sys/conf.h>
+#include <sys/ioctl.h>
+
+#include <machine/bus.h>
+#include <machine/intr.h>
+
+#include <dev/tc/tcvar.h>
+#include <machine/cfbreg.h>
+#include <alpha/tc/cfbvar.h>
+#if 0
+#include <alpha/tc/bt459reg.h>
+#endif
+
+#include <dev/rcons/raster.h>
+#include <alpha/wscons/wscons_raster.h>
+#include <alpha/wscons/wsconsvar.h>
+#include <machine/fbio.h>
+
+#include <machine/autoconf.h>
+#include <machine/pte.h>
+
+int	cfbmatch __P((struct device *, void *, void *));
+void	cfbattach __P((struct device *, struct device *, void *));
+int	cfbprint __P((void *, char *));
+
+struct cfattach cfb_ca = {
+	sizeof(struct cfb_softc), cfbmatch, cfbattach,
+};
+
+struct cfdriver cfb_cd = {
+	NULL, "cfb", DV_DULL,
+};
+
+void	cfb_getdevconfig __P((tc_addr_t dense_addr, struct cfb_devconfig *dc));
+struct cfb_devconfig cfb_console_dc;
+
+struct wscons_emulfuncs cfb_emulfuncs = {
+	rcons_cursor,			/* could use hardware cursor; punt */
+	rcons_putstr,
+	rcons_copycols,
+	rcons_erasecols,
+	rcons_copyrows,
+	rcons_eraserows,
+};
+
+int	cfbioctl __P((struct device *, u_long, caddr_t, int, struct proc *));
+int	cfbmmap __P((struct device *, off_t, int));
+
+int	cfbintr __P((void *));
+
+int
+cfbmatch(parent, match, aux)
+	struct device *parent;
+	void *match, *aux;
+{
+	struct cfdata *cf = match;
+	struct tc_attach_args *ta = aux;
+
+	if (strncmp("PMAG-BA ", ta->ta_modname, TC_ROM_LLEN) != 0)
+		return (0);
+
+	return (10);
+}
+
+void
+cfb_getdevconfig(dense_addr, dc)
+	tc_addr_t dense_addr;
+	struct cfb_devconfig *dc;
+{
+	struct raster *rap;
+	struct rcons *rcp;
+	char *ramdacregp;
+	int i;
+
+	dc->dc_vaddr = dense_addr;
+	dc->dc_paddr = k0segtophys(dc->dc_vaddr);		/* XXX */
+	dc->dc_size = CFB_SIZE;
+
+	ramdacregp = (char *)dc->dc_vaddr + CFB_RAMDAC_OFFSET;
+
+	dc->dc_wid = 1024;
+	dc->dc_ht = 864;
+	dc->dc_depth = 8;			/* 8 plane */
+	dc->dc_rowbytes = dc->dc_wid * (dc->dc_depth / 8);
+
+	dc->dc_videobase = dc->dc_vaddr + CFB_FB_OFFSET;
+	
+	/* Initialize the RAMDAC/colormap */
+	/* start XXX XXX XXX */
+	(*(volatile u_int32_t *)(ramdacregp + CFB_RAMDAC_ADDRLOW)) = 0;
+	(*(volatile u_int32_t *)(ramdacregp + CFB_RAMDAC_ADDRHIGH)) = 0;
+	tc_wmb();
+	for (i = 0; i < 256; i++) {
+		(*(volatile u_int32_t *)(ramdacregp + CFB_RAMDAC_CMAPDATA)) =
+		    i ? 0xff : 0;
+		tc_wmb();
+		(*(volatile u_int32_t *)(ramdacregp + CFB_RAMDAC_CMAPDATA)) =
+		    i ? 0xff : 0;
+		tc_wmb();
+		(*(volatile u_int32_t *)(ramdacregp + CFB_RAMDAC_CMAPDATA)) =
+		    i ? 0xff : 0;
+		tc_wmb();
+	}
+	/* end XXX XXX XXX */
+	
+	/* clear the screen */
+	for (i = 0; i < dc->dc_ht * dc->dc_rowbytes; i += sizeof(u_int32_t))
+		*(u_int32_t *)(dc->dc_videobase + i) = 0x00000000;
+
+	rap = &dc->dc_raster;
+	rap->width = dc->dc_wid;
+	rap->height = dc->dc_ht;
+	rap->depth = 8;
+	rap->linelongs = dc->dc_rowbytes / sizeof(u_int32_t);
+	rap->pixels = (u_int32_t *)dc->dc_videobase;
+
+	/* initialize the raster console blitter */
+	rcp = &dc->dc_rcons;
+	rcp->rc_sp = rap;
+	rcp->rc_crow = rcp->rc_ccol = -1;
+	rcp->rc_crowp = &rcp->rc_crow;
+	rcp->rc_ccolp = &rcp->rc_ccol;
+	rcons_init(rcp, 34, 80);
+}
+
+void
+cfbattach(parent, self, aux)
+	struct device *parent, *self;
+	void *aux;
+{
+	struct cfb_softc *sc = (struct cfb_softc *)self;
+	struct tc_attach_args *ta = aux;
+	struct wscons_attach_args waa;
+	struct wscons_odev_spec *wo;
+	int console;
+	char *x;
+
+	console = 0;					/* XXX */
+	if (console)
+		sc->sc_dc = &cfb_console_dc;
+	else {
+		sc->sc_dc = (struct cfb_devconfig *)
+		    malloc(sizeof(struct cfb_devconfig), M_DEVBUF, M_WAITOK);
+		cfb_getdevconfig(ta->ta_addr, sc->sc_dc);
+	}
+	if (sc->sc_dc->dc_vaddr == NULL) {
+		printf(": couldn't map memory space; punt!\n");
+		return;
+	}
+	printf(": %d x %d, %dbpp\n", sc->sc_dc->dc_wid, sc->sc_dc->dc_ht,
+	    sc->sc_dc->dc_depth);
+
+	/* Establish an interrupt handler, and clear any pending interrupts */
+        tc_intr_establish(parent, ta->ta_cookie, TC_IPL_TTY, cfbintr, sc);
+	*(volatile u_int32_t *)(sc->sc_dc->dc_vaddr + CFB_IREQCTRL_OFFSET) = 0;
+
+	/* initialize the raster */
+	waa.waa_isconsole = console;
+	wo = &waa.waa_odev_spec;
+	wo->wo_ef = &cfb_emulfuncs;
+	wo->wo_efa = &sc->sc_dc->dc_rcons;
+	wo->wo_nrows = sc->sc_dc->dc_rcons.rc_maxrow;
+	wo->wo_ncols = sc->sc_dc->dc_rcons.rc_maxcol;
+	wo->wo_crow = 0;
+	wo->wo_ccol = 0;
+	wo->wo_ioctl = cfbioctl;
+	wo->wo_mmap = cfbmmap;
+
+	config_found(self, &waa, cfbprint);
+}
+
+int
+cfbprint(aux, pnp)
+	void *aux;
+	char *pnp;
+{
+
+	if (pnp)
+		printf("wscons at %s", pnp);
+	return (UNCONF);
+}
+
+int
+cfbioctl(dev, cmd, data, flag, p)
+	struct device *dev;
+	u_long cmd;
+	caddr_t data;
+	int flag;
+	struct proc *p;
+{
+	struct cfb_softc *sc = (struct cfb_softc *)dev;
+	struct cfb_devconfig *dc = sc->sc_dc;
+
+	switch (cmd) {
+	case FBIOGTYPE:
+#define fbt ((struct fbtype *)data)
+		fbt->fb_type = FBTYPE_CFB;
+		fbt->fb_height = sc->sc_dc->dc_ht;
+		fbt->fb_width = sc->sc_dc->dc_wid;
+		fbt->fb_depth = sc->sc_dc->dc_depth;
+		fbt->fb_cmsize = 256;		/* XXX ??? */
+		fbt->fb_size = sc->sc_dc->dc_size;
+#undef fbt
+		return (0);
+
+#if 0
+	case FBIOPUTCMAP:
+		return (*tgar->tgar_set_cmap)(dc, (struct fbcmap *)data);
+
+	case FBIOGETCMAP:
+		return (*tgar->tgar_get_cmap)(dc, (struct fbcmap *)data);
+#endif
+
+	case FBIOGATTR:
+		return (ENOTTY);			/* XXX ? */
+
+#if 0
+	case FBIOSVIDEO:
+		if (*(int *)data == FBVIDEO_OFF)
+			cfb_blank(sc->sc_dc);
+		else
+			cfb_unblank(sc->sc_dc);
+		return (0);
+#endif
+
+	case FBIOGVIDEO:
+		*(int *)data = dc->dc_blanked ? FBVIDEO_OFF : FBVIDEO_ON;
+		return (0);
+
+#if 0
+	case FBIOSCURSOR:
+		return (*tgar->tgar_set_cursor)(dc, (struct fbcursor *)data);
+
+	case FBIOGCURSOR:
+		return (*tgar->tgar_get_cursor)(dc, (struct fbcursor *)data);
+
+	case FBIOSCURPOS:
+		return (*tgar->tgar_set_curpos)(dc, (struct fbcurpos *)data);
+
+	case FBIOGCURPOS:
+		return (*tgar->tgar_get_curpos)(dc, (struct fbcurpos *)data);
+
+	case FBIOGCURMAX:
+		return (*tgar->tgar_get_curmax)(dc, (struct fbcurpos *)data);
+#endif
+	}
+	return (-1);
+}
+
+int
+cfbmmap(dev, offset, prot)
+	struct device *dev;
+	off_t offset;
+	int prot;
+{
+	struct cfb_softc *sc = (struct cfb_softc *)dev;
+
+	if (offset > CFB_SIZE)
+		return -1;
+	return alpha_btop(sc->sc_dc->dc_paddr + offset);
+}
+
+int
+cfbintr(v)
+	void *v;
+{
+	struct cfb_softc *sc = v;
+
+	*(volatile u_int32_t *)(sc->sc_dc->dc_vaddr + CFB_IREQCTRL_OFFSET) = 0;
+
+	return (1);
+}
+
+#if 0
+void
+tga_console(bc, pc, bus, device, function)
+	bus_chipset_tag_t bc;
+	pci_chipset_tag_t pc;
+	int bus, device, function;
+{
+	struct tga_devconfig *dcp = &tga_console_dc;
+	struct wscons_odev_spec wo;
+
+	tga_getdevconfig(bc, pc, pci_make_tag(pc, bus, device, function), dcp);
+
+	/* sanity checks */
+	if (dcp->dc_vaddr == NULL)
+		panic("tga_console(%d, %d): couldn't map memory space",
+		    device, function);
+	if (dcp->dc_tgaconf == NULL)
+		panic("tga_console(%d, %d): unknown board configuration",
+		    device, function);
+
+	/*
+	 * Initialize the RAMDAC but DO NOT allocate any private storage.
+	 * Initialization includes disabling cursor, setting a sane
+	 * colormap, etc.  It will be reinitialized in tgaattach().
+	 */
+	(*dcp->dc_tgaconf->tgac_ramdac->tgar_init)(dcp, 0);
+
+	wo.wo_ef = &tga_emulfuncs;
+	wo.wo_efa = &dcp->dc_rcons;
+	wo.wo_nrows = dcp->dc_rcons.rc_maxrow;
+	wo.wo_ncols = dcp->dc_rcons.rc_maxcol;
+	wo.wo_crow = 0;
+	wo.wo_ccol = 0;
+	/* ioctl and mmap are unused until real attachment. */
+
+	wscons_attach_console(&wo);
+}
+#endif
diff --git a/sys/arch/alpha/tc/cfbvar.h b/sys/arch/alpha/tc/cfbvar.h
new file mode 100644
index 00000000000..bd90951e812
--- /dev/null
+++ b/sys/arch/alpha/tc/cfbvar.h
@@ -0,0 +1,62 @@
+/*	$NetBSD: cfbvar.h,v 1.1 1996/05/01 23:25:04 cgd Exp $	*/
+
+/*
+ * Copyright (c) 1995, 1996 Carnegie-Mellon University.
+ * All rights reserved.
+ *
+ * Author: Chris G. Demetriou
+ * 
+ * Permission to use, copy, modify and distribute this software and
+ * its documentation is hereby granted, provided that both the copyright
+ * notice and this permission notice appear in all copies of the
+ * software, derivative works or modified versions, and any portions
+ * thereof, and that both notices appear in supporting documentation.
+ * 
+ * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" 
+ * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND 
+ * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
+ * 
+ * Carnegie Mellon requests users of this software to return to
+ *
+ *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
+ *  School of Computer Science
+ *  Carnegie Mellon University
+ *  Pittsburgh PA 15213-3890
+ *
+ * any improvements or extensions that they make and grant Carnegie the
+ * rights to redistribute these changes.
+ */
+
+#include <machine/cfbreg.h>
+#include <dev/rcons/raster.h>
+#include <alpha/wscons/wsconsvar.h>
+#include <alpha/wscons/wscons_raster.h>
+
+struct cfb_devconfig;
+struct fbcmap;
+struct fbcursor;
+struct fbcurpos;
+
+struct cfb_devconfig {
+	vm_offset_t dc_vaddr;		/* memory space virtual base address */
+	vm_offset_t dc_paddr;		/* memory space physical base address */
+	vm_offset_t dc_size;		/* size of slot memory */
+
+	int	    dc_wid;		/* width of frame buffer */
+	int	    dc_ht;		/* height of frame buffer */
+	int	    dc_depth;		/* depth, bits per pixel */
+	int	    dc_rowbytes;	/* bytes in a FB scan line */
+
+	vm_offset_t dc_videobase;	/* base of flat frame buffer */
+
+	struct raster	dc_raster;	/* raster description */
+	struct rcons	dc_rcons;	/* raster blitter control info */
+
+	int	    dc_blanked;		/* currently has video disabled */
+};
+	
+struct cfb_softc {
+	struct device sc_dev;
+
+	struct cfb_devconfig *sc_dc;	/* device configuration */
+};
diff --git a/sys/arch/alpha/tc/esp.c b/sys/arch/alpha/tc/esp.c
index a7ec01b33ae..d1b4a2d2605 100644
--- a/sys/arch/alpha/tc/esp.c
+++ b/sys/arch/alpha/tc/esp.c
@@ -1,4 +1,4 @@
-/*	$NetBSD: esp.c,v 1.6 1995/12/20 00:40:21 cgd Exp $	*/
+/*	$NetBSD: esp.c,v 1.8.4.1 1996/06/05 00:39:03 cgd Exp $	*/
 
 /*
  * Copyright (c) 1994 Peter Galbavy
@@ -93,9 +93,12 @@ int esp_debug = 0; /*ESP_SHOWPHASE|ESP_SHOWMISC|ESP_SHOWTRAC|ESP_SHOWCMDS;*/
 /*static*/ void	esp_abort	__P((struct esp_softc *, struct ecb *));
 
 /* Linkup to the rest of the kernel */
-struct cfdriver espcd = {
-	NULL, "esp", espmatch, espattach,
-	DV_DULL, sizeof(struct esp_softc)
+struct cfattach esp_ca = {
+	sizeof(struct esp_softc), espmatch, espattach,
+};
+
+struct cfdriver esp_cd = {
+	NULL, "esp", DV_DULL,
 };
 
 struct scsi_adapter esp_switch = {
@@ -190,8 +193,8 @@ espattach(parent, self, aux)
 		    mapiodev(ca->ca_ra.ra_reg, 0, ca->ca_ra.ra_len, ca->ca_bustype);
 	}
 #else
-	sc->sc_reg = (volatile u_int32_t *)tcdsdev->tcdsda_tc.tcda_addr;
-	sc->sc_cookie = tcdsdev->tcdsda_tc.tcda_cookie;
+	sc->sc_reg = (volatile u_int32_t *)tcdsdev->tcdsda_addr;
+	sc->sc_cookie = tcdsdev->tcdsda_cookie;
 	sc->sc_dma = tcdsdev->tcdsda_sc;
 
 	printf(": address %x", sc->sc_reg);
@@ -213,7 +216,7 @@ espattach(parent, self, aux)
 		sc->sc_freq = ((struct sbus_softc *)
 		    sc->sc_dev.dv_parent)->sc_clockfreq;
 #else
-	if (parent->dv_cfdata->cf_driver == &tcdscd) {
+	if (parent->dv_cfdata->cf_driver == &tcds_cd) {
 		sc->sc_id = tcdsdev->tcdsda_id;
 		sc->sc_freq = tcdsdev->tcdsda_freq;
 	} else {
@@ -367,8 +370,8 @@ espattach(parent, self, aux)
 	sc->sc_ih.ih_fun = (void *) espintr;
 	sc->sc_ih.ih_arg = sc;
 	intr_establish(sc->sc_pri, &sc->sc_ih);
-#endif
 	evcnt_attach(&sc->sc_dev, "intr", &sc->sc_intrcnt);
+#endif
 
 	/*
 	 * fill in the prototype scsi_link.
@@ -889,7 +892,7 @@ esp_done(ecb)
 		if (xs->error == XS_SENSE) {
 			printf("sense=%2x; ", xs->sense.error_code);
 			if (xs->sense.error_code == 0x70)
-				printf("extcode: %x; ", xs->sense.extended_flags);
+				printf("extcode: %x; ", xs->sense.flags);
 		}
 	}
 	if ((xs->resid || xs->error > XS_SENSE) && esp_debug & ESP_SHOWMISC) {
diff --git a/sys/arch/alpha/tc/ioasic.c b/sys/arch/alpha/tc/ioasic.c
index 209c0e68314..2e154efd1e3 100644
--- a/sys/arch/alpha/tc/ioasic.c
+++ b/sys/arch/alpha/tc/ioasic.c
@@ -1,7 +1,7 @@
-/*	$NetBSD: ioasic.c,v 1.1 1995/12/20 00:43:20 cgd Exp $	*/
+/*	$NetBSD: ioasic.c,v 1.4.4.1 1996/06/05 00:39:05 cgd Exp $	*/
 
 /*
- * Copyright (c) 1994, 1995 Carnegie-Mellon University.
+ * Copyright (c) 1994, 1995, 1996 Carnegie-Mellon University.
  * All rights reserved.
  *
  * Author: Keith Bostic, Chris G. Demetriou
@@ -35,6 +35,9 @@
 #include <machine/autoconf.h>
 #include <machine/pte.h>
 #include <machine/rpb.h>
+#ifndef EVCNT_COUNTERS
+#include <machine/intrcnt.h>
+#endif
 
 #include <dev/tc/tcvar.h>
 #include <alpha/tc/ioasicreg.h>
@@ -51,9 +54,14 @@ struct ioasic_softc {
 int	ioasicmatch __P((struct device *, void *, void *));
 void	ioasicattach __P((struct device *, struct device *, void *));
 int     ioasicprint(void *, char *);
-struct cfdriver ioasiccd =
-    { NULL, "ioasic", ioasicmatch, ioasicattach, DV_DULL,
-    sizeof(struct ioasic_softc) };
+
+struct cfattach ioasic_ca = {
+	sizeof(struct ioasic_softc), ioasicmatch, ioasicattach,
+};
+
+struct cfdriver ioasic_cd = {
+	NULL, "ioasic", DV_DULL,
+};
 
 int	ioasic_intr __P((void *));
 int	ioasic_intrnull __P((void *));
@@ -75,7 +83,8 @@ struct ioasic_dev {
 	void		*iad_cookie;
 	u_int32_t	iad_intrbits;
 } ioasic_devs[] = {
-	{ "lance   ", 0x000c0000, C(IOASIC_DEV_LANCE), IOASIC_INTR_LANCE, },
+	/* XXX lance name */
+	{ "lance",    0x000c0000, C(IOASIC_DEV_LANCE), IOASIC_INTR_LANCE, },
 	{ "z8530   ", 0x00100000, C(IOASIC_DEV_SCC0),  IOASIC_INTR_SCC_0, },
 	{ "z8530   ", 0x00180000, C(IOASIC_DEV_SCC1),  IOASIC_INTR_SCC_1, },
 	{ "TOY_RTC ", 0x00200000, C(IOASIC_DEV_BOGUS), 0,                 },
@@ -101,10 +110,10 @@ ioasicmatch(parent, cfdata, aux)
 	void *cfdata;
 	void *aux;
 {
-	struct tcdev_attach_args *tcdev = aux;
+	struct tc_attach_args *ta = aux;
 
 	/* Make sure that we're looking for this type of device. */
-	if (strncmp("FLAMG-IO", tcdev->tcda_modname, TC_ROM_LLEN))
+	if (strncmp("FLAMG-IO", ta->ta_modname, TC_ROM_LLEN))
 		return (0);
 
 	/* Check that it can actually exist. */
@@ -123,15 +132,15 @@ ioasicattach(parent, self, aux)
 	void *aux;
 {
 	struct ioasic_softc *sc = (struct ioasic_softc *)self;
-	struct tcdev_attach_args *tcdev = aux;
+	struct tc_attach_args *ta = aux;
 	struct ioasicdev_attach_args ioasicdev;
 	u_long i;
 
 	ioasicfound = 1;
 
-	sc->sc_base = tcdev->tcda_addr;
+	sc->sc_base = ta->ta_addr;
 	ioasic_base = sc->sc_base;			/* XXX XXX XXX */
-	sc->sc_cookie = tcdev->tcda_cookie;
+	sc->sc_cookie = ta->ta_cookie;
 
 #ifdef DEC_3000_300
 	if (cputype == ST_DEC_3000_300) {
@@ -292,10 +301,18 @@ ioasic_intr(val)
 
 		sir = *sirp;
 
+#ifdef EVCNT_COUNTERS
+	/* No interrupt counting via evcnt counters */ 
+	XXX BREAK HERE XXX
+#else /* !EVCNT_COUNTERS */
+#define	INCRINTRCNT(slot)	intrcnt[INTRCNT_IOASIC + slot]++
+#endif /* EVCNT_COUNTERS */ 
+
 		/* XXX DUPLICATION OF INTERRUPT BIT INFORMATION... */
 #define	CHECKINTR(slot, bits)						\
 		if (sir & bits) {					\
 			ifound = 1;					\
+			INCRINTRCNT(slot);				\
 			(*ioasicintrs[slot].iai_func)			\
 			    (ioasicintrs[slot].iai_arg);		\
 		}
@@ -335,42 +352,3 @@ ioasic_lance_dma_setup(v)
 	    IOASIC_CSR_DMAEN_LANCE;
 	tc_mb();
 }
-
-#ifdef DEC_3000_300
-void
-ioasic_intr_300_opt0_enable(enable)
-	int enable;
-{
-
-	if (enable)
-		*(volatile u_int32_t *)IOASIC_REG_IMSK(ioasic_base) |=
-			IOASIC_INTR_300_OPT0;
-	else
-		*(volatile u_int32_t *)IOASIC_REG_IMSK(ioasic_base) &=
-			~IOASIC_INTR_300_OPT0;
-}
-
-void
-ioasic_intr_300_opt1_enable(enable)
-	int enable;
-{
-
-	if (enable)
-		*(volatile u_int32_t *)IOASIC_REG_IMSK(ioasic_base) |=
-			IOASIC_INTR_300_OPT1;
-	else
-		*(volatile u_int32_t *)IOASIC_REG_IMSK(ioasic_base) &=
-			~IOASIC_INTR_300_OPT1;
-}
-
-void
-ioasic_300_opts_isintr(opt0, opt1)
-	int *opt0, *opt1;
-{
-	u_int32_t sir;
-
-	sir = *(volatile u_int32_t *)IOASIC_REG_INTR(ioasic_base);
-	*opt0 = sir & IOASIC_INTR_300_OPT0;
-	*opt1 = sir & IOASIC_INTR_300_OPT1;
-}
-#endif
diff --git a/sys/arch/alpha/tc/mcclock_ioasic.c b/sys/arch/alpha/tc/mcclock_ioasic.c
new file mode 100644
index 00000000000..340a75f82c1
--- /dev/null
+++ b/sys/arch/alpha/tc/mcclock_ioasic.c
@@ -0,0 +1,112 @@
+/*	$NetBSD: mcclock_ioasic.c,v 1.2 1996/04/17 22:22:58 cgd Exp $	*/
+
+/*
+ * Copyright (c) 1994, 1995, 1996 Carnegie-Mellon University.
+ * All rights reserved.
+ *
+ * Author: Chris G. Demetriou
+ *
+ * Permission to use, copy, modify and distribute this software and
+ * its documentation is hereby granted, provided that both the copyright
+ * notice and this permission notice appear in all copies of the
+ * software, derivative works or modified versions, and any portions
+ * thereof, and that both notices appear in supporting documentation.
+ *
+ * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
+ * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
+ * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
+ *
+ * Carnegie Mellon requests users of this software to return to
+ *
+ *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
+ *  School of Computer Science
+ *  Carnegie Mellon University
+ *  Pittsburgh PA 15213-3890
+ *
+ * any improvements or extensions that they make and grant Carnegie the
+ * rights to redistribute these changes.
+ */
+
+#include <sys/param.h>
+#include <sys/kernel.h>
+#include <sys/systm.h>
+#include <sys/device.h>
+
+#include <alpha/alpha/clockvar.h>
+#include <alpha/alpha/mcclockvar.h>
+#include <dev/ic/mc146818reg.h>
+#include <dev/tc/tcreg.h>
+#include <dev/tc/tcvar.h> 
+#include <dev/tc/ioasicvar.h>                   /* XXX */
+
+struct mcclock_ioasic_clockdatum {
+	u_char	datum;
+	char	pad[3];
+};
+
+struct mcclock_ioasic_softc {
+	struct mcclock_softc	sc_mcclock;
+
+	struct mcclock_ioasic_clockdatum *sc_dp;
+};
+
+int	mcclock_ioasic_match __P((struct device *, void *, void *));
+void	mcclock_ioasic_attach __P((struct device *, struct device *, void *));
+
+struct cfattach mcclock_ioasic_ca = {
+	sizeof (struct mcclock_ioasic_softc), mcclock_ioasic_match,
+	    mcclock_ioasic_attach, 
+};
+
+void	mcclock_ioasic_write __P((struct mcclock_softc *, u_int, u_int));
+u_int	mcclock_ioasic_read __P((struct mcclock_softc *, u_int));
+
+const struct mcclock_busfns mcclock_ioasic_busfns = {
+	mcclock_ioasic_write, mcclock_ioasic_read,
+};
+
+int
+mcclock_ioasic_match(parent, match, aux)
+	struct device *parent;
+	void *match, *aux;
+{
+	struct ioasicdev_attach_args *d = aux;
+
+	if (strncmp("TOY_RTC ", d->iada_modname, TC_ROM_LLEN))
+		return (0);
+
+	return (1);
+}
+
+void
+mcclock_ioasic_attach(parent, self, aux)
+	struct device *parent, *self;
+	void *aux;
+{
+	struct ioasicdev_attach_args *ioasicdev = aux;
+	struct mcclock_ioasic_softc *sc = (struct mcclock_ioasic_softc *)self;
+
+	sc->sc_dp = (struct mcclock_ioasic_clockdatum *)ioasicdev->iada_addr;
+
+	mcclock_attach(&sc->sc_mcclock, &mcclock_ioasic_busfns);
+}
+
+void
+mcclock_ioasic_write(dev, reg, datum)
+	struct mcclock_softc *dev;
+	u_int reg, datum;
+{
+	struct mcclock_ioasic_softc *sc = (struct mcclock_ioasic_softc *)dev;
+
+	sc->sc_dp[reg].datum = datum;
+}
+
+u_int
+mcclock_ioasic_read(dev, reg)
+	struct mcclock_softc *dev;
+	u_int reg;
+{
+	struct mcclock_ioasic_softc *sc = (struct mcclock_ioasic_softc *)dev;
+
+	return (sc->sc_dp[reg].datum);
+}
diff --git a/sys/arch/alpha/tc/scc.c b/sys/arch/alpha/tc/scc.c
index cb2f4718217..c8b30499bb0 100644
--- a/sys/arch/alpha/tc/scc.c
+++ b/sys/arch/alpha/tc/scc.c
@@ -1,7 +1,7 @@
-/*	$NetBSD: scc.c,v 1.11 1995/12/20 00:43:24 cgd Exp $	*/
+/*	$NetBSD: scc.c,v 1.16.4.2 1996/06/03 19:44:41 cgd Exp $	*/
 
 /* 
- * Copyright (c) 1991,1990,1989,1994,1995 Carnegie Mellon University
+ * Copyright (c) 1991,1990,1989,1994,1995,1996 Carnegie Mellon University
  * All Rights Reserved.
  * 
  * Permission to use, copy, modify and distribute this software and its
@@ -63,7 +63,7 @@
  *	@(#)scc.c	8.2 (Berkeley) 11/30/93
  */
 
-#include <scc.h>
+#include "scc.h"
 #if NSCC > 0
 /*
  * Intel 82530 dual usart chip driver. Supports the serial port(s) on the
@@ -175,8 +175,14 @@ struct speedtab sccspeedtab[] = {
 /* Definition of the driver for autoconfig. */
 static int      sccmatch(struct device *, void *, void *);
 static void     sccattach(struct device *, struct device *, void *);
-struct cfdriver scccd =
-    { NULL, "scc", sccmatch, sccattach, DV_TTY, sizeof (struct scc_softc) };
+
+struct cfattach scc_ca = {
+	sizeof (struct scc_softc), sccmatch, sccattach,
+};
+
+struct cfdriver scc_cd = {
+	NULL, "scc", DV_TTY,
+};
 
 int		sccGetc __P((dev_t));
 void		sccPutc __P((dev_t, int));
@@ -299,6 +305,8 @@ sccattach(parent, self, aux)
 	for (cntr = 0; cntr < 2; cntr++) {
 		pdp->p_addr = (void *)sccaddr;
 		tp = scc_tty[sc->sc_dv.dv_unit * 2 + cntr] = ttymalloc();
+		if (cntr == 0)
+			tty_attach(tp);
 		pdp->p_arg = (long)tp;
 		pdp->p_fcn = (void (*)())0;
 		tp->t_dev = (dev_t)((sc->sc_dv.dv_unit << 1) | cntr);
@@ -349,7 +357,7 @@ sccattach(parent, self, aux)
                 s = spltty();
                 ctty.t_dev = makedev(SCCDEV,
                     sc->sc_dv.dv_unit == 0 ? SCCCOMM2_PORT : SCCCOMM3_PORT);
-                cterm.c_cflag = CS8;
+                cterm.c_cflag = (TTYDEF_CFLAG & ~(CSIZE | PARENB)) | CS8;
                 cterm.c_ospeed = cterm.c_ispeed = 9600;
                 (void) sccparam(&ctty, &cterm);
                 DELAY(1000);
@@ -457,9 +465,9 @@ sccopen(dev, flag, mode, p)
 	int s, error = 0;
 
 	unit = SCCUNIT(dev);
-	if (unit >= scccd.cd_ndevs)
+	if (unit >= scc_cd.cd_ndevs)
 		return (ENXIO);
-	sc = scccd.cd_devs[unit];
+	sc = scc_cd.cd_devs[unit];
 	if (!sc)
 		return (ENXIO);
 
@@ -467,8 +475,10 @@ sccopen(dev, flag, mode, p)
 	if (sc->scc_pdma[line].p_addr == NULL)
 		return (ENXIO);
 	tp = scc_tty[minor(dev)];
-	if (tp == NULL)
+	if (tp == NULL) {
 		tp = scc_tty[minor(dev)] = ttymalloc();
+		tty_attach(tp);
+	}
 	tp->t_oproc = sccstart;
 	tp->t_param = sccparam;
 	tp->t_dev = dev;
@@ -514,7 +524,7 @@ sccclose(dev, flag, mode, p)
 	int flag, mode;
 	struct proc *p;
 {
-	register struct scc_softc *sc = scccd.cd_devs[SCCUNIT(dev)];
+	register struct scc_softc *sc = scc_cd.cd_devs[SCCUNIT(dev)];
 	register struct tty *tp;
 	register int line;
 
@@ -586,7 +596,7 @@ sccioctl(dev, cmd, data, flag, p)
 		return (error);
 
 	line = SCCLINE(dev);
-	sc = scccd.cd_devs[SCCUNIT(dev)];
+	sc = scc_cd.cd_devs[SCCUNIT(dev)];
 	switch (cmd) {
 
 	case TIOCSBRK:
@@ -671,7 +681,7 @@ sccparam(tp, t)
 		return (0);
 	}
 
-	sc = scccd.cd_devs[SCCUNIT(tp->t_dev)];
+	sc = scc_cd.cd_devs[SCCUNIT(tp->t_dev)];
 	line = SCCLINE(tp->t_dev);
 	regs = (scc_regmap_t *)sc->scc_pdma[line].p_addr;
 
@@ -786,7 +796,7 @@ sccintr(xxxunit)
 	register int cc, chan, rr1, rr2, rr3;
 	int overrun = 0;
 
-	sc = scccd.cd_devs[unit];
+	sc = scc_cd.cd_devs[unit];
 	regs = (scc_regmap_t *)sc->scc_pdma[0].p_addr;
 	unit <<= 1;
 	for (;;) {
@@ -948,7 +958,7 @@ sccstart(tp)
 	u_char temp;
 	int s, sendone;
 
-	sc = scccd.cd_devs[SCCUNIT(tp->t_dev)];
+	sc = scc_cd.cd_devs[SCCUNIT(tp->t_dev)];
 	dp = &sc->scc_pdma[SCCLINE(tp->t_dev)];
 	regs = (scc_regmap_t *)dp->p_addr;
 	s = spltty();
@@ -982,6 +992,7 @@ sccstart(tp)
 		}
 		goto out;
 	}
+#if 0
 	if (tp->t_flags & (RAW|LITOUT))
 		cc = ndqb(&tp->t_outq, 0);
 	else {
@@ -993,6 +1004,9 @@ sccstart(tp)
 			goto out;
 		}
 	}
+#else
+	cc = ndqb(&tp->t_outq, 0);
+#endif
 	tp->t_state |= TS_BUSY;
 	dp->p_end = dp->p_mem = tp->t_outq.c_cf;
 	dp->p_end += cc;
@@ -1034,7 +1048,7 @@ sccstop(tp, flag)
 	register struct scc_softc *sc;
 	register int s;
 
-	sc = scccd.cd_devs[SCCUNIT(tp->t_dev)];
+	sc = scc_cd.cd_devs[SCCUNIT(tp->t_dev)];
 	dp = &sc->scc_pdma[SCCLINE(tp->t_dev)];
 	s = spltty();
 	if (tp->t_state & TS_BUSY) {
@@ -1058,7 +1072,7 @@ sccmctl(dev, bits, how)
 	register u_char value;
 	int s;
 
-	sc = scccd.cd_devs[SCCUNIT(dev)];
+	sc = scc_cd.cd_devs[SCCUNIT(dev)];
 	line = SCCLINE(dev);
 	regs = (scc_regmap_t *)sc->scc_pdma[line].p_addr;
 	s = spltty();
@@ -1122,7 +1136,7 @@ scc_modem_intr(dev)
 	register u_char value;
 	int s;
 
-	sc = scccd.cd_devs[SCCUNIT(dev)];
+	sc = scc_cd.cd_devs[SCCUNIT(dev)];
 	tp = scc_tty[minor(dev)];
 	chan = SCCLINE(dev);
 	regs = (scc_regmap_t *)sc->scc_pdma[chan].p_addr;
@@ -1160,7 +1174,7 @@ sccGetc(dev)
 	int s;
 
 	line = SCCLINE(dev);
-	sc = scccd.cd_devs[SCCUNIT(dev)];
+	sc = scc_cd.cd_devs[SCCUNIT(dev)];
 	regs = (scc_regmap_t *)sc->scc_pdma[line].p_addr;
 	if (!regs)
 		return (0);
@@ -1202,7 +1216,7 @@ sccPutc(dev, c)
 
 	s = splhigh();
 	line = SCCLINE(dev);
-	sc = scccd.cd_devs[SCCUNIT(dev)];
+	sc = scc_cd.cd_devs[SCCUNIT(dev)];
 	regs = (scc_regmap_t *)sc->scc_pdma[line].p_addr;
 
 	/*
diff --git a/sys/arch/alpha/tc/sfb.c b/sys/arch/alpha/tc/sfb.c
new file mode 100644
index 00000000000..acf0d68da63
--- /dev/null
+++ b/sys/arch/alpha/tc/sfb.c
@@ -0,0 +1,411 @@
+/*	$NetBSD: sfb.c,v 1.1 1996/05/01 21:15:50 cgd Exp $	*/
+
+/*
+ * Copyright (c) 1995, 1996 Carnegie-Mellon University.
+ * All rights reserved.
+ *
+ * Author: Chris G. Demetriou
+ * 
+ * Permission to use, copy, modify and distribute this software and
+ * its documentation is hereby granted, provided that both the copyright
+ * notice and this permission notice appear in all copies of the
+ * software, derivative works or modified versions, and any portions
+ * thereof, and that both notices appear in supporting documentation.
+ * 
+ * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" 
+ * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND 
+ * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
+ * 
+ * Carnegie Mellon requests users of this software to return to
+ *
+ *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
+ *  School of Computer Science
+ *  Carnegie Mellon University
+ *  Pittsburgh PA 15213-3890
+ *
+ * any improvements or extensions that they make and grant Carnegie the
+ * rights to redistribute these changes.
+ */
+
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <sys/kernel.h>
+#include <sys/device.h>
+#include <sys/malloc.h>
+#include <sys/buf.h>
+#include <sys/conf.h>
+#include <sys/ioctl.h>
+
+#include <machine/bus.h>
+#include <machine/intr.h>
+
+#include <dev/tc/tcvar.h>
+#include <machine/sfbreg.h>
+#include <alpha/tc/sfbvar.h>
+#if 0
+#include <alpha/tc/bt459reg.h>
+#endif
+
+#include <dev/rcons/raster.h>
+#include <alpha/wscons/wscons_raster.h>
+#include <alpha/wscons/wsconsvar.h>
+#include <machine/fbio.h>
+
+#include <machine/autoconf.h>
+#include <machine/pte.h>
+
+int	sfbmatch __P((struct device *, void *, void *));
+void	sfbattach __P((struct device *, struct device *, void *));
+int	sfbprint __P((void *, char *));
+
+struct cfattach sfb_ca = {
+	sizeof(struct sfb_softc), sfbmatch, sfbattach,
+};
+
+struct cfdriver sfb_cd = {
+	NULL, "sfb", DV_DULL,
+};
+
+void	sfb_getdevconfig __P((tc_addr_t dense_addr, struct sfb_devconfig *dc));
+struct sfb_devconfig sfb_console_dc;
+
+struct wscons_emulfuncs sfb_emulfuncs = {
+	rcons_cursor,			/* could use hardware cursor; punt */
+	rcons_putstr,
+	rcons_copycols,
+	rcons_erasecols,
+	rcons_copyrows,
+	rcons_eraserows,
+};
+
+int	sfbioctl __P((struct device *, u_long, caddr_t, int, struct proc *));
+int	sfbmmap __P((struct device *, off_t, int));
+
+#if 0
+void	sfb_blank __P((struct sfb_devconfig *));
+void	sfb_unblank __P((struct sfb_devconfig *));
+#endif
+
+int
+sfbmatch(parent, match, aux)
+	struct device *parent;
+	void *match, *aux;
+{
+	struct cfdata *cf = match;
+	struct tc_attach_args *ta = aux;
+
+	if (strncmp("PMAGB-BA", ta->ta_modname, TC_ROM_LLEN) != 0)
+		return (0);
+
+	return (10);
+}
+
+void
+sfb_getdevconfig(dense_addr, dc)
+	tc_addr_t dense_addr;
+	struct sfb_devconfig *dc;
+{
+	struct raster *rap;
+	struct rcons *rcp;
+	char *regp, *ramdacregp;
+	int i;
+
+	dc->dc_vaddr = dense_addr;
+	dc->dc_paddr = k0segtophys(dc->dc_vaddr);		/* XXX */
+	dc->dc_size = SFB_SIZE;
+
+	regp = (char *)dc->dc_vaddr + SFB_ASIC_OFFSET;
+	ramdacregp = (char *)dc->dc_vaddr + SFB_RAMDAC_OFFSET;
+
+	dc->dc_wid =
+	    (*(volatile u_int32_t *)(regp + SFB_ASIC_VIDEO_HSETUP) & 0x1ff) * 4;
+	dc->dc_ht =
+	    (*(volatile u_int32_t *)(regp + SFB_ASIC_VIDEO_VSETUP) & 0x7ff);
+
+	switch (*(volatile u_int32_t *)(regp + SFB_ASIC_DEEP)) {
+	case 0:
+	case 1:					/* XXX by the book; wrong? */
+		dc->dc_depth = 8;		/* 8 plane */
+		break;
+	case 2:
+		dc->dc_depth = 16;		/* 16 plane */
+		break;
+	case 4:
+		dc->dc_depth = 32;		/* 32 plane */
+		break;
+	default:
+		dc->dc_depth = 8;		/* XXX can't happen? */
+		break;
+	}
+
+	dc->dc_rowbytes = dc->dc_wid * (dc->dc_depth / 8);
+
+	dc->dc_videobase = dc->dc_vaddr + SFB_FB_OFFSET +
+	    ((*(volatile u_int32_t *)(regp + SFB_ASIC_VIDEO_BASE)) *
+	     4096 * (dc->dc_depth / 8));
+	
+	(*(volatile u_int32_t *)(regp + SFB_ASIC_MODE)) = 0;
+	tc_wmb();
+	(*(volatile u_int32_t *)(regp + SFB_ASIC_VIDEO_VALID)) = 1;
+	tc_wmb();
+
+	/*
+	 * Set all bits in the pixel mask, to enable writes to all pixels.
+	 * It seems that the console firmware clears some of them
+	 * under some circumstances, which causes cute vertical stripes.
+	 */
+	(*(volatile u_int32_t *)(regp + SFB_ASIC_PIXELMASK)) = 0xffffffff;
+	tc_wmb();
+	(*(volatile u_int32_t *)(regp + SFB_ASIC_PLANEMASK)) = 0xffffffff;
+	tc_wmb();
+
+	/* Initialize the RAMDAC/colormap */
+	/* start XXX XXX XXX */
+	(*(volatile u_int32_t *)(ramdacregp + SFB_RAMDAC_ADDRLOW)) = 0;
+	(*(volatile u_int32_t *)(ramdacregp + SFB_RAMDAC_ADDRHIGH)) = 0;
+	tc_wmb();
+	for (i = 0; i < 256; i++) {
+		(*(volatile u_int32_t *)(ramdacregp + SFB_RAMDAC_CMAPDATA)) =
+		    i ? 0xff : 0;
+		tc_wmb();
+		(*(volatile u_int32_t *)(ramdacregp + SFB_RAMDAC_CMAPDATA)) =
+		    i ? 0xff : 0;
+		tc_wmb();
+		(*(volatile u_int32_t *)(ramdacregp + SFB_RAMDAC_CMAPDATA)) =
+		    i ? 0xff : 0;
+		tc_wmb();
+	}
+	/* end XXX XXX XXX */
+	
+	/* clear the screen */
+	for (i = 0; i < dc->dc_ht * dc->dc_rowbytes; i += sizeof(u_int32_t))
+		*(u_int32_t *)(dc->dc_videobase + i) = 0x00000000;
+
+	/* initialize the raster */
+	rap = &dc->dc_raster;
+	rap->width = dc->dc_wid;
+	rap->height = dc->dc_ht;
+	rap->depth = 8;
+	rap->linelongs = dc->dc_rowbytes / sizeof(u_int32_t);
+	rap->pixels = (u_int32_t *)dc->dc_videobase;
+
+	/* initialize the raster console blitter */
+	rcp = &dc->dc_rcons;
+	rcp->rc_sp = rap;
+	rcp->rc_crow = rcp->rc_ccol = -1;
+	rcp->rc_crowp = &rcp->rc_crow;
+	rcp->rc_ccolp = &rcp->rc_ccol;
+	rcons_init(rcp, 34, 80);
+}
+
+void
+sfbattach(parent, self, aux)
+	struct device *parent, *self;
+	void *aux;
+{
+	struct sfb_softc *sc = (struct sfb_softc *)self;
+	struct tc_attach_args *ta = aux;
+	struct wscons_attach_args waa;
+	struct wscons_odev_spec *wo;
+	int console;
+	char *x;
+
+	console = 0;					/* XXX */
+	if (console)
+		sc->sc_dc = &sfb_console_dc;
+	else {
+		sc->sc_dc = (struct sfb_devconfig *)
+		    malloc(sizeof(struct sfb_devconfig), M_DEVBUF, M_WAITOK);
+		sfb_getdevconfig(ta->ta_addr, sc->sc_dc);
+	}
+	if (sc->sc_dc->dc_vaddr == NULL) {
+		printf(": couldn't map memory space; punt!\n");
+		return;
+	}
+	printf(": %d x %d, %dbpp\n", sc->sc_dc->dc_wid, sc->sc_dc->dc_ht,
+	    sc->sc_dc->dc_depth);
+
+#if 0
+	x = (char *)ta->ta_addr + SFB_ASIC_OFFSET;
+	printf("%s: Video Base Address = 0x%x\n", self->dv_xname,
+	    *(u_int32_t *)(x + SFB_ASIC_VIDEO_BASE));
+	printf("%s: Horizontal Setup = 0x%x\n", self->dv_xname,
+	    *(u_int32_t *)(x + SFB_ASIC_VIDEO_HSETUP));
+	printf("%s: Vertical Setup = 0x%x\n", self->dv_xname,
+	    *(u_int32_t *)(x + SFB_ASIC_VIDEO_VSETUP));
+#endif
+
+	waa.waa_isconsole = console;
+	wo = &waa.waa_odev_spec;
+	wo->wo_ef = &sfb_emulfuncs;
+	wo->wo_efa = &sc->sc_dc->dc_rcons;
+	wo->wo_nrows = sc->sc_dc->dc_rcons.rc_maxrow;
+	wo->wo_ncols = sc->sc_dc->dc_rcons.rc_maxcol;
+	wo->wo_crow = 0;
+	wo->wo_ccol = 0;
+	wo->wo_ioctl = sfbioctl;
+	wo->wo_mmap = sfbmmap;
+
+	config_found(self, &waa, sfbprint);
+}
+
+int
+sfbprint(aux, pnp)
+	void *aux;
+	char *pnp;
+{
+
+	if (pnp)
+		printf("wscons at %s", pnp);
+	return (UNCONF);
+}
+
+int
+sfbioctl(dev, cmd, data, flag, p)
+	struct device *dev;
+	u_long cmd;
+	caddr_t data;
+	int flag;
+	struct proc *p;
+{
+	struct sfb_softc *sc = (struct sfb_softc *)dev;
+	struct sfb_devconfig *dc = sc->sc_dc;
+
+	switch (cmd) {
+	case FBIOGTYPE:
+#define fbt ((struct fbtype *)data)
+		fbt->fb_type = FBTYPE_SFB;
+		fbt->fb_height = sc->sc_dc->dc_ht;
+		fbt->fb_width = sc->sc_dc->dc_wid;
+		fbt->fb_depth = sc->sc_dc->dc_depth;
+		fbt->fb_cmsize = 256;		/* XXX ??? */
+		fbt->fb_size = sc->sc_dc->dc_size;
+#undef fbt
+		return (0);
+
+#if 0
+	case FBIOPUTCMAP:
+		return (*tgar->tgar_set_cmap)(dc, (struct fbcmap *)data);
+
+	case FBIOGETCMAP:
+		return (*tgar->tgar_get_cmap)(dc, (struct fbcmap *)data);
+#endif
+
+	case FBIOGATTR:
+		return (ENOTTY);			/* XXX ? */
+
+#if 0
+	case FBIOSVIDEO:
+		if (*(int *)data == FBVIDEO_OFF)
+			sfb_blank(sc->sc_dc);
+		else
+			sfb_unblank(sc->sc_dc);
+		return (0);
+#endif
+
+	case FBIOGVIDEO:
+		*(int *)data = dc->dc_blanked ? FBVIDEO_OFF : FBVIDEO_ON;
+		return (0);
+
+#if 0
+	case FBIOSCURSOR:
+		return (*tgar->tgar_set_cursor)(dc, (struct fbcursor *)data);
+
+	case FBIOGCURSOR:
+		return (*tgar->tgar_get_cursor)(dc, (struct fbcursor *)data);
+
+	case FBIOSCURPOS:
+		return (*tgar->tgar_set_curpos)(dc, (struct fbcurpos *)data);
+
+	case FBIOGCURPOS:
+		return (*tgar->tgar_get_curpos)(dc, (struct fbcurpos *)data);
+
+	case FBIOGCURMAX:
+		return (*tgar->tgar_get_curmax)(dc, (struct fbcurpos *)data);
+#endif
+	}
+	return (-1);
+}
+
+int
+sfbmmap(dev, offset, prot)
+	struct device *dev;
+	off_t offset;
+	int prot;
+{
+	struct sfb_softc *sc = (struct sfb_softc *)dev;
+
+	if (offset > SFB_SIZE)
+		return -1;
+	return alpha_btop(sc->sc_dc->dc_paddr + offset);
+}
+
+#if 0
+void
+tga_console(bc, pc, bus, device, function)
+	bus_chipset_tag_t bc;
+	pci_chipset_tag_t pc;
+	int bus, device, function;
+{
+	struct tga_devconfig *dcp = &tga_console_dc;
+	struct wscons_odev_spec wo;
+
+	tga_getdevconfig(bc, pc, pci_make_tag(pc, bus, device, function), dcp);
+
+	/* sanity checks */
+	if (dcp->dc_vaddr == NULL)
+		panic("tga_console(%d, %d): couldn't map memory space",
+		    device, function);
+	if (dcp->dc_tgaconf == NULL)
+		panic("tga_console(%d, %d): unknown board configuration",
+		    device, function);
+
+	/*
+	 * Initialize the RAMDAC but DO NOT allocate any private storage.
+	 * Initialization includes disabling cursor, setting a sane
+	 * colormap, etc.  It will be reinitialized in tgaattach().
+	 */
+	(*dcp->dc_tgaconf->tgac_ramdac->tgar_init)(dcp, 0);
+
+	wo.wo_ef = &tga_emulfuncs;
+	wo.wo_efa = &dcp->dc_rcons;
+	wo.wo_nrows = dcp->dc_rcons.rc_maxrow;
+	wo.wo_ncols = dcp->dc_rcons.rc_maxcol;
+	wo.wo_crow = 0;
+	wo.wo_ccol = 0;
+	/* ioctl and mmap are unused until real attachment. */
+
+	wscons_attach_console(&wo);
+}
+#endif
+
+#if 0
+/*
+ * Functions to blank and unblank the display.
+ */
+void
+sfb_blank(dc)
+	struct sfb_devconfig *dc;
+{
+	char *regp = (char *)dc->dc_vaddr + SFB_ASIC_OFFSET;
+
+	if (!dc->dc_blanked) {
+		dc->dc_blanked = 1;
+	    	*(volatile u_int32_t *)(regp + SFB_ASIC_VIDEO_VALID) = 0;
+		tc_wmb();
+	}
+}
+
+void
+sfb_unblank(dc)
+	struct sfb_devconfig *dc;
+{
+	char *regp = (char *)dc->dc_vaddr + SFB_ASIC_OFFSET;
+	
+	if (dc->dc_blanked) {
+		dc->dc_blanked = 0;
+	    	*(volatile u_int32_t *)(regp + SFB_ASIC_VIDEO_VALID) = 1;
+		tc_wmb();
+	}
+}
+#endif
diff --git a/sys/arch/alpha/tc/sfbvar.h b/sys/arch/alpha/tc/sfbvar.h
new file mode 100644
index 00000000000..afcd451f0f0
--- /dev/null
+++ b/sys/arch/alpha/tc/sfbvar.h
@@ -0,0 +1,62 @@
+/*	$NetBSD: sfbvar.h,v 1.1 1996/05/01 21:15:51 cgd Exp $	*/
+
+/*
+ * Copyright (c) 1995, 1996 Carnegie-Mellon University.
+ * All rights reserved.
+ *
+ * Author: Chris G. Demetriou
+ * 
+ * Permission to use, copy, modify and distribute this software and
+ * its documentation is hereby granted, provided that both the copyright
+ * notice and this permission notice appear in all copies of the
+ * software, derivative works or modified versions, and any portions
+ * thereof, and that both notices appear in supporting documentation.
+ * 
+ * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" 
+ * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND 
+ * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
+ * 
+ * Carnegie Mellon requests users of this software to return to
+ *
+ *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
+ *  School of Computer Science
+ *  Carnegie Mellon University
+ *  Pittsburgh PA 15213-3890
+ *
+ * any improvements or extensions that they make and grant Carnegie the
+ * rights to redistribute these changes.
+ */
+
+#include <machine/sfbreg.h>
+#include <dev/rcons/raster.h>
+#include <alpha/wscons/wsconsvar.h>
+#include <alpha/wscons/wscons_raster.h>
+
+struct sfb_devconfig;
+struct fbcmap;
+struct fbcursor;
+struct fbcurpos;
+
+struct sfb_devconfig {
+	vm_offset_t dc_vaddr;		/* memory space virtual base address */
+	vm_offset_t dc_paddr;		/* memory space physical base address */
+	vm_offset_t dc_size;		/* size of slot memory */
+
+	int	    dc_wid;		/* width of frame buffer */
+	int	    dc_ht;		/* height of frame buffer */
+	int	    dc_depth;		/* depth, bits per pixel */
+	int	    dc_rowbytes;	/* bytes in a FB scan line */
+
+	vm_offset_t dc_videobase;	/* base of flat frame buffer */
+
+	struct raster	dc_raster;	/* raster description */
+	struct rcons	dc_rcons;	/* raster blitter control info */
+
+	int	    dc_blanked;		/* currently has video disabled */
+};
+	
+struct sfb_softc {
+	struct device sc_dev;
+
+	struct sfb_devconfig *sc_dc;	/* device configuration */
+};
diff --git a/sys/arch/alpha/tc/tc_3000_300.c b/sys/arch/alpha/tc/tc_3000_300.c
index 571afab6148..0321893acdb 100644
--- a/sys/arch/alpha/tc/tc_3000_300.c
+++ b/sys/arch/alpha/tc/tc_3000_300.c
@@ -1,7 +1,7 @@
-/*	$NetBSD: tc_3000_300.c,v 1.4 1995/12/20 00:43:27 cgd Exp $	*/
+/*	$NetBSD: tc_3000_300.c,v 1.7.4.1 1996/06/05 00:39:06 cgd Exp $	*/
 
 /*
- * Copyright (c) 1994, 1995 Carnegie-Mellon University.
+ * Copyright (c) 1994, 1995, 1996 Carnegie-Mellon University.
  * All rights reserved.
  *
  * Author: Chris G. Demetriou
@@ -32,10 +32,14 @@
 
 #include <machine/autoconf.h>
 #include <machine/pte.h>
+#ifndef EVCNT_COUNTERS
+#include <machine/intrcnt.h>
+#endif
 
 #include <dev/tc/tcvar.h>
 #include <alpha/tc/tc_conf.h>
 #include <alpha/tc/tc_3000_300.h>
+#include <alpha/tc/ioasicreg.h>
 
 void	tc_3000_300_intr_setup __P((void));
 void	tc_3000_300_intr_establish __P((struct device *, void *,
@@ -48,6 +52,14 @@ int	tc_3000_300_intrnull __P((void *));
 #define	C(x)	((void *)(u_long)x)
 #define	KV(x)	(phystok0seg(x))
 
+/*
+ * We have to read and modify the IOASIC registers directly, because
+ * the TC option slot interrupt request and mask bits are stored there,
+ * and the ioasic code isn't initted when we need to frob some interrupt
+ * bits.
+ */
+#define	DEC_3000_300_IOASIC_ADDR	KV(0x1a0000000)
+
 struct tc_slotdesc tc_3000_300_slots[] = {
 	{ KV(0x100000000), C(TC_3000_300_DEV_OPT0), },	/* 0 - opt slot 0 */
 	{ KV(0x120000000), C(TC_3000_300_DEV_OPT1), },	/* 1 - opt slot 1 */
@@ -71,21 +83,17 @@ struct tcintr {
 	void	*tci_arg;
 } tc_3000_300_intr[TC_3000_300_NCOOKIES];
 
-/* XXX */
-void	ioasic_intr_300_opt0_enable __P((int));
-void	ioasic_intr_300_opt1_enable __P((int));
-void	ioasic_300_opts_isintr __P((int *, int *));
-
 void
 tc_3000_300_intr_setup()
 {
+	volatile u_int32_t *imskp;
 	u_long i;
 
 	/*
-	 * Sisable all interrupts that we can (can't disable builtins).
+	 * Disable all interrupts that we can (can't disable builtins).
 	 */
-	ioasic_intr_300_opt0_enable(0);
-	ioasic_intr_300_opt1_enable(0);
+	imskp = (volatile u_int32_t *)IOASIC_REG_IMSK(DEC_3000_300_IOASIC_ADDR);
+	*imskp &= ~(IOASIC_INTR_300_OPT0 | IOASIC_INTR_300_OPT1);
 
 	/*
 	 * Set up interrupt handlers.
@@ -103,6 +111,7 @@ tc_3000_300_intr_establish(tcadev, cookie, level, func, arg)
 	tc_intrlevel_t level;
 	int (*func) __P((void *));
 {
+	volatile u_int32_t *imskp;
 	u_long dev = (u_long)cookie;
 
 #ifdef DIAGNOSTIC
@@ -115,12 +124,13 @@ tc_3000_300_intr_establish(tcadev, cookie, level, func, arg)
 	tc_3000_300_intr[dev].tci_func = func;
 	tc_3000_300_intr[dev].tci_arg = arg;
 
+	imskp = (volatile u_int32_t *)IOASIC_REG_IMSK(DEC_3000_300_IOASIC_ADDR);
 	switch (dev) {
 	case TC_3000_300_DEV_OPT0:
-		ioasic_intr_300_opt0_enable(1);
+		*imskp |= IOASIC_INTR_300_OPT0;
 		break;
 	case TC_3000_300_DEV_OPT1:
-		ioasic_intr_300_opt1_enable(1);
+		*imskp |= IOASIC_INTR_300_OPT1;
 		break;
 	default:
 		/* interrupts for builtins always enabled */
@@ -133,6 +143,7 @@ tc_3000_300_intr_disestablish(tcadev, cookie)
 	struct device *tcadev;
 	void *cookie;
 {
+	volatile u_int32_t *imskp;
 	u_long dev = (u_long)cookie;
 
 #ifdef DIAGNOSTIC
@@ -143,12 +154,13 @@ tc_3000_300_intr_disestablish(tcadev, cookie)
 		panic("tc_3000_300_intr_disestablish: cookie %d bad intr",
 		    dev);
 
+	imskp = (volatile u_int32_t *)IOASIC_REG_IMSK(DEC_3000_300_IOASIC_ADDR);
 	switch (dev) {
 	case TC_3000_300_DEV_OPT0:
-		ioasic_intr_300_opt0_enable(0);
+		*imskp &= ~IOASIC_INTR_300_OPT0;
 		break;
 	case TC_3000_300_DEV_OPT1:
-		ioasic_intr_300_opt1_enable(0);
+		*imskp &= ~IOASIC_INTR_300_OPT1;
 		break;
 	default:
 		/* interrupts for builtins always enabled */
@@ -173,7 +185,7 @@ tc_3000_300_iointr(framep, vec)
 	void *framep;
 	int vec;
 {
-	u_int32_t ir;
+	u_int32_t tcir, ioasicir, ioasicimr;
 	int opt0intr, opt1intr, ifound;
 
 #ifdef DIAGNOSTIC
@@ -190,33 +202,53 @@ tc_3000_300_iointr(framep, vec)
 		tc_syncbus();
 
 		/* find out what interrupts/errors occurred */
-		ir = *(volatile u_int32_t *)TC_3000_300_IR;
-		ioasic_300_opts_isintr(&opt0intr, &opt1intr);
+		tcir = *(volatile u_int32_t *)TC_3000_300_IR;
+		ioasicir = *(volatile u_int32_t *)
+		    IOASIC_REG_INTR(DEC_3000_300_IOASIC_ADDR);
+		ioasicimr = *(volatile u_int32_t *)
+		    IOASIC_REG_IMSK(DEC_3000_300_IOASIC_ADDR);
 		tc_mb();
 
+		/* Ignore interrupts that aren't enabled out. */
+		ioasicir &= ioasicimr;
+
 		/* clear the interrupts/errors we found. */
-		*(volatile u_int32_t *)TC_3000_300_IR = ir;
+		*(volatile u_int32_t *)TC_3000_300_IR = tcir;
 		/* XXX can't clear TC option slot interrupts here? */
 		tc_wmb();
 
 		ifound = 0;
+
+#ifdef EVCNT_COUNTERS
+	/* No interrupt counting via evcnt counters */
+	XXX BREAK HERE XXX
+#else /* !EVCNT_COUNTERS */
+#define	INCRINTRCNT(slot)	intrcnt[INTRCNT_KN16 + slot]++
+#endif /* EVCNT_COUNTERS */
+
 #define	CHECKINTR(slot, flag)						\
-		if (flag) {					\
+		if (flag) {						\
 			ifound = 1;					\
+			INCRINTRCNT(slot);				\
 			(*tc_3000_300_intr[slot].tci_func)		\
 			    (tc_3000_300_intr[slot].tci_arg);		\
 		}
 		/* Do them in order of priority; highest slot # first. */
-		CHECKINTR(TC_3000_300_DEV_CXTURBO, ir & TC_3000_300_IR_CXTURBO);
-		CHECKINTR(TC_3000_300_DEV_IOASIC, ir & TC_3000_300_IR_IOASIC);
-		CHECKINTR(TC_3000_300_DEV_TCDS, ir & TC_3000_300_IR_TCDS);
-		CHECKINTR(TC_3000_300_DEV_OPT1, opt1intr);
-		CHECKINTR(TC_3000_300_DEV_OPT0, opt0intr);
+		CHECKINTR(TC_3000_300_DEV_CXTURBO,
+		    tcir & TC_3000_300_IR_CXTURBO);
+		CHECKINTR(TC_3000_300_DEV_IOASIC,
+		    (tcir & TC_3000_300_IR_IOASIC) &&
+	            (ioasicir & ~(IOASIC_INTR_300_OPT1|IOASIC_INTR_300_OPT0)));
+		CHECKINTR(TC_3000_300_DEV_TCDS, tcir & TC_3000_300_IR_TCDS);
+		CHECKINTR(TC_3000_300_DEV_OPT1,
+		    ioasicir & IOASIC_INTR_300_OPT1);
+		CHECKINTR(TC_3000_300_DEV_OPT0,
+		    ioasicir & IOASIC_INTR_300_OPT0);
 #undef CHECKINTR
 
 #ifdef DIAGNOSTIC
 #define PRINTINTR(msg, bits)						\
-	if (ir & bits)							\
+	if (tcir & bits)						\
 		printf(msg);
 		PRINTINTR("BCache tag parity error\n",
 		    TC_3000_300_IR_BCTAGPARITY);
diff --git a/sys/arch/alpha/tc/tc_3000_500.c b/sys/arch/alpha/tc/tc_3000_500.c
index 1ac7250e57c..336ce43e8ad 100644
--- a/sys/arch/alpha/tc/tc_3000_500.c
+++ b/sys/arch/alpha/tc/tc_3000_500.c
@@ -1,7 +1,7 @@
-/*	$NetBSD: tc_3000_500.c,v 1.3 1995/12/20 00:43:30 cgd Exp $	*/
+/*	$NetBSD: tc_3000_500.c,v 1.4.4.3 1996/06/13 18:35:35 cgd Exp $	*/
 
 /*
- * Copyright (c) 1994, 1995 Carnegie-Mellon University.
+ * Copyright (c) 1994, 1995, 1996 Carnegie-Mellon University.
  * All rights reserved.
  *
  * Author: Chris G. Demetriou
@@ -32,6 +32,9 @@
 
 #include <machine/autoconf.h>
 #include <machine/pte.h>
+#ifndef EVCNT_COUNTERS
+#include <machine/intrcnt.h>
+#endif
 
 #include <dev/tc/tcvar.h>
 #include <alpha/tc/tc_conf.h>
@@ -86,19 +89,21 @@ struct tcintr {
 	void	*tci_arg;
 } tc_3000_500_intr[TC_3000_500_NCOOKIES];
 
+u_int32_t tc_3000_500_imask;	/* intrs we want to ignore; mirrors IMR. */
+
 void
 tc_3000_500_intr_setup()
 {
 	u_long i;
-	u_int32_t imr;
 
 	/*
-	 * Disable all slot interrupts.
+	 * Disable all slot interrupts.  Note that this cannot
+	 * actually disable CXTurbo, TCDS, and IOASIC interrupts.
 	 */
-	imr = *(volatile u_int32_t *)TC_3000_500_IMR_READ;
+	tc_3000_500_imask = *(volatile u_int32_t *)TC_3000_500_IMR_READ;
 	for (i = 0; i < TC_3000_500_NCOOKIES; i++)
-		imr |= tc_3000_500_intrbits[i];
-	*(volatile u_int32_t *)TC_3000_500_IMR_WRITE = imr;
+		tc_3000_500_imask |= tc_3000_500_intrbits[i];
+	*(volatile u_int32_t *)TC_3000_500_IMR_WRITE = tc_3000_500_imask;
 	tc_mb();
 
         /*
@@ -118,7 +123,6 @@ tc_3000_500_intr_establish(tcadev, cookie, level, func, arg)
 	int (*func) __P((void *));
 {
 	u_long dev = (u_long)cookie;
-	u_int32_t imr;
 
 #ifdef DIAGNOSTIC
 	/* XXX bounds-check cookie. */
@@ -130,9 +134,8 @@ tc_3000_500_intr_establish(tcadev, cookie, level, func, arg)
 	tc_3000_500_intr[dev].tci_func = func;
 	tc_3000_500_intr[dev].tci_arg = arg;
 
-	imr = *(volatile u_int32_t *)TC_3000_500_IMR_READ;
-	imr &= ~tc_3000_500_intrbits[dev];
-	*(volatile u_int32_t *)TC_3000_500_IMR_WRITE = imr;
+	tc_3000_500_imask &= ~tc_3000_500_intrbits[dev];
+	*(volatile u_int32_t *)TC_3000_500_IMR_WRITE = tc_3000_500_imask;
 	tc_mb();
 }
 
@@ -142,7 +145,6 @@ tc_3000_500_intr_disestablish(tcadev, cookie)
 	void *cookie;
 {
 	u_long dev = (u_long)cookie;
-	u_int32_t imr;
 
 #ifdef DIAGNOSTIC
 	/* XXX bounds-check cookie. */
@@ -152,9 +154,8 @@ tc_3000_500_intr_disestablish(tcadev, cookie)
 		panic("tc_3000_500_intr_disestablish: cookie %d bad intr",
 		    dev);
 
-	imr = *(volatile u_int32_t *)TC_3000_500_IMR_READ;
-	imr |= tc_3000_500_intrbits[dev];
-	*(volatile u_int32_t *)TC_3000_500_IMR_WRITE = imr;
+	tc_3000_500_imask |= tc_3000_500_intrbits[dev];
+	*(volatile u_int32_t *)TC_3000_500_IMR_WRITE = tc_3000_500_imask;
 	tc_mb();
 
 	tc_3000_500_intr[dev].tci_func = tc_3000_500_intrnull;
@@ -192,10 +193,22 @@ tc_3000_500_iointr(framep, vec)
 		tc_syncbus();
 		ir = *(volatile u_int32_t *)TC_3000_500_IR_CLEAR;
 
+		/* Ignore interrupts that we haven't enabled. */
+		ir &= ~(tc_3000_500_imask & 0x1ff);
+
 		ifound = 0;
+
+#ifdef EVCNT_COUNTERS
+	/* No interrupt counting via evcnt counters */ 
+	XXX BREAK HERE XXX
+#else /* !EVCNT_COUNTERS */
+#define	INCRINTRCNT(slot)	intrcnt[INTRCNT_KN15 + slot]++
+#endif /* EVCNT_COUNTERS */ 
+
 #define	CHECKINTR(slot)							\
 		if (ir & tc_3000_500_intrbits[slot]) {			\
 			ifound = 1;					\
+			INCRINTRCNT(slot);				\
 			(*tc_3000_500_intr[slot].tci_func)		\
 			    (tc_3000_500_intr[slot].tci_arg);		\
 		}
diff --git a/sys/arch/alpha/tc/tc_bus_io.c b/sys/arch/alpha/tc/tc_bus_io.c
new file mode 100644
index 00000000000..5bd03d0254e
--- /dev/null
+++ b/sys/arch/alpha/tc/tc_bus_io.c
@@ -0,0 +1,318 @@
+/*	$NetBSD: tc_bus_io.c,v 1.1.4.1 1996/06/13 17:41:51 cgd Exp $	*/
+
+/*
+ * Copyright (c) 1996 Carnegie-Mellon University.
+ * All rights reserved.
+ *
+ * Author: Chris G. Demetriou
+ * 
+ * Permission to use, copy, modify and distribute this software and
+ * its documentation is hereby granted, provided that both the copyright
+ * notice and this permission notice appear in all copies of the
+ * software, derivative works or modified versions, and any portions
+ * thereof, and that both notices appear in supporting documentation.
+ * 
+ * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" 
+ * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND 
+ * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
+ * 
+ * Carnegie Mellon requests users of this software to return to
+ *
+ *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
+ *  School of Computer Science
+ *  Carnegie Mellon University
+ *  Pittsburgh PA 15213-3890
+ *
+ * any improvements or extensions that they make and grant Carnegie the
+ * rights to redistribute these changes.
+ */
+
+/*
+ * TurboChannel "bus I/O" functions:
+ * These functions make no sense for TC, and just panic.
+ */
+
+#include <sys/param.h>
+#include <sys/malloc.h>
+#include <sys/syslog.h>
+#include <sys/device.h>
+#include <vm/vm.h>
+
+#include <machine/bus.h>
+
+int		tc_io_map __P((void *, bus_io_addr_t, bus_io_size_t,
+		    bus_io_handle_t *));
+void		tc_io_unmap __P((void *, bus_io_handle_t,
+		    bus_io_size_t));
+int		tc_io_subregion __P((void *, bus_io_handle_t, bus_io_size_t,
+		    bus_io_size_t, bus_io_handle_t *));
+u_int8_t	tc_io_read_1 __P((void *, bus_io_handle_t,
+		    bus_io_size_t));
+u_int16_t	tc_io_read_2 __P((void *, bus_io_handle_t,
+		    bus_io_size_t));
+u_int32_t	tc_io_read_4 __P((void *, bus_io_handle_t,
+		    bus_io_size_t));
+u_int64_t	tc_io_read_8 __P((void *, bus_io_handle_t,
+		    bus_io_size_t));
+void		tc_io_read_multi_1 __P((void *, bus_io_handle_t,
+		    bus_io_size_t, u_int8_t *, bus_io_size_t));
+void		tc_io_read_multi_2 __P((void *, bus_io_handle_t,
+		    bus_io_size_t, u_int16_t *, bus_io_size_t));
+void		tc_io_read_multi_4 __P((void *, bus_io_handle_t,
+		    bus_io_size_t, u_int32_t *, bus_io_size_t));
+void		tc_io_read_multi_8 __P((void *, bus_io_handle_t,
+		    bus_io_size_t, u_int64_t *, bus_io_size_t));
+void		tc_io_write_1 __P((void *, bus_io_handle_t,
+		    bus_io_size_t, u_int8_t));
+void		tc_io_write_2 __P((void *, bus_io_handle_t,
+		    bus_io_size_t, u_int16_t));
+void		tc_io_write_4 __P((void *, bus_io_handle_t,
+		    bus_io_size_t, u_int32_t));
+void		tc_io_write_8 __P((void *, bus_io_handle_t,
+		    bus_io_size_t, u_int64_t));
+void		tc_io_write_multi_1 __P((void *, bus_io_handle_t,
+		    bus_io_size_t, const u_int8_t *, bus_io_size_t));
+void		tc_io_write_multi_2 __P((void *, bus_io_handle_t,
+		    bus_io_size_t, const u_int16_t *, bus_io_size_t));
+void		tc_io_write_multi_4 __P((void *, bus_io_handle_t,
+		    bus_io_size_t, const u_int32_t *, bus_io_size_t));
+void		tc_io_write_multi_8 __P((void *, bus_io_handle_t,
+		    bus_io_size_t, const u_int64_t *, bus_io_size_t));
+
+void
+tc_bus_io_init(bc, iov)
+	bus_chipset_tag_t bc;
+	void *iov;
+{
+
+	bc->bc_i_v = iov;
+
+	bc->bc_i_map = tc_io_map;
+	bc->bc_i_unmap = tc_io_unmap;
+	bc->bc_i_subregion = tc_io_subregion;
+
+	bc->bc_ir1 = tc_io_read_1;
+	bc->bc_ir2 = tc_io_read_2;
+	bc->bc_ir4 = tc_io_read_4;
+	bc->bc_ir8 = tc_io_read_8;
+
+	bc->bc_irm1 = tc_io_read_multi_1;
+	bc->bc_irm2 = tc_io_read_multi_2;
+	bc->bc_irm4 = tc_io_read_multi_4;
+	bc->bc_irm8 = tc_io_read_multi_8;
+
+	bc->bc_iw1 = tc_io_write_1;
+	bc->bc_iw2 = tc_io_write_2;
+	bc->bc_iw4 = tc_io_write_4;
+	bc->bc_iw8 = tc_io_write_8;
+
+	bc->bc_iwm1 = tc_io_write_multi_1;
+	bc->bc_iwm2 = tc_io_write_multi_2;
+	bc->bc_iwm4 = tc_io_write_multi_4;
+	bc->bc_iwm8 = tc_io_write_multi_8;
+}
+
+static const char *tc_bus_io_panicstr = "tc_io_%s nonsensical; unimplemented";
+
+int
+tc_io_map(v, ioaddr, iosize, iohp)
+	void *v;
+	bus_io_addr_t ioaddr;
+	bus_io_size_t iosize;
+	bus_io_handle_t *iohp;
+{
+
+	panic(tc_bus_io_panicstr, "map");
+}
+
+void
+tc_io_unmap(v, ioh, iosize)
+	void *v;
+	bus_io_handle_t ioh;
+	bus_io_size_t iosize;
+{
+
+	panic(tc_bus_io_panicstr, "unmap");
+}
+
+int
+tc_io_subregion(v, ioh, offset, size, nioh)
+	void *v;
+	bus_io_handle_t ioh, *nioh;
+	bus_io_size_t offset, size;
+{
+
+	panic(tc_bus_io_panicstr, "subregion");
+}
+
+u_int8_t
+tc_io_read_1(v, ioh, off)
+	void *v;
+	bus_io_handle_t ioh;
+	bus_io_size_t off;
+{
+
+	panic(tc_bus_io_panicstr, "read_1");
+}
+
+u_int16_t
+tc_io_read_2(v, ioh, off)
+	void *v;
+	bus_io_handle_t ioh;
+	bus_io_size_t off;
+{
+
+	panic(tc_bus_io_panicstr, "read_2");
+}
+
+u_int32_t
+tc_io_read_4(v, ioh, off)
+	void *v;
+	bus_io_handle_t ioh;
+	bus_io_size_t off;
+{
+
+	panic(tc_bus_io_panicstr, "read_4");
+}
+
+u_int64_t
+tc_io_read_8(v, ioh, off)
+	void *v;
+	bus_io_handle_t ioh;
+	bus_io_size_t off;
+{
+
+	panic(tc_bus_io_panicstr, "read_8");
+}
+
+void
+tc_io_read_multi_1(v, ioh, off, addr, count)
+	void *v;
+	bus_io_handle_t ioh;
+	bus_io_size_t off, count;
+	u_int8_t *addr;
+{
+
+	panic(tc_bus_io_panicstr, "read_multi_1");
+}
+
+void
+tc_io_read_multi_2(v, ioh, off, addr, count)
+	void *v;
+	bus_io_handle_t ioh;
+	bus_io_size_t off, count;
+	u_int16_t *addr;
+{
+
+	panic(tc_bus_io_panicstr, "read_multi_2");
+}
+
+void
+tc_io_read_multi_4(v, ioh, off, addr, count)
+	void *v;
+	bus_io_handle_t ioh;
+	bus_io_size_t off, count;
+	u_int32_t *addr;
+{
+
+	panic(tc_bus_io_panicstr, "read_multi_4");
+}
+
+void
+tc_io_read_multi_8(v, ioh, off, addr, count)
+	void *v;
+	bus_io_handle_t ioh;
+	bus_io_size_t off, count;
+	u_int64_t *addr;
+{
+
+	panic(tc_bus_io_panicstr, "read_multi_8");
+}
+
+void
+tc_io_write_1(v, ioh, off, val)
+	void *v;
+	bus_io_handle_t ioh;
+	bus_io_size_t off;
+	u_int8_t val;
+{
+
+	panic(tc_bus_io_panicstr, "write_1");
+}
+
+void
+tc_io_write_2(v, ioh, off, val)
+	void *v;
+	bus_io_handle_t ioh;
+	bus_io_size_t off;
+	u_int16_t val;
+{
+
+	panic(tc_bus_io_panicstr, "write_2");
+}
+
+void
+tc_io_write_4(v, ioh, off, val)
+	void *v;
+	bus_io_handle_t ioh;
+	bus_io_size_t off;
+	u_int32_t val;
+{
+
+	panic(tc_bus_io_panicstr, "write_4");
+}
+
+void
+tc_io_write_8(v, ioh, off, val)
+	void *v;
+	bus_io_handle_t ioh;
+	bus_io_size_t off;
+	u_int64_t val;
+{
+
+	panic(tc_bus_io_panicstr, "write_8");
+}
+
+void
+tc_io_write_multi_1(v, ioh, off, addr, count)
+	void *v;
+	bus_io_handle_t ioh;
+	bus_io_size_t off, count;
+	const u_int8_t *addr;
+{
+
+	panic(tc_bus_io_panicstr, "write_multi_1");
+}
+
+void
+tc_io_write_multi_2(v, ioh, off, addr, count)
+	void *v;
+	bus_io_handle_t ioh;
+	bus_io_size_t off, count;
+	const u_int16_t *addr;
+{
+
+	panic(tc_bus_io_panicstr, "write_multi_2");
+}
+
+void
+tc_io_write_multi_4(v, ioh, off, addr, count)
+	void *v;
+	bus_io_handle_t ioh;
+	bus_io_size_t off, count;
+	const u_int32_t *addr;
+{
+
+	panic(tc_bus_io_panicstr, "write_multi_4");
+}
+
+void
+tc_io_write_multi_8(v, ioh, off, addr, count)
+	void *v;
+	bus_io_handle_t ioh;
+	bus_io_size_t off, count;
+	const u_int64_t *addr;
+{
+
+	panic(tc_bus_io_panicstr, "write_multi_8");
+}
diff --git a/sys/arch/alpha/tc/tc_bus_mem.c b/sys/arch/alpha/tc/tc_bus_mem.c
new file mode 100644
index 00000000000..922dd831a8b
--- /dev/null
+++ b/sys/arch/alpha/tc/tc_bus_mem.c
@@ -0,0 +1,313 @@
+/*	$NetBSD: tc_bus_mem.c,v 1.2.4.2 1996/06/13 17:42:51 cgd Exp $	*/
+
+/*
+ * Copyright (c) 1996 Carnegie-Mellon University.
+ * All rights reserved.
+ *
+ * Author: Chris G. Demetriou
+ * 
+ * Permission to use, copy, modify and distribute this software and
+ * its documentation is hereby granted, provided that both the copyright
+ * notice and this permission notice appear in all copies of the
+ * software, derivative works or modified versions, and any portions
+ * thereof, and that both notices appear in supporting documentation.
+ * 
+ * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" 
+ * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND 
+ * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
+ * 
+ * Carnegie Mellon requests users of this software to return to
+ *
+ *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
+ *  School of Computer Science
+ *  Carnegie Mellon University
+ *  Pittsburgh PA 15213-3890
+ *
+ * any improvements or extensions that they make and grant Carnegie the
+ * rights to redistribute these changes.
+ */
+
+/*
+ * Common TurboChannel Chipset "bus memory" functions.
+ */
+
+#include <sys/param.h>
+#include <sys/malloc.h>
+#include <sys/syslog.h>
+#include <sys/device.h>
+#include <vm/vm.h>
+
+#include <machine/bus.h>
+#include <dev/tc/tcvar.h>
+
+int		tc_mem_map __P((void *, bus_mem_addr_t, bus_mem_size_t,
+		    int, bus_mem_handle_t *));
+void		tc_mem_unmap __P((void *, bus_mem_handle_t,
+		    bus_mem_size_t));
+int		tc_mem_subregion __P((void *, bus_mem_handle_t, bus_mem_size_t,
+		    bus_mem_size_t, bus_mem_handle_t *));
+u_int8_t	tc_mem_read_1 __P((void *, bus_mem_handle_t,
+		    bus_mem_size_t));
+u_int16_t	tc_mem_read_2 __P((void *, bus_mem_handle_t,
+		    bus_mem_size_t));
+u_int32_t	tc_mem_read_4 __P((void *, bus_mem_handle_t,
+		    bus_mem_size_t));
+u_int64_t	tc_mem_read_8 __P((void *, bus_mem_handle_t,
+		    bus_mem_size_t));
+void		tc_mem_write_1 __P((void *, bus_mem_handle_t,
+		    bus_mem_size_t, u_int8_t));
+void		tc_mem_write_2 __P((void *, bus_mem_handle_t,
+		    bus_mem_size_t, u_int16_t));
+void		tc_mem_write_4 __P((void *, bus_mem_handle_t,
+		    bus_mem_size_t, u_int32_t));
+void		tc_mem_write_8 __P((void *, bus_mem_handle_t,
+		    bus_mem_size_t, u_int64_t));
+
+/* XXX DOES NOT BELONG */
+vm_offset_t	tc_XXX_dmamap __P((void *));
+
+void
+tc_bus_mem_init(bc, memv)
+	bus_chipset_tag_t bc;
+	void *memv;
+{
+
+	bc->bc_m_v = memv;
+
+	bc->bc_m_map = tc_mem_map;
+	bc->bc_m_unmap = tc_mem_unmap;
+	bc->bc_m_subregion = tc_mem_subregion;
+
+	bc->bc_mr1 = tc_mem_read_1;
+	bc->bc_mr2 = tc_mem_read_2;
+	bc->bc_mr4 = tc_mem_read_4;
+	bc->bc_mr8 = tc_mem_read_8;
+
+	bc->bc_mw1 = tc_mem_write_1;
+	bc->bc_mw2 = tc_mem_write_2;
+	bc->bc_mw4 = tc_mem_write_4;
+	bc->bc_mw8 = tc_mem_write_8;
+
+	/* XXX DOES NOT BELONG */
+	bc->bc_XXX_dmamap = tc_XXX_dmamap;
+}
+
+int
+tc_mem_map(v, memaddr, memsize, cacheable, memhp)
+	void *v;
+	bus_mem_addr_t memaddr;
+	bus_mem_size_t memsize;
+	int cacheable;
+	bus_mem_handle_t *memhp;
+{
+
+	if (memaddr & 0x7)
+		panic("tc_mem_map needs 8 byte alignment");
+	if (cacheable)
+		*memhp = phystok0seg(memaddr);
+	else
+		*memhp = phystok0seg(TC_DENSE_TO_SPARSE(memaddr));
+	return (0);
+}
+
+void
+tc_mem_unmap(v, memh, memsize)
+	void *v;
+	bus_mem_handle_t memh;
+	bus_mem_size_t memsize;
+{
+
+	/* XXX nothing to do. */
+}
+
+int
+tc_mem_subregion(v, memh, offset, size, nmemh)
+	void *v;
+	bus_mem_handle_t memh, *nmemh;
+	bus_mem_size_t offset, size;
+{
+
+	/* Disallow subregioning that would make the handle unaligned. */
+	if ((offset & 0x7) != 0)
+		return (1);
+
+	if ((memh & TC_SPACE_SPARSE) != 0)
+		*nmemh = memh + (offset << 1);
+	else
+		*nmemh = memh + offset;
+
+	return (0);
+}
+
+u_int8_t
+tc_mem_read_1(v, memh, off)
+	void *v;
+	bus_mem_handle_t memh;
+	bus_mem_size_t off;
+{
+	volatile u_int8_t *p;
+
+	wbflush();
+
+	if ((memh & TC_SPACE_SPARSE) != 0)
+		panic("tc_mem_read_1 not implemented for sparse space");
+
+	p = (u_int8_t *)(memh + off);
+	return (*p);
+}
+
+u_int16_t
+tc_mem_read_2(v, memh, off)
+	void *v;
+	bus_mem_handle_t memh;
+	bus_mem_size_t off;
+{
+	volatile u_int16_t *p;
+
+	wbflush();
+
+	if ((memh & TC_SPACE_SPARSE) != 0)
+		panic("tc_mem_read_2 not implemented for sparse space");
+
+	p = (u_int16_t *)(memh + off);
+	return (*p);
+}
+
+u_int32_t
+tc_mem_read_4(v, memh, off)
+	void *v;
+	bus_mem_handle_t memh;
+	bus_mem_size_t off;
+{
+	volatile u_int32_t *p;
+
+	wbflush();
+
+	if ((memh & TC_SPACE_SPARSE) != 0)
+		/* Nothing special to do for 4-byte sparse space accesses */
+		p = (u_int32_t *)(memh + (off << 1));
+	else
+		p = (u_int32_t *)(memh + off);
+	return (*p);
+}
+
+u_int64_t
+tc_mem_read_8(v, memh, off)
+	void *v;
+	bus_mem_handle_t memh;
+	bus_mem_size_t off;
+{
+	volatile u_int64_t *p;
+
+	wbflush();
+
+	if ((memh & TC_SPACE_SPARSE) != 0)
+		panic("tc_mem_read_8 not implemented for sparse space");
+
+	p = (u_int64_t *)(memh + off);
+	return (*p);
+}
+
+void
+tc_mem_write_1(v, memh, off, val)
+	void *v;
+	bus_mem_handle_t memh;
+	bus_mem_size_t off;
+	u_int8_t val;
+{
+
+	if ((memh & TC_SPACE_SPARSE) != 0) {
+		volatile u_int64_t *p, v;
+		u_int64_t shift, msk;
+
+		shift = off & 0x3;
+		off &= 0x3;
+
+		p = (u_int64_t *)(memh + (off << 1));
+
+		msk = ~(0x1 << shift) & 0xf;
+		v = (msk << 32) | (((u_int64_t)val) << (shift * 8));
+
+		*p = val;
+	} else {
+		volatile u_int8_t *p;
+
+		p = (u_int8_t *)(memh + off);
+		*p = val;
+	}
+        wbflush();
+}
+
+void
+tc_mem_write_2(v, memh, off, val)
+	void *v;
+	bus_mem_handle_t memh;
+	bus_mem_size_t off;
+	u_int16_t val;
+{
+
+	if ((memh & TC_SPACE_SPARSE) != 0) {
+		volatile u_int64_t *p, v;
+		u_int64_t shift, msk;
+
+		shift = off & 0x2;
+		off &= 0x3;
+
+		p = (u_int64_t *)(memh + (off << 1));
+
+		msk = ~(0x3 << shift) & 0xf;
+		v = (msk << 32) | (((u_int64_t)val) << (shift * 8));
+
+		*p = val;
+	} else {
+		volatile u_int16_t *p;
+
+		p = (u_int16_t *)(memh + off);
+		*p = val;
+	}
+        wbflush();
+}
+
+void
+tc_mem_write_4(v, memh, off, val)
+	void *v;
+	bus_mem_handle_t memh;
+	bus_mem_size_t off;
+	u_int32_t val;
+{
+	volatile u_int32_t *p;
+
+	if ((memh & TC_SPACE_SPARSE) != 0)
+		/* Nothing special to do for 4-byte sparse space accesses */
+		p = (u_int32_t *)(memh + (off << 1));
+	else
+		p = (u_int32_t *)(memh + off);
+	*p = val;
+        wbflush();
+}
+
+void
+tc_mem_write_8(v, memh, off, val)
+	void *v;
+	bus_mem_handle_t memh;
+	bus_mem_size_t off;
+	u_int64_t val;
+{
+	volatile u_int64_t *p;
+
+	if ((memh & TC_SPACE_SPARSE) != 0)
+		panic("tc_mem_read_8 not implemented for sparse space");
+
+	p = (u_int64_t *)(memh + off);
+	*p = val;
+        wbflush();
+}
+
+/* XXX DOES NOT BELONG */
+vm_offset_t
+tc_XXX_dmamap(addr)
+	void *addr;
+{
+
+	return (vtophys(addr));
+}
diff --git a/sys/arch/alpha/tc/tc_machdep.h b/sys/arch/alpha/tc/tc_machdep.h
new file mode 100644
index 00000000000..5287f43b048
--- /dev/null
+++ b/sys/arch/alpha/tc/tc_machdep.h
@@ -0,0 +1,92 @@
+/*	$NetBSD: tc_machdep.h,v 1.1 1995/12/20 00:09:29 cgd Exp $	*/
+
+/*
+ * Copyright (c) 1994, 1995 Carnegie-Mellon University.
+ * All rights reserved.
+ *
+ * Author: Chris G. Demetriou
+ *
+ * Permission to use, copy, modify and distribute this software and
+ * its documentation is hereby granted, provided that both the copyright
+ * notice and this permission notice appear in all copies of the
+ * software, derivative works or modified versions, and any portions
+ * thereof, and that both notices appear in supporting documentation.
+ *
+ * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
+ * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
+ * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
+ *
+ * Carnegie Mellon requests users of this software to return to
+ *
+ *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
+ *  School of Computer Science
+ *  Carnegie Mellon University
+ *  Pittsburgh PA 15213-3890
+ *
+ * any improvements or extensions that they make and grant Carnegie the
+ * rights to redistribute these changes.
+ */
+
+/*
+ * Machine-specific definitions for TurboChannel support.
+ *
+ * This file must typedef the following types:
+ *
+ *	tc_addr_t	TurboChannel bus address
+ *	tc_offset_t	TurboChannel bus address difference (offset)
+ *
+ * This file must prototype or define the following functions
+ * or macros (one or more of which may be no-ops):
+ *
+ *	tc_mb()		read/write memory barrier (any CPU<->memory
+ *			reads/writes before must complete before any
+ *			CPU<->memory reads/writes after).
+ *	tc_wmb()	write memory barrier (any CPU<->memory writes
+ *			before must complete before any CPU<->memory
+ *			writes after).
+ *	tc_syncbus()	sync TC bus; make sure CPU writes are
+ *			propagated across the TurboChannel bus.
+ *	tc_badaddr()	return non-zero if the given address is invalid.
+ *	TC_DENSE_TO_SPARSE()
+ *			convert the given physical address in
+ *			TurboChannel dense space to the corresponding
+ *			address in TurboChannel sparse space.
+ *	TC_PHYS_TO_UNCACHED()
+ *			convert the given system memory physical address
+ *			to the physical address of the corresponding
+ *			region that is not cached.
+ */
+
+typedef u_int64_t	tc_addr_t;
+typedef int32_t		tc_offset_t;
+
+#define	tc_mb()		wbflush()
+#define	tc_wmb()	wbflush()
+
+/*
+ * A junk address to read from, to make sure writes are complete.  See
+ * System Programmer's Manual, section 9.3 (p. 9-4), and sacrifice a
+ * chicken.
+ */
+#define	tc_syncbus()							\
+    do {								\
+	volatile u_int32_t no_optimize;					\
+	no_optimize =	 						\
+	    *(volatile u_int32_t *)phystok0seg(0x00000001f0080220);	\
+    } while (0)
+
+#define	tc_badaddr(tcaddr)						\
+    badaddr((void *)(tcaddr), sizeof (u_int32_t))
+
+#define	TC_SPACE_IND		0xffffffffe0000003
+#define	TC_SPACE_DENSE		0x0000000000000000
+#define TC_SPACE_DENSE_OFFSET	0x0000000007fffffc
+#define	TC_SPACE_SPARSE		0x0000000010000000
+#define	TC_SPACE_SPARSE_OFFSET	0x000000000ffffff8
+
+#define	TC_DENSE_TO_SPARSE(addr)					\
+    (((addr) & TC_SPACE_IND) | TC_SPACE_SPARSE |			\
+	(((addr) & TC_SPACE_DENSE_OFFSET) << 1))
+		
+#define	TC_PHYS_TO_UNCACHED(addr)					\
+    (addr)
diff --git a/sys/arch/alpha/tc/tcasic.c b/sys/arch/alpha/tc/tcasic.c
index 9524b08957f..742029d3f54 100644
--- a/sys/arch/alpha/tc/tcasic.c
+++ b/sys/arch/alpha/tc/tcasic.c
@@ -1,7 +1,7 @@
-/*	$NetBSD: tcasic.c,v 1.1 1995/12/20 00:43:34 cgd Exp $	*/
+/*	$NetBSD: tcasic.c,v 1.5 1996/05/17 23:58:43 cgd Exp $	*/
 
 /*
- * Copyright (c) 1994, 1995 Carnegie-Mellon University.
+ * Copyright (c) 1994, 1995, 1996 Carnegie-Mellon University.
  * All rights reserved.
  *
  * Author: Chris G. Demetriou
@@ -39,9 +39,14 @@
 /* Definition of the driver for autoconfig. */
 int	tcasicmatch(struct device *, void *, void *);
 void	tcasicattach(struct device *, struct device *, void *);
-struct cfdriver tcasiccd =
-    { NULL, "tcasic", tcasicmatch, tcasicattach, DV_DULL,
-    sizeof (struct device) };
+
+struct cfattach tcasic_ca = {
+	sizeof (struct device), tcasicmatch, tcasicattach,
+};
+
+struct cfdriver tcasic_cd = {
+	NULL, "tcasic", DV_DULL,
+};
 
 int	tcasicprint __P((void *, char *));
 
@@ -59,7 +64,7 @@ tcasicmatch(parent, cfdata, aux)
 	struct confargs *ca = aux;
 
         /* Make sure that we're looking for a TurboChannel ASIC. */
-        if (strcmp(ca->ca_name, tcasiccd.cd_name))
+        if (strcmp(ca->ca_name, tcasic_cd.cd_name))
                 return (0);
 
         /* Make sure that the system supports a TurboChannel ASIC. */
@@ -78,54 +83,61 @@ tcasicattach(parent, self, aux)
 	struct device *self;
 	void *aux;
 {
-	struct tc_attach_args tc;
+	struct tcbus_attach_args tba;
 	void (*intr_setup) __P((void));
 	void (*iointr) __P((void *, int));
+	struct alpha_bus_chipset bc;
 
+	printf("\n");
 	tcasicfound = 1;
 
 	switch (cputype) {
 #ifdef DEC_3000_500
 	case ST_DEC_3000_500:
-		printf(": 25MHz\n");
 
 		intr_setup = tc_3000_500_intr_setup;
 		iointr = tc_3000_500_iointr;
 
-		tc.tca_nslots = tc_3000_500_nslots;
-		tc.tca_slots = tc_3000_500_slots;
-		tc.tca_nbuiltins = tc_3000_500_nbuiltins;
-		tc.tca_builtins = tc_3000_500_builtins;
-		tc.tca_intr_establish = tc_3000_500_intr_establish;
-		tc.tca_intr_disestablish = tc_3000_500_intr_disestablish;
+		tba.tba_busname = "tc";
+		tba.tba_speed = TC_SPEED_25_MHZ;
+		tba.tba_nslots = tc_3000_500_nslots;
+		tba.tba_slots = tc_3000_500_slots;
+		tba.tba_nbuiltins = tc_3000_500_nbuiltins;
+		tba.tba_builtins = tc_3000_500_builtins;
+		tba.tba_intr_establish = tc_3000_500_intr_establish;
+		tba.tba_intr_disestablish = tc_3000_500_intr_disestablish;
 		break;
 #endif /* DEC_3000_500 */
 
 #ifdef DEC_3000_300
 	case ST_DEC_3000_300:
-		printf(": 12.5MHz\n");
 
 		intr_setup = tc_3000_300_intr_setup;
 		iointr = tc_3000_300_iointr;
 
-		tc.tca_nslots = tc_3000_300_nslots;
-		tc.tca_slots = tc_3000_300_slots;
-		tc.tca_nbuiltins = tc_3000_300_nbuiltins;
-		tc.tca_builtins = tc_3000_300_builtins;
-		tc.tca_intr_establish = tc_3000_300_intr_establish;
-		tc.tca_intr_disestablish = tc_3000_300_intr_disestablish;
+		tba.tba_busname = "tc";
+		tba.tba_speed = TC_SPEED_12_5_MHZ;
+		tba.tba_nslots = tc_3000_300_nslots;
+		tba.tba_slots = tc_3000_300_slots;
+		tba.tba_nbuiltins = tc_3000_300_nbuiltins;
+		tba.tba_builtins = tc_3000_300_builtins;
+		tba.tba_intr_establish = tc_3000_300_intr_establish;
+		tba.tba_intr_disestablish = tc_3000_300_intr_disestablish;
 		break;
 #endif /* DEC_3000_300 */
 
 	default:
-		printf("\n");
 		panic("tcasicattach: bad cputype");
 	}
 
+	tc_bus_io_init(&bc, NULL);
+	tc_bus_mem_init(&bc, NULL);
+	tba.tba_bc = &bc;
+
 	(*intr_setup)();
 	set_iointr(iointr);
 
-	config_found(self, &tc, tcasicprint);
+	config_found(self, &tba, tcasicprint);
 }
 
 int
diff --git a/sys/arch/alpha/tc/tcds.c b/sys/arch/alpha/tc/tcds.c
index 6c0c6490fec..940ac21c698 100644
--- a/sys/arch/alpha/tc/tcds.c
+++ b/sys/arch/alpha/tc/tcds.c
@@ -1,7 +1,7 @@
-/*	$NetBSD: tcds.c,v 1.6 1995/12/20 00:40:29 cgd Exp $	*/
+/*	$NetBSD: tcds.c,v 1.9.4.2 1996/06/05 01:32:26 cgd Exp $	*/
 
 /*
- * Copyright (c) 1994, 1995 Carnegie-Mellon University.
+ * Copyright (c) 1994, 1995, 1996 Carnegie-Mellon University.
  * All rights reserved.
  *
  * Author: Keith Bostic, Chris G. Demetriou
@@ -34,6 +34,9 @@
 
 #include <machine/pte.h>
 #include <machine/rpb.h>
+#ifndef EVCNT_COUNTERS
+#include <machine/intrcnt.h>
+#endif
 
 #include <dev/tc/tcreg.h>
 #include <dev/tc/tcvar.h>
@@ -55,8 +58,14 @@ struct tcds_softc {
 int	tcdsmatch __P((struct device *, void *, void *));
 void	tcdsattach __P((struct device *, struct device *, void *));
 int     tcdsprint(void *, char *);
-struct cfdriver tcdscd =
-    { NULL, "tcds", tcdsmatch, tcdsattach, DV_DULL, sizeof(struct tcds_softc) };
+
+struct cfattach tcds_ca = {
+	sizeof(struct tcds_softc), tcdsmatch, tcdsattach,
+};
+
+struct cfdriver tcds_cd = {
+	NULL, "tcds", DV_DULL,
+};
 
 /*static*/ int	tcds_intr __P((void *));
 /*static*/ int	tcds_intrnull __P((void *));
@@ -67,11 +76,11 @@ tcdsmatch(parent, cfdata, aux)
 	void *cfdata;
 	void *aux;
 {
-	struct tcdev_attach_args *tcdev = aux;
+	struct tc_attach_args *ta = aux;
 	extern int cputype;
 
 	/* Make sure that we're looking for this type of device. */
-	if (strncmp("PMAZ-DS ", tcdev->tcda_modname, TC_ROM_LLEN))
+	if (strncmp("PMAZ-DS ", ta->ta_modname, TC_ROM_LLEN))
 		return (0);
 	/* PMAZ-FS? */
 
@@ -88,7 +97,7 @@ tcdsattach(parent, self, aux)
 	void *aux;
 {
 	struct tcds_softc *sc = (struct tcds_softc *)self;
-	struct tcdev_attach_args *tcdev = aux;
+	struct tc_attach_args *ta = aux;
 	struct tcdsdev_attach_args tcdsdev;
 	struct tcds_slotconfig *slotc;
 	int i;
@@ -96,8 +105,8 @@ tcdsattach(parent, self, aux)
 
 	printf("\n");
 
-	sc->sc_base = tcdev->tcda_addr;
-	sc->sc_cookie = tcdev->tcda_cookie;
+	sc->sc_base = ta->ta_addr;
+	sc->sc_cookie = ta->ta_cookie;
 
 	sc->sc_cir = TCDS_REG(sc->sc_base, TCDS_CIR);
 	sc->sc_imer = TCDS_REG(sc->sc_base, TCDS_IMER);
@@ -196,11 +205,11 @@ tcdsprint(aux, pnp)
 	void *aux;
 	char *pnp;
 {
-	struct tcdev_attach_args *tcdev = aux;
+	struct tc_attach_args *ta = aux;
 
 	if (pnp)
-		printf("%s at %s", tcdev->tcda_modname, pnp);
-	printf(" slot 0x%lx", tcdev->tcda_slot);
+		printf("%s at %s", ta->ta_modname, pnp);
+	printf(" slot %d", ta->ta_slot);
 	return (UNCONF);
 }
 
@@ -349,8 +358,16 @@ tcds_intr(val)
 	tc_syncbus();
 	wbflush();
 
+#ifdef EVCNT_COUNTERS
+	/* No interrupt counting via evcnt counters */ 
+	XXX BREAK HERE XXX
+#else
+#define	INCRINTRCNT(slot)	intrcnt[INTRCNT_TCDS + slot]++
+#endif
+
 #define	CHECKINTR(slot)							\
 	if (ir & sc->sc_slots[slot].sc_intrbits) {			\
+		INCRINTRCNT(slot);					\
 		(void)(*sc->sc_slots[slot].sc_intrhand)			\
 		    (sc->sc_slots[slot].sc_intrarg);			\
 	}
diff --git a/sys/arch/alpha/tc/tcdsvar.h b/sys/arch/alpha/tc/tcdsvar.h
index 5bee7191694..540db9c8538 100644
--- a/sys/arch/alpha/tc/tcdsvar.h
+++ b/sys/arch/alpha/tc/tcdsvar.h
@@ -1,7 +1,7 @@
-/*	$NetBSD: tcdsvar.h,v 1.1 1995/12/20 00:40:41 cgd Exp $	*/
+/*	$NetBSD: tcdsvar.h,v 1.3 1996/04/12 06:10:18 cgd Exp $	*/
 
 /*
- * Copyright (c) 1995 Carnegie-Mellon University.
+ * Copyright (c) 1995, 1996 Carnegie-Mellon University.
  * All rights reserved.
  *
  * Author: Chris G. Demetriou
@@ -66,16 +66,16 @@ struct tcds_slotconfig {
 };
 
 struct tcdsdev_attach_args {
-	struct tcdev_attach_args tcdsda_tc;
+	struct tc_attach_args tcdsda_ta;
 	struct tcds_slotconfig *tcdsda_sc;
 	u_int	tcdsda_id;
 	u_int	tcdsda_freq;
 };
-#define	tcdsda_modname	tcdsda_tc.tcda_modname
-#define	tcdsda_slot	tcdsda_tc.tcda_slot
-#define	tcdsda_offset	tcdsda_tc.tcda_offset
-#define	tcdsda_addr	tcdsda_tc.tcda_addr
-#define	tcdsda_cookie	tcdsda_tc.tcda_cookie
+#define	tcdsda_modname	tcdsda_ta.ta_modname
+#define	tcdsda_slot	tcdsda_ta.ta_slot
+#define	tcdsda_offset	tcdsda_ta.ta_offset
+#define	tcdsda_addr	tcdsda_ta.ta_addr
+#define	tcdsda_cookie	tcdsda_ta.ta_cookie
 
 #define	TCDS_REG(base, off) \
     (volatile u_int32_t *)TC_DENSE_TO_SPARSE((base) + (off))
@@ -105,4 +105,4 @@ int	tcds_dmaintr	__P((struct tcds_slotconfig *));
  * The TCDS (bus) cfdriver, so that subdevices can more
  * easily tell what bus they're on.
  */
-extern struct cfdriver tcdscd;
+extern struct cfdriver tcds_cd;