Make sure all platforms understand the flags argument of bus_space_map() and

bus_space_alloc() as a bitmask of flags, and not a boolean controlling
cacheability; and make sure the three MI BUS_SPACE_MAP_xxx values documented
in the manual page are defined on all platforms as well.

5 files changed, 26 insertions, 26 deletions

diff --git a/sys/arch/alpha/pci/pci_bwx_bus_io_chipdep.c b/sys/arch/alpha/pci/pci_bwx_bus_io_chipdep.c
index 2dd720fb08b..89f84f9f152 100644
--- a/sys/arch/alpha/pci/pci_bwx_bus_io_chipdep.c
+++ b/sys/arch/alpha/pci/pci_bwx_bus_io_chipdep.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: pci_bwx_bus_io_chipdep.c,v 1.5 2003/09/02 17:25:21 miod Exp $ */
+/* $OpenBSD: pci_bwx_bus_io_chipdep.c,v 1.6 2009/07/26 18:48:54 miod Exp $ */
 /* $NetBSD: pcs_bus_io_common.c,v 1.14 1996/12/02 22:19:35 cgd Exp $ */
 
 /*
@@ -280,11 +280,11 @@ __C(CHIP,_bus_io_init)(t, v)
 }
 
 int
-__C(CHIP,_io_map)(v, ioaddr, iosize, cacheable, iohp)
+__C(CHIP,_io_map)(v, ioaddr, iosize, flags, iohp)
 	void *v;
 	bus_addr_t ioaddr;
 	bus_size_t iosize;
-	int cacheable;
+	int flags;
 	bus_space_handle_t *iohp;
 {
 	int error;
@@ -349,12 +349,12 @@ __C(CHIP,_io_subregion)(v, ioh, offset, size, nioh)
 }
 
 int
-__C(CHIP,_io_alloc)(v, rstart, rend, size, align, boundary, cacheable,
+__C(CHIP,_io_alloc)(v, rstart, rend, size, align, boundary, flags,
     addrp, bshp)
 	void *v;
 	bus_addr_t rstart, rend, *addrp;
 	bus_size_t size, align, boundary;
-	int cacheable;
+	int flags;
 	bus_space_handle_t *bshp;
 {
 
diff --git a/sys/arch/alpha/pci/pci_bwx_bus_mem_chipdep.c b/sys/arch/alpha/pci/pci_bwx_bus_mem_chipdep.c
index 879757b36ca..b5c5c3e3dbb 100644
--- a/sys/arch/alpha/pci/pci_bwx_bus_mem_chipdep.c
+++ b/sys/arch/alpha/pci/pci_bwx_bus_mem_chipdep.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: pci_bwx_bus_mem_chipdep.c,v 1.6 2003/09/02 17:25:21 miod Exp $ */
+/* $OpenBSD: pci_bwx_bus_mem_chipdep.c,v 1.7 2009/07/26 18:48:54 miod Exp $ */
 /* $NetBSD: pcs_bus_mem_common.c,v 1.15 1996/12/02 22:19:36 cgd Exp $ */
 
 /*
@@ -289,11 +289,11 @@ __C(CHIP,_bus_mem_init)(t, v)
 }
 
 int
-__C(CHIP,_mem_map)(v, memaddr, memsize, cacheable, memhp)
+__C(CHIP,_mem_map)(v, memaddr, memsize, flags, memhp)
 	void *v;
 	bus_addr_t memaddr;
 	bus_size_t memsize;
-	int cacheable;
+	int flags;
 	bus_space_handle_t *memhp;
 {
 	int error;
@@ -358,12 +358,12 @@ __C(CHIP,_mem_subregion)(v, memh, offset, size, nmemh)
 }
 
 int
-__C(CHIP,_mem_alloc)(v, rstart, rend, size, align, boundary, cacheable,
+__C(CHIP,_mem_alloc)(v, rstart, rend, size, align, boundary, flags,
     addrp, bshp)
 	void *v;
 	bus_addr_t rstart, rend, *addrp;
 	bus_size_t size, align, boundary;
-	int cacheable;
+	int flags;
 	bus_space_handle_t *bshp;
 {
 	bus_addr_t memaddr;
diff --git a/sys/arch/alpha/pci/pci_swiz_bus_io_chipdep.c b/sys/arch/alpha/pci/pci_swiz_bus_io_chipdep.c
index da0d832a9dc..3a41b3e98f6 100644
--- a/sys/arch/alpha/pci/pci_swiz_bus_io_chipdep.c
+++ b/sys/arch/alpha/pci/pci_swiz_bus_io_chipdep.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: pci_swiz_bus_io_chipdep.c,v 1.5 2008/07/19 17:10:03 miod Exp $	*/
+/*	$OpenBSD: pci_swiz_bus_io_chipdep.c,v 1.6 2009/07/26 18:48:54 miod Exp $	*/
 /*	$NetBSD: pcs_bus_io_common.c,v 1.14 1996/12/02 22:19:35 cgd Exp $	*/
 
 /*
@@ -301,11 +301,11 @@ __C(CHIP,_bus_io_init)(t, v)
 }
 
 int
-__C(CHIP,_io_map)(v, ioaddr, iosize, cacheable, iohp)
+__C(CHIP,_io_map)(v, ioaddr, iosize, flags, iohp)
 	void *v;
 	bus_addr_t ioaddr;
 	bus_size_t iosize;
-	int cacheable;
+	int flags;
 	bus_space_handle_t *iohp;
 {
 	bus_addr_t ioend = ioaddr + (iosize - 1);
@@ -432,12 +432,12 @@ __C(CHIP,_io_subregion)(v, ioh, offset, size, nioh)
 }
 
 int
-__C(CHIP,_io_alloc)(v, rstart, rend, size, align, boundary, cacheable,
+__C(CHIP,_io_alloc)(v, rstart, rend, size, align, boundary, flags,
     addrp, bshp)
 	void *v;
 	bus_addr_t rstart, rend, *addrp;
 	bus_size_t size, align, boundary;
-	int cacheable;
+	int flags;
 	bus_space_handle_t *bshp;
 {
 
diff --git a/sys/arch/alpha/pci/pci_swiz_bus_mem_chipdep.c b/sys/arch/alpha/pci/pci_swiz_bus_mem_chipdep.c
index 4251ecf8115..dfeee2283cc 100644
--- a/sys/arch/alpha/pci/pci_swiz_bus_mem_chipdep.c
+++ b/sys/arch/alpha/pci/pci_swiz_bus_mem_chipdep.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: pci_swiz_bus_mem_chipdep.c,v 1.4 2007/03/16 21:22:27 robert Exp $	*/
+/*	$OpenBSD: pci_swiz_bus_mem_chipdep.c,v 1.5 2009/07/26 18:48:54 miod Exp $	*/
 /*	$NetBSD: pcs_bus_mem_common.c,v 1.15 1996/12/02 22:19:36 cgd Exp $	*/
 
 /*
@@ -478,18 +478,18 @@ __C(CHIP,_xlate_sparse_handle_to_addr)(v, memh, memaddrp)
 }
 
 int
-__C(CHIP,_mem_map)(v, memaddr, memsize, cacheable, memhp)
+__C(CHIP,_mem_map)(v, memaddr, memsize, flags, memhp)
 	void *v;
 	bus_addr_t memaddr;
 	bus_size_t memsize;
-	int cacheable;
+	int flags;
 	bus_space_handle_t *memhp;
 {
 	bus_space_handle_t dh = 0, sh = 0;	/* XXX -Wuninitialized */
 	int didd, dids, errord, errors, mustd, musts;
 
 	mustd = 1;
-	musts = (cacheable == 0);
+	musts = (flags & BUS_SPACE_MAP_CACHEABLE) == 0;
 
 #ifdef EXTENT_DEBUG
 	printf("mem: allocating 0x%lx to 0x%lx\n", memaddr,
@@ -542,7 +542,7 @@ __C(CHIP,_mem_map)(v, memaddr, memsize, cacheable, memhp)
 		    __S(__C(CHIP,_mem_map)), memaddr);
 	}
 
-	if (cacheable)
+	if (flags & BUS_SPACE_MAP_CACHEABLE)
 		*memhp = dh;
 	else
 		*memhp = sh;
@@ -665,12 +665,12 @@ __C(CHIP,_mem_subregion)(v, memh, offset, size, nmemh)
 }
 
 int
-__C(CHIP,_mem_alloc)(v, rstart, rend, size, align, boundary, cacheable,
+__C(CHIP,_mem_alloc)(v, rstart, rend, size, align, boundary, flags,
     addrp, bshp)
 	void *v;
 	bus_addr_t rstart, rend, *addrp;
 	bus_size_t size, align, boundary;
-	int cacheable;
+	int flags;
 	bus_space_handle_t *bshp;
 {
 
diff --git a/sys/arch/alpha/tc/tc_bus_mem.c b/sys/arch/alpha/tc/tc_bus_mem.c
index 759c9e4a295..af6bfc8b9f6 100644
--- a/sys/arch/alpha/tc/tc_bus_mem.c
+++ b/sys/arch/alpha/tc/tc_bus_mem.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: tc_bus_mem.c,v 1.13 2002/05/02 22:56:06 miod Exp $ */
+/* $OpenBSD: tc_bus_mem.c,v 1.14 2009/07/26 18:48:54 miod Exp $ */
 /* $NetBSD: tc_bus_mem.c,v 1.25 2001/09/04 05:31:28 thorpej Exp $ */
 
 /*
@@ -231,17 +231,17 @@ tc_bus_mem_init(memv)
 
 /* ARGSUSED */
 int
-tc_mem_map(v, memaddr, memsize, cacheable, memhp)
+tc_mem_map(v, memaddr, memsize, flags, memhp)
 	void *v;
 	bus_addr_t memaddr;
 	bus_size_t memsize;
-	int cacheable;
+	int flags;
 	bus_space_handle_t *memhp;
 {
 
 	if (memaddr & 0x7)
 		panic("tc_mem_map needs 8 byte alignment");
-	if (cacheable)
+	if (flags & BUS_SPACE_MAP_CACHEABLE)
 		*memhp = ALPHA_PHYS_TO_K0SEG(memaddr);
 	else
 		*memhp = ALPHA_PHYS_TO_K0SEG(TC_DENSE_TO_SPARSE(memaddr));