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authorJonathan Gray <jsg@cvs.openbsd.org>2005-08-20 00:34:00 +0000
committerJonathan Gray <jsg@cvs.openbsd.org>2005-08-20 00:34:00 +0000
commit398ac55cb9184bf7385528537f71525c7debec31 (patch)
treed8f5a258458b25dccf405621a9445b3f6f02404c /sys/arch/amd64/include/specialreg.h
parent7cfd9446092e192a85a3ea0d5b1a3103b751739f (diff)
Check for and report the presense of SSE3. This has started to appear
in AMD products with the arrival of the venice core. ok deraadt@
Diffstat (limited to 'sys/arch/amd64/include/specialreg.h')
-rw-r--r--sys/arch/amd64/include/specialreg.h4
1 files changed, 3 insertions, 1 deletions
diff --git a/sys/arch/amd64/include/specialreg.h b/sys/arch/amd64/include/specialreg.h
index 89bf2b88495..486176a4663 100644
--- a/sys/arch/amd64/include/specialreg.h
+++ b/sys/arch/amd64/include/specialreg.h
@@ -1,4 +1,4 @@
-/* $OpenBSD: specialreg.h,v 1.2 2004/02/09 22:15:52 mickey Exp $ */
+/* $OpenBSD: specialreg.h,v 1.3 2005/08/20 00:33:59 jsg Exp $ */
/* $NetBSD: specialreg.h,v 1.1 2003/04/26 18:39:48 fvdl Exp $ */
/* $NetBSD: x86/specialreg.h,v 1.2 2003/04/25 21:54:30 fvdl Exp $ */
@@ -126,6 +126,8 @@
#define CPUID_IA64 0x40000000 /* IA-64 architecture */
#define CPUID_SBF 0x80000000 /* signal break on FERR */
+#define CPUIDECX_SSE3 0x00000001 /* streaming SIMD extensions #3 */
+
/*
* AMD/VIA processor specific flags.
*/