diff options
author | Philip Guenther <guenther@cvs.openbsd.org> | 2017-08-25 19:28:49 +0000 |
---|---|---|
committer | Philip Guenther <guenther@cvs.openbsd.org> | 2017-08-25 19:28:49 +0000 |
commit | 18d6d7db66ab171364280e598efdb4f3a860d075 (patch) | |
tree | 7a84170ffbca5316afe21dfd1fdb49d644e6d407 /sys/arch/amd64/include | |
parent | d879ee7cec3cfda38481166d90e013a7da7a8739 (diff) |
If SMAP is present, clear PSL_AC on kernel entry and interrupt so that
only the code in copy{in,out}* that need it run with it set. Panic if
it's set on entry to trap() or syscall(). Prompted by Maxime Villard's
NetBSD work.
ok kettenis@ mlarkin@ deraadt@
Diffstat (limited to 'sys/arch/amd64/include')
-rw-r--r-- | sys/arch/amd64/include/codepatch.h | 19 |
1 files changed, 18 insertions, 1 deletions
diff --git a/sys/arch/amd64/include/codepatch.h b/sys/arch/amd64/include/codepatch.h index 92cd2db51a2..185b5b73abc 100644 --- a/sys/arch/amd64/include/codepatch.h +++ b/sys/arch/amd64/include/codepatch.h @@ -1,4 +1,4 @@ -/* $OpenBSD: codepatch.h,v 1.3 2017/07/01 19:38:41 sf Exp $ */ +/* $OpenBSD: codepatch.h,v 1.4 2017/08/25 19:28:48 guenther Exp $ */ /* * Copyright (c) 2014-2015 Stefan Fritsch <sf@sfritsch.de> * @@ -51,4 +51,21 @@ void codepatch_call(uint16_t tag, void *func); #define CPTAG_CLAC 2 #define CPTAG_EOI 3 +/* + * As stac/clac SMAP instructions are 3 bytes, we want the fastest + * 3 byte nop sequence possible here. This will be replaced by + * stac/clac instructions if SMAP is detected after booting. + * + * This would be 'nop (%rax)' if binutils could cope. + * Intel documents multi-byte NOP sequences as being available + * on all family 0x6 and 0xf processors (ie 686+) + */ +#define SMAP_NOP .byte 0x0f, 0x1f, 0x00 +#define SMAP_STAC CODEPATCH_START ;\ + SMAP_NOP ;\ + CODEPATCH_END(CPTAG_STAC) +#define SMAP_CLAC CODEPATCH_START ;\ + SMAP_NOP ;\ + CODEPATCH_END(CPTAG_CLAC) + #endif /* _MACHINE_CODEPATCH_H_ */ |